#ifdef CONFIG_IDE
/* ATA */
-# define CONFIG_IDE_RESET 1
# define CONFIG_IDE_PREINIT 1
-# define CONFIG_ATAPI
# undef CONFIG_LBA48
-
-# define CONFIG_SYS_IDE_MAXBUS 1
-# define CONFIG_SYS_IDE_MAXDEVICE 2
-
-# define CONFIG_SYS_ATA_BASE_ADDR (CONFIG_SYS_MBAR2 + 0x800)
-# define CONFIG_SYS_ATA_IDE0_OFFSET 0
-
-# define CONFIG_SYS_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */
-# define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */
-# define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
-# define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
#endif
#define CONFIG_DRIVER_DM9000
#define CONFIG_HOSTNAME "M5253DEMO"
/* I2C */
-#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_SYS_I2C_PINMUX_REG (*(u32 *) (CONFIG_SYS_MBAR+0x19C))
#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF)
#define CONFIG_SYS_I2C_PINMUX_SET (0)
/* FLASH organization */
#define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE)
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 2048 /* max number of sectors on one chip */
#define CONFIG_SYS_FLASH_ERASE_TOUT 1000