/* FLASH organization */
#define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE)
-#define CONFIG_SYS_MAX_FLASH_SECT 2048 /* max number of sectors on one chip */
#define FLASH_SST6401B 0x200
#define SST_ID_xF6401B 0x236D236D
#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \
CF_CACR_DBWE)
-/* Port configuration */
-#define CONFIG_SYS_FECI2C 0xF0
-
#define CONFIG_SYS_CS0_BASE 0xFF800000
#define CONFIG_SYS_CS0_MASK 0x007F0021
#define CONFIG_SYS_CS0_CTRL 0x00001D80