Rename CONFIG_SYS_INIT_RAM_END into CONFIG_SYS_INIT_RAM_SIZE
[platform/kernel/u-boot.git] / include / configs / M52277EVB.h
index 5d5966f..a4420eb 100644 (file)
 #define CONFIG_SYS_IMMR                        CONFIG_SYS_MBAR
 
 /* DSPI and Serial Flash */
+#define CONFIG_CF_SPI
 #define CONFIG_CF_DSPI
 #define CONFIG_HARD_SPI
-#define CONFIG_SYS_SER_FLASH_BASE      0x01000000
 #define CONFIG_SYS_SBFHDR_SIZE         0x7
 #ifdef CONFIG_CMD_SPI
 #      define CONFIG_SYS_DSPI_CS2
 #      define CONFIG_SPI_FLASH
 #      define CONFIG_SPI_FLASH_STMICRO
 
-#      define CONFIG_SYS_DSPI_DCTAR0   (DSPI_DCTAR_TRSZ(7) | \
-                                        DSPI_DCTAR_CPOL | \
-                                        DSPI_DCTAR_CPHA | \
-                                        DSPI_DCTAR_PCSSCK_1CLK | \
-                                        DSPI_DCTAR_PASC(0) | \
-                                        DSPI_DCTAR_PDT(0) | \
-                                        DSPI_DCTAR_CSSCK(0) | \
-                                        DSPI_DCTAR_ASC(0) | \
-                                        DSPI_DCTAR_PBR(0) | \
-                                        DSPI_DCTAR_DT(1) | \
-                                        DSPI_DCTAR_BR(1))
+#      define CONFIG_SYS_DSPI_CTAR0    (DSPI_CTAR_TRSZ(7) | \
+                                        DSPI_CTAR_PCSSCK_1CLK | \
+                                        DSPI_CTAR_PASC(0) | \
+                                        DSPI_CTAR_PDT(0) | \
+                                        DSPI_CTAR_CSSCK(0) | \
+                                        DSPI_CTAR_ASC(0) | \
+                                        DSPI_CTAR_DT(1))
 #endif
 
 /* Input, PCI, Flexbus, and VCO */
  * Definitions for initial stack pointer and data area (in DPRAM)
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       0x80000000
-#define CONFIG_SYS_INIT_RAM_END                0x8000  /* End of used area in internal SRAM */
+#define CONFIG_SYS_INIT_RAM_SIZE               0x8000  /* Size of used area in internal SRAM */
 #define CONFIG_SYS_INIT_RAM_CTRL       0x221
 #define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 32)
+#define CONFIG_SYS_GBL_DATA_OFFSET     ((CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) - 32)
 #define CONFIG_SYS_INIT_SP_OFFSET      (CONFIG_SYS_GBL_DATA_OFFSET - 32)
-#define CONFIG_SYS_SBFHDR_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_END - 32)
+#define CONFIG_SYS_SBFHDR_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_SIZE - 32)
 
 /*
  * Start addresses for the final memory configuration
 #define CONFIG_SYS_MEMTEST_END         ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
 
 #ifdef CONFIG_CF_SBF
-#      define CONFIG_SYS_MONITOR_BASE  (TEXT_BASE + 0x400)
+#      define CONFIG_SYS_MONITOR_BASE  (CONFIG_SYS_TEXT_BASE + 0x400)
 #else
 #      define CONFIG_SYS_MONITOR_BASE  (CONFIG_SYS_FLASH_BASE + 0x400)
 #endif
 
 /* Initial Memory map for Linux */
 #define CONFIG_SYS_BOOTMAPSZ           (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
+#define CONFIG_SYS_BOOTM_LEN           (CONFIG_SYS_SDRAM_SIZE << 20)
 
 /*
  * Configuration for environment
 #      define CONFIG_ENV_IS_IN_FLASH   1
 #endif
 #define CONFIG_ENV_OVERWRITE           1
-#undef CONFIG_ENV_IS_EMBEDDED
 
 /*-----------------------------------------------------------------------
  * FLASH organization
  */
 #ifdef CONFIG_SYS_STMICRO_BOOT
-#      define CONFIG_SYS_FLASH_BASE    CONFIG_SYS_SER_FLASH_BASE
-#      define CONFIG_SYS_FLASH0_BASE   CONFIG_SYS_SER_FLASH_BASE
-#      define CONFIG_SYS_FLASH1_BASE   CONFIG_SYS_CS0_BASE
+#      define CONFIG_SYS_FLASH_BASE    CONFIG_SYS_CS0_BASE
 #      define CONFIG_ENV_OFFSET        0x30000
 #      define CONFIG_ENV_SIZE          0x1000
 #      define CONFIG_ENV_SECT_SIZE     0x10000
 #define CONFIG_SYS_FLASH_CFI
 #ifdef CONFIG_SYS_FLASH_CFI
 #      define CONFIG_FLASH_CFI_DRIVER  1
+#      define CONFIG_SYS_FLASH_USE_BUFFER_WRITE        1
+#      define CONFIG_FLASH_SPANSION_S29WS_N    1
 #      define CONFIG_SYS_FLASH_SIZE            0x1000000       /* Max size that the board might have */
 #      define CONFIG_SYS_FLASH_CFI_WIDTH       FLASH_CFI_16BIT
 #      define CONFIG_SYS_MAX_FLASH_BANKS       1       /* max number of memory banks */
  */
 #define CONFIG_SYS_CACHELINE_SIZE      16
 
+#define ICACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_SIZE - 8)
+#define DCACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_SIZE - 4)
+#define CONFIG_SYS_ICACHE_INV          (CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0          (CONFIG_SYS_SDRAM_BASE | \
+                                        CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+                                        CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR         (CF_CACR_CENB | CF_CACR_CINV | \
+                                        CF_CACR_DISD | CF_CACR_INVI | \
+                                        CF_CACR_CEIB | CF_CACR_DCM | \
+                                        CF_CACR_EUSP)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */