/* JSE has EEPROM chips that are good for environment. */
#undef CFG_ENV_IS_IN_NVRAM
#undef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_IS_IN_EEPROM 1
+#define CONFIG_ENV_IS_IN_EEPROM 1
#undef CFG_ENV_IS_NOWHERE
/* This is the 7bit address of the device, not including P. */
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE 16384 /* For AMCC 405GPr CPUs */
-#define CFG_CACHELINE_SIZE 32 /* ... */
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Init Memory Controller:
*