/*
- * (C) Copyright 2003-2004
+ * (C) Copyright 2003-2005
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* 0x40000000 - 0x4fffffff - PCI Memory
* 0x50000000 - 0x50ffffff - PCI IO Space
*/
-#define CONFIG_PCI 1
+#define CONFIG_PCI
+
+#if defined(CONFIG_PCI)
#define CONFIG_PCI_PNP 1
#define CONFIG_PCI_SCAN_SHOW 1
#define CONFIG_PCI_IO_BUS 0x50000000
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0x01000000
+#define ADD_PCI_CMD CFG_CMD_PCI
+#endif
+
+#define CFG_XLB_PIPELINING 1
#define CONFIG_NET_MULTI 1
+#define CONFIG_MII 1
#define CONFIG_EEPRO100 1
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#define CONFIG_NS8382X 1
-#define ADD_PCI_CMD CFG_CMD_PCI
-
#else /* MPC5100 */
+#define CONFIG_MII 1
#define ADD_PCI_CMD 0 /* no CFG_CMD_PCI */
#endif
/* USB */
#if 1
-#define CONFIG_USB_OHCI
+#define CONFIG_USB_OHCI_NEW
#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
#define CONFIG_USB_STORAGE
+
+#undef CFG_USB_OHCI_BOARD_INIT
+#define CFG_USB_OHCI_CPU_INIT
+#define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
+#define CFG_USB_OHCI_SLOT_NAME "mpc5200"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
+
#else
#define ADD_USB_CMD 0
#endif
+#define CONFIG_TIMESTAMP /* Print image info with timestamp */
+
/*
* Supported commands
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_EEPROM | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- ADD_PCI_CMD | \
- ADD_USB_CMD)
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_FAT | \
+ CFG_CMD_I2C | \
+ CFG_CMD_IDE | \
+ CFG_CMD_NFS | \
+ CFG_CMD_SNTP | \
+ ADD_PCI_CMD | \
+ ADD_USB_CMD )
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
# define CFG_LOWBOOT16 1
#endif
#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
+#if defined(CONFIG_LITE5200B)
+# error CFG_LOWBOOT08 is incompatible with the Lite5200B
+#else
# define CFG_LOWBOOT 1
# define CFG_LOWBOOT08 1
#endif
+#endif
/*
* Autobooting
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
- "nfsroot=$(serverip):$(rootpath)\0" \
+ "nfsroot=${serverip}:${rootpath}\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
- "addip=setenv bootargs $(bootargs) " \
- "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
- ":$(hostname):$(netdev):off panic=1\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
"flash_nfs=run nfsargs addip;" \
- "bootm $(kernel_addr)\0" \
+ "bootm ${kernel_addr}\0" \
"flash_self=run ramargs addip;" \
- "bootm $(kernel_addr) $(ramdisk_addr)\0" \
- "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_82xx\0" \
"bootfile=/tftpboot/MPC5200/uImage\0" \
""
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#if defined(CONFIG_LITE5200B)
+#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#else
+#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
#endif
+#endif /* CONFIG_MPC5200 */
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_BOARD_SETUP 1
+
+/* maximum size of the flat tree (8K) */
+#define OF_FLAT_TREE_MAX_SIZE 8192
+
+#define OF_CPU "PowerPC,5200@0"
+#define OF_SOC "soc5200@f0000000"
+#define OF_TBCLK (bd->bi_busfreq / 8)
+#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
+
/*
* I2C configuration
*/
/*
* Flash configuration
*/
+#if defined(CONFIG_LITE5200B)
+#define CFG_FLASH_BASE 0xFE000000
+#define CFG_FLASH_SIZE 0x01000000
+#if !defined(CFG_LOWBOOT)
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x01760000 + 0x00800000)
+#else /* CFG_LOWBOOT */
+#if defined(CFG_LOWBOOT08)
+# error CFG_LOWBOOT08 is incompatible with the Lite5200B
+#endif
+#if defined(CFG_LOWBOOT16)
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x01060000)
+#endif
+#endif /* CFG_LOWBOOT */
+#else /* !CONFIG_LITE5200B (IceCube)*/
#define CFG_FLASH_BASE 0xFF000000
#define CFG_FLASH_SIZE 0x01000000
#if !defined(CFG_LOWBOOT)
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
#endif
#endif /* CFG_LOWBOOT */
+#endif /* CONFIG_LITE5200B */
#define CFG_MAX_FLASH_BANKS 2 /* max num of memory banks */
#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */
#undef CONFIG_FLASH_16BIT /* Flash is 8-bit */
+#if defined(CONFIG_LITE5200B)
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_CFI
+#define CFG_FLASH_BANKS_LIST {CFG_CS1_START,CFG_CS0_START}
+#endif
+
/*
* Environment settings
*/
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_SIZE 0x10000
+#if defined(CONFIG_LITE5200B)
+#define CFG_ENV_SECT_SIZE 0x20000
+#else
#define CFG_ENV_SECT_SIZE 0x10000
+#endif
#define CONFIG_ENV_OVERWRITE 1
/*
*/
/* #define CONFIG_FEC_10MBIT 1 */
#define CONFIG_PHY_ADDR 0x00
+#if defined(CONFIG_LITE5200B)
+#define CONFIG_FEC_MII100 1
+#endif
/*
* GPIO configuration
#define CFG_HID0_FINAL 0
#endif
+#if defined(CONFIG_LITE5200B)
+#define CFG_CS1_START CFG_FLASH_BASE
+#define CFG_CS1_SIZE CFG_FLASH_SIZE
+#define CFG_CS1_CFG 0x00047800
+#define CFG_CS0_START (CFG_FLASH_BASE + CFG_FLASH_SIZE)
+#define CFG_CS0_SIZE CFG_FLASH_SIZE
+#define CFG_BOOTCS_START CFG_CS0_START
+#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
+#define CFG_BOOTCS_CFG 0x00047800
+#else /* IceCube aka Lite5200 */
#ifdef CONFIG_MPC5200_DDR
#define CFG_BOOTCS_START (CFG_CS1_START + CFG_CS1_SIZE)
#define CFG_CS0_SIZE CFG_FLASH_SIZE
#endif /* CONFIG_MPC5200_DDR */
+#endif /*CONFIG_LITE5200B */
#define CFG_CS_BURST 0x00000000
#define CFG_CS_DEADCYCLE 0x33333333
projects / platform / kernel / u-boot.git / blobdiff