Remove unused CFG_EEPROM_PAGE_WRITE_ENABLE references

[platform/kernel/u-boot.git] / include / configs / HUB405.h

diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h
index ed669c5..2a61e77 100644 (file)
--- a/include/configs/HUB405.h
+++ b/include/configs/HUB405.h
@@ -157,7 +157,8 @@
 #define CFG_NAND_CLE            (0x80000000 >> 2)   /* our CLE is GPIO2 */
 #define CFG_NAND_ALE            (0x80000000 >> 3)   /* our ALE is GPIO3 */
 
-#define CFG_NAND_SKIP_BAD_DOT_I      1  /* ".i" read skips bad blocks   */
+#define CFG_NAND_SKIP_BAD_DOT_I 1       /* ".i" read skips bad blocks   */
+#define CFG_NAND_QUIET          1
 
 /*-----------------------------------------------------------------------
  * PCI stuff
@@ -231,9 +232,9 @@
 /*-----------------------------------------------------------------------
  * Environment Variable setup
  */
-#define CFG_ENV_IS_IN_EEPROM   1       /* use EEPROM for environment vars */
-#define CFG_ENV_OFFSET         0x100   /* environment starts at the beginning of the EEPROM */
-#define CFG_ENV_SIZE           0x700   /* 2048 bytes may be used for env vars*/
+#define CONFIG_ENV_IS_IN_EEPROM        1       /* use EEPROM for environment vars */
+#define CONFIG_ENV_OFFSET              0x100   /* environment starts at the beginning of the EEPROM */
+#define CONFIG_ENV_SIZE                0x700   /* 2048 bytes may be used for env vars*/
                                   /* total size of a CAT24WC16 is 2048 bytes */
 
 #define CFG_NVRAM_BASE_ADDR    0xF0000500              /* NVRAM base address   */
@@ -254,17 +255,6 @@
                                        /* 16 byte page write mode using*/
                                        /* last 4 bits of the address   */
 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10   /* and takes up to 10 msec */
-#define CFG_EEPROM_PAGE_WRITE_ENABLE
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE                16384   /* For AMCC 405 CPUs, older 405 ppc's   */
-                                       /* have only 8kB, 16kB is save here     */
-#define CFG_CACHELINE_SIZE     32      /* ...                  */
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value        */
-#endif
 
 /*
  * Init Memory Controller: