Merge branch 'master' of git://git.denx.de/u-boot-avr32

[platform/kernel/u-boot.git] / include / configs / HH405.h

diff --git a/include/configs/HH405.h b/include/configs/HH405.h
index d940a88..444413d 100644 (file)
--- a/include/configs/HH405.h
+++ b/include/configs/HH405.h
@@ -43,6 +43,8 @@
 #define CONFIG_4xx             1       /* ...member of PPC4xx family   */
 #define CONFIG_HH405           1       /* ...on a HH405 board          */
 
+#define        CONFIG_SYS_TEXT_BASE    0xFFF80000
+
 #define CONFIG_BOARD_EARLY_INIT_F 1    /* call board_early_init_f()    */
 #define CONFIG_MISC_INIT_R      1       /* call misc_init_r()           */
 
@@ -65,7 +67,6 @@
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */
 
 #define CONFIG_PPC4xx_EMAC
-#define CONFIG_NET_MULTI       1
 #undef  CONFIG_HAS_ETH1
 
 #define CONFIG_MII             1       /* MII PHY management           */
@@ -154,9 +155,6 @@
 #define CONFIG_SYS_PROMPT      "=> "           /* Monitor Command Prompt       */
 
 #undef CONFIG_SYS_HUSH_PARSER                  /* use "hush" command parser    */
-#ifdef CONFIG_SYS_HUSH_PARSER
-#define        CONFIG_SYS_PROMPT_HUSH_PS2      "> "
-#endif
 
 #if defined(CONFIG_CMD_KGDB)
 #define        CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size      */
@@ -176,9 +174,14 @@
 #define CONFIG_SYS_MEMTEST_START       0x0400000       /* memtest works on     */
 #define CONFIG_SYS_MEMTEST_END         0x0C00000       /* 4 ... 12 MB in DRAM  */
 
+#define CONFIG_CONS_INDEX      2       /* Use UART1                    */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    1
+#define CONFIG_SYS_NS16550_CLK         get_serial_clock()
+
 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK           /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD       691200
-#define CONFIG_UART1_CONSOLE            /* define for uart1 as console  */
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE      \
@@ -306,7 +309,7 @@
  */
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 #define CONFIG_SYS_FLASH_BASE          0xFFF80000
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_MONITOR_LEN         (512 * 1024)    /* Reserve 512 kB for Monitor   */
 #define CONFIG_SYS_MALLOC_LEN          (4 << 20)       /* Reserve 4 MB for malloc()    */
 
@@ -443,10 +446,9 @@
 #define CONFIG_SYS_OCM_DATA_ADDR       0xF8000000
 #define CONFIG_SYS_OCM_DATA_SIZE       0x1000
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_DATA_ADDR /* inside of SDRAM             */
-#define CONFIG_SYS_INIT_RAM_END        CONFIG_SYS_OCM_DATA_SIZE /* End of used area in RAM     */
+#define CONFIG_SYS_INIT_RAM_SIZE       CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM    */
 
-#define CONFIG_SYS_GBL_DATA_SIZE      128  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
@@ -476,14 +478,6 @@
 #define CONFIG_SYS_LCD1_RST            (0x80000000 >> 31)
 
 /*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD  0x01            /* Normal Power-On: Boot from FLASH     */
-#define BOOTFLAG_WARM  0x02            /* Software reboot                      */
-
-/*
  * Default speed selection (cpu_plb_opb_ebc) in mhz.
  * This value will be set if iic boot eprom is disabled.
  */