#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
#if 1
-#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
+#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
#endif
#if 0
-#define CFG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */
+#define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */
#endif
#if 0
-#define CFG_ENV_IS_IN_EEPROM 1 /* use I2C RTC X1240 for environment vars */
-#define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */
-#define CFG_ENV_SIZE 0x800 /* 2048 bytes may be used for env vars */
+#define CONFIG_ENV_IS_IN_EEPROM 1 /* use I2C RTC X1240 for environment vars */
+#define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */
+#define CONFIG_ENV_SIZE 0x800 /* 2048 bytes may be used for env vars */
#endif /* total size of a X1240 is 2048 bytes */
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CONFIG_I2C_RTC 1 /* we have a Xicor X1240 RTC */
#define CFG_I2C_RTC_ADDR 0x6F /* and one for RTC */
-#ifdef CFG_ENV_IS_IN_FLASH
-#undef CFG_ENV_IS_IN_NVRAM
-#undef CFG_ENV_IS_IN_EEPROM
+#ifdef CONFIG_ENV_IS_IN_FLASH
+#undef CONFIG_ENV_IS_IN_NVRAM
+#undef CONFIG_ENV_IS_IN_EEPROM
#else
-#ifdef CFG_ENV_IS_IN_NVRAM
-#undef CFG_ENV_IS_IN_FLASH
-#undef CFG_ENV_IS_IN_EEPROM
+#ifdef CONFIG_ENV_IS_IN_NVRAM
+#undef CONFIG_ENV_IS_IN_FLASH
+#undef CONFIG_ENV_IS_IN_EEPROM
#else
-#ifdef CFG_ENV_IS_IN_EEPROM
-#undef CFG_ENV_IS_IN_NVRAM
-#undef CFG_ENV_IS_IN_FLASH
+#ifdef CONFIG_ENV_IS_IN_EEPROM
+#undef CONFIG_ENV_IS_IN_NVRAM
+#undef CONFIG_ENV_IS_IN_FLASH
#endif
#endif
#endif
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
/* BEG ENVIRONNEMENT FLASH */
-#ifdef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE (128*1024)
+#ifdef CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SECT_SIZE (128*1024)
#if 0 /* force ENV to be NOT embedded */
-#define CFG_ENV_ADDR 0xfffa0000
+#define CONFIG_ENV_ADDR 0xfffa0000
#else /* force ENV to be embedded */
-#define CFG_ENV_SIZE (2 * 1024) /* Total Size of Environment Sector 2k */
-#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN - CFG_ENV_SIZE - 0x10) /* let space for reset vector */
-/* #define CFG_ENV_ADDR (CFG_MONITOR_BASE)*/
-#define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE)
+#define CONFIG_ENV_SIZE (2 * 1024) /* Total Size of Environment Sector 2k */
+#define CONFIG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN - CONFIG_ENV_SIZE - 0x10) /* let space for reset vector */
+/* #define CONFIG_ENV_ADDR (CFG_MONITOR_BASE)*/
+#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CFG_FLASH_BASE)
#endif
#endif
#define CFG_NVRAM_BASE_ADDR CFG_NVRAM_REG_BASE_ADDR /* NVRAM base address */
#define CFG_NVRAM_SIZE 0x7F8 /* NVRAM size 2kByte - 8 Byte for RTC */
-#ifdef CFG_ENV_IS_IN_NVRAM
-#define CFG_ENV_SIZE 0x7F8 /* Size of Environment vars */
-#define CFG_ENV_ADDR \
- (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE) /* Env */
-#endif
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
-#define CFG_CACHELINE_SIZE 32 /* ... */
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#ifdef CONFIG_ENV_IS_IN_NVRAM
+#define CONFIG_ENV_SIZE 0x7F8 /* Size of Environment vars */
+#define CONFIG_ENV_ADDR \
+ (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
#endif
/*
* BR0/1 and OR0/1 (FLASH)
*/
-#define FLASH_BASE0_PRELIM 0xFF800000 /* FLASH bank #0 8MB */
+#define FLASH_BASE0_PRELIM 0xFF800000 /* FLASH bank #0 8MB */
#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */