Merge the new NAND code (testing-NAND brach); see doc/README.nand

[platform/kernel/u-boot.git] / include / configs / DK1S10.h

diff --git a/include/configs/DK1S10.h b/include/configs/DK1S10.h
index 835c7a2..3e3803c 100644 (file)
--- a/include/configs/DK1S10.h
+++ b/include/configs/DK1S10.h
@@ -142,6 +142,7 @@
 #if    (CFG_NIOS_CPU_UART_NUMS != 0)
 
 #define CFG_NIOS_CONSOLE       CFG_NIOS_CPU_UART0 /* 1st UART is Cons. */
+#define CONFIG_LOADS_ECHO      1        /* echo on for serial download */
 
 #if    (CFG_NIOS_CPU_UART0_BR != 0)
 #define CFG_NIOS_FIXEDBAUD     1                  /* Baudrate is fixed */
@@ -168,10 +169,28 @@
 #define CFG_NIOS_TMRBASE       CFG_NIOS_CPU_TIMER0 /* TIMER0 as tick   */
 #define CFG_NIOS_TMRIRQ                CFG_NIOS_CPU_TIMER0_IRQ
 
+#if    (CFG_NIOS_CPU_TIMER0_FP == 1)               /* fixed period */
+
 #if    (CFG_NIOS_CPU_TIMER0_PER >= CFG_HZ)
 #define CFG_NIOS_TMRMS         (CFG_NIOS_CPU_TIMER0_PER / CFG_HZ)
 #else
-#error *** CFG_ERROR: you have to use a timer periode of more than CFG_HZ
+#error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ
+#endif
+
+#undef CFG_NIOS_TMRCNT /* no preloadable counter value */
+
+#elif  (CFG_NIOS_CPU_TIMER0_FP == 0)               /* variable period */
+
+#if    (CFG_HZ <= 1000)
+#define CFG_NIOS_TMRMS         (1000 / CFG_HZ)
+#else
+#error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000
+#endif
+
+#define        CFG_NIOS_TMRCNT         (CONFIG_SYS_CLK_FREQ / CFG_HZ)
+
+#else
+#error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER0_FP correct
 #endif
 
 #elif  (CFG_NIOS_CPU_TICK_TIMER == 1)
@@ -179,10 +198,28 @@
 #define CFG_NIOS_TMRBASE       CFG_NIOS_CPU_TIMER1 /* TIMER1 as tick   */
 #define CFG_NIOS_TMRIRQ                CFG_NIOS_CPU_TIMER1_IRQ
 
+#if    (CFG_NIOS_CPU_TIMER1_FP == 1)               /* fixed period */
+
 #if    (CFG_NIOS_CPU_TIMER1_PER >= CFG_HZ)
 #define CFG_NIOS_TMRMS         (CFG_NIOS_CPU_TIMER1_PER / CFG_HZ)
 #else
-#error *** CFG_ERROR: you have to use a timer periode of more than CFG_HZ
+#error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ
+#endif
+
+#undef CFG_NIOS_TMRCNT /* no preloadable counter value */
+
+#elif  (CFG_NIOS_CPU_TIMER1_FP == 0)               /* variable period */
+
+#if    (CFG_HZ <= 1000)
+#define CFG_NIOS_TMRMS         (1000 / CFG_HZ)
+#else
+#error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000
+#endif
+
+#define        CFG_NIOS_TMRCNT         (CONFIG_SYS_CLK_FREQ / CFG_HZ)
+
+#else
+#error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER1_FP correct
 #endif
 
 #endif /* CFG_NIOS_CPU_TICK_TIMER */
@@ -440,6 +477,7 @@
                                 CFG_CMD_JFFS2  | \
                                 CFG_CMD_KGDB   | \
                                 CFG_CMD_NAND   | \
+                                CFG_CMD_NFS    | \
                                 CFG_CMD_MMC    | \
                                 CFG_CMD_MII    | \
                                 CFG_CMD_PCI    | \
@@ -447,7 +485,8 @@
                                 CFG_CMD_SCSI   | \
                                 CFG_CMD_SPI    | \
                                 CFG_CMD_VFD    | \
-                                CFG_CMD_USB    ) )
+                                CFG_CMD_USB    | \
+                                CFG_CMD_XIMG   ) )
 
 
 #include <cmd_confdefs.h>
@@ -506,5 +545,21 @@
 #undef CFG_MEMTEST_END
 #endif
 
+/*
+ * JFFS2 partitions
+ *
+ */
+/* No command line, one static partition, whole device */
+#undef CONFIG_JFFS2_CMDLINE
+#define CONFIG_JFFS2_DEV               "nor0"
+#define CONFIG_JFFS2_PART_SIZE         0xFFFFFFFF
+#define CONFIG_JFFS2_PART_OFFSET       0x00000000
+
+/* mtdparts command line support */
+/*
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT         ""
+#define MTDPARTS_DEFAULT       ""
+*/
 
 #endif /* __CONFIG_H */