Merge the new NAND code (testing-NAND brach); see doc/README.nand

[platform/kernel/u-boot.git] / include / configs / DK1C20.h

diff --git a/include/configs/DK1C20.h b/include/configs/DK1C20.h
index 2d77dd7..b58846d 100644 (file)
--- a/include/configs/DK1C20.h
+++ b/include/configs/DK1C20.h
@@ -3,6 +3,9 @@
  * Scott McNutt <smcnutt@psyent.com>
  * Stephan Linz <linz@li-pro.net>
  *
+ * CompactFlash/IDE:
+ * (C) Copyright 2004, Shlomo Kut <skut@vyyo.com>
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -146,17 +149,60 @@
 
 #if    (CFG_NIOS_CPU_TICK_TIMER == 0)
 
-#error *** CFG_ERROR: tick timer at TIMER0 not supported, expand your config.h
+#define CFG_NIOS_TMRBASE       CFG_NIOS_CPU_TIMER0 /* TIMER0 as tick   */
+#define CFG_NIOS_TMRIRQ                CFG_NIOS_CPU_TIMER0_IRQ
+
+#if    (CFG_NIOS_CPU_TIMER0_FP == 1)               /* fixed period */
+
+#if    (CFG_NIOS_CPU_TIMER0_PER >= CFG_HZ)
+#define CFG_NIOS_TMRMS         (CFG_NIOS_CPU_TIMER0_PER / CFG_HZ)
+#else
+#error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ
+#endif
+
+#undef CFG_NIOS_TMRCNT /* no preloadable counter value */
+
+#elif  (CFG_NIOS_CPU_TIMER0_FP == 0)               /* variable period */
+
+#if    (CFG_HZ <= 1000)
+#define CFG_NIOS_TMRMS         (1000 / CFG_HZ)
+#else
+#error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000
+#endif
+
+#define        CFG_NIOS_TMRCNT         (CONFIG_SYS_CLK_FREQ / CFG_HZ)
+
+#else
+#error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER0_FP correct
+#endif
 
 #elif  (CFG_NIOS_CPU_TICK_TIMER == 1)
 
 #define CFG_NIOS_TMRBASE       CFG_NIOS_CPU_TIMER1 /* TIMER1 as tick   */
 #define CFG_NIOS_TMRIRQ                CFG_NIOS_CPU_TIMER1_IRQ
 
+#if    (CFG_NIOS_CPU_TIMER1_FP == 1)               /* fixed period */
+
 #if    (CFG_NIOS_CPU_TIMER1_PER >= CFG_HZ)
 #define CFG_NIOS_TMRMS         (CFG_NIOS_CPU_TIMER1_PER / CFG_HZ)
 #else
-#error *** CFG_ERROR: you have to use a timer periode of more than CFG_HZ
+#error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ
+#endif
+
+#undef CFG_NIOS_TMRCNT /* no preloadable counter value */
+
+#elif  (CFG_NIOS_CPU_TIMER1_FP == 0)               /* variable period */
+
+#if    (CFG_HZ <= 1000)
+#define CFG_NIOS_TMRMS         (1000 / CFG_HZ)
+#else
+#error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000
+#endif
+
+#define        CFG_NIOS_TMRCNT         (CONFIG_SYS_CLK_FREQ / CFG_HZ)
+
+#else
+#error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER1_FP correct
 #endif
 
 #endif /* CFG_NIOS_CPU_TICK_TIMER */
@@ -414,28 +460,52 @@
                                 CFG_CMD_DTT    | \
                                 CFG_CMD_EEPROM | \
                                 CFG_CMD_ELF    | \
-                                CFG_CMD_FAT    | \
                                 CFG_CMD_FDC    | \
                                 CFG_CMD_FDOS   | \
                                 CFG_CMD_HWFLOW | \
-                                CFG_CMD_IDE    | \
                                 CFG_CMD_I2C    | \
                                 CFG_CMD_JFFS2  | \
                                 CFG_CMD_KGDB   | \
                                 CFG_CMD_NAND   | \
+                                CFG_CMD_NFS    | \
                                 CFG_CMD_MMC    | \
                                 CFG_CMD_MII    | \
                                 CFG_CMD_PCI    | \
                                 CFG_CMD_PCMCIA | \
+                                CFG_CMD_REISER | \
                                 CFG_CMD_SCSI   | \
                                 CFG_CMD_SPI    | \
                                 CFG_CMD_VFD    | \
-                                CFG_CMD_USB    ) )
+                                CFG_CMD_USB    | \
+                                CFG_CMD_XIMG   ) )
 
 
 #include <cmd_confdefs.h>
 
 /*------------------------------------------------------------------------
+ * COMPACT FLASH
+ *----------------------------------------------------------------------*/
+#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+#define CONFIG_IDE_PREINIT                     /* Implement id_preinit */
+#define CFG_IDE_MAXBUS         1               /* 1 IDE bus            */
+#define CFG_IDE_MAXDEVICE      1               /* 1 drive per IDE bus  */
+
+#define CFG_ATA_BASE_ADDR      0x00920a00      /* IDE/ATA base addr    */
+#define CFG_ATA_IDE0_OFFSET    0x0000          /* IDE0 offset          */
+#define CFG_ATA_DATA_OFFSET    0x0040          /* Data IO offset       */
+#define CFG_ATA_REG_OFFSET     0x0040          /* Register offset      */
+#define CFG_ATA_ALT_OFFSET     0x0100          /* Alternate reg offset */
+#define CFG_ATA_STRIDE          4              /* Width betwix addrs   */
+#define CONFIG_DOS_PARTITION
+
+/* Board-specific cf regs */
+#define CFG_CF_PRESENT         0x009209b0      /* CF Present PIO base  */
+#define CFG_CF_POWER           0x009209c0      /* CF Power FET PIO base*/
+#define CFG_CF_ATASEL          0x009209d0      /* CF ATASEL PIO base   */
+
+#endif /* CONFIG_COMMANDS & CFG_CMD_IDE */
+
+/*------------------------------------------------------------------------
  * KGDB
  *----------------------------------------------------------------------*/
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
@@ -466,5 +536,21 @@
 #undef CFG_MEMTEST_END
 #endif
 
+/*
+ * JFFS2 partitions
+ *
+ */
+/* No command line, one static partition, whole device */
+#undef CONFIG_JFFS2_CMDLINE
+#define CONFIG_JFFS2_DEV               "nor0"
+#define CONFIG_JFFS2_PART_SIZE         0xFFFFFFFF
+#define CONFIG_JFFS2_PART_OFFSET       0x00000000
+
+/* mtdparts command line support */
+/*
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT         ""
+#define MTDPARTS_DEFAULT       ""
+*/
 
 #endif /* __CONFIG_H */