include/: Remove obsolete references to CONFIG_COMMANDS

[platform/kernel/u-boot.git] / include / configs / CPU87.h

diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h
index 9a98e5c..ce25aa5 100644 (file)
--- a/include/configs/CPU87.h
+++ b/include/configs/CPU87.h
@@ -69,9 +69,7 @@
  * for FCC)
  *
  * if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
- *
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
  */
 #undef CONFIG_ETHER_ON_SCC             /* define if ether on SCC       */
 #define CONFIG_ETHER_ON_FCC            /* define if ether on FCC       */
@@ -169,25 +167,22 @@
 
 #define CONFIG_BOOTP_MASK      (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
 
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DOC
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+
 #ifdef CONFIG_PCI
-#define CONFIG_COMMANDS                (CONFIG_CMD_DFL | \
-                                CFG_CMD_BEDBUG | \
-                                CFG_CMD_DATE   | \
-                                CFG_CMD_DOC    | \
-                                CFG_CMD_EEPROM | \
-                                CFG_CMD_I2C    | \
-                                CFG_CMD_PCI)
-#else  /* ! PCI */
-#define CONFIG_COMMANDS                (CONFIG_CMD_DFL | \
-                                CFG_CMD_BEDBUG | \
-                                CFG_CMD_DATE   | \
-                                CFG_CMD_DOC    | \
-                                CFG_CMD_EEPROM | \
-                                CFG_CMD_I2C    )
-#endif /* CONFIG_PCI */
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+    #define CONFIG_CMD_PCI
+#endif
+
 
 #define CFG_NAND_LEGACY
 
@@ -196,7 +191,7 @@
  */
 #define CFG_LONGHELP                   /* undef to save memory         */
 #define CFG_PROMPT     "=> "           /* Monitor Command Prompt       */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CBSIZE     1024            /* Console I/O Buffer Size      */
 #else
 #define CFG_CBSIZE     256             /* Console I/O Buffer Size      */
@@ -369,7 +364,7 @@
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE     32      /* For MPC8260 CPU              */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 # define CFG_CACHELINE_SHIFT   5       /* log base 2 of the above value */
 #endif
 
@@ -455,7 +450,7 @@
 #define CFG_MIN_AM_MASK 0xC0000000
 
 /*
- * we use the same values for 32 MB and 128 MB SDRAM
+ * we use the same values for 32 MB, 128 MB and 256 MB SDRAM
  * refresh rate = 7.68 uS (100 MHz Bus Clock)
  */
 
@@ -510,6 +505,24 @@
                         PSDMR_WRC_1C                   |\
                         PSDMR_CL_2)
 
+       /* SDRAM initialization values for 10-column chips
+        */
+#define CFG_OR2_10COL  (CFG_MIN_AM_MASK                |\
+                        ORxS_BPD_4                     |\
+                        ORxS_ROWST_PBI1_A4             |\
+                        ORxS_NUMR_13)
+
+#define CFG_PSDMR_10COL        (PSDMR_PBI                      |\
+                        PSDMR_SDAM_A17_IS_A5           |\
+                        PSDMR_BSMA_A13_A15             |\
+                        PSDMR_SDA10_PBI1_A6            |\
+                        PSDMR_RFRC_7_CLK               |\
+                        PSDMR_PRETOACT_2W              |\
+                        PSDMR_ACTTORW_2W               |\
+                        PSDMR_LDOTOPRE_1C              |\
+                        PSDMR_WRC_1C                   |\
+                        PSDMR_CL_2)
+
 /*
  * Init Memory Controller:
  *
@@ -588,9 +601,9 @@
                         BRx_MS_SDRAM_P                 |\
                         BRx_V)
 
-#define CFG_OR2_PRELIM  CFG_OR2_9COL
+#define CFG_OR2_PRELIM  CFG_OR2_8COL
 
-#define CFG_PSDMR       CFG_PSDMR_9COL
+#define CFG_PSDMR       CFG_PSDMR_8COL
 #endif /* CFG_RAMBOOT */
 
 /* Bank 3 - Dual Ported SRAM