Merge branch 'master' of git://git.denx.de/u-boot-spi

[platform/kernel/u-boot.git] / include / configs / CPCI4052.h

diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index 908b872..4c12c85 100644 (file)
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -63,7 +63,6 @@
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
 #define CONFIG_RESET_PHY_R      1       /* use reset_phy() to disable phy sleep mode */
 
-#define CONFIG_NET_MULTI       1
 #undef  CONFIG_HAS_ETH1
 
 #define CONFIG_RTC_M48T35A     1               /* ST Electronics M48 timekeeper */
@@ -114,9 +113,6 @@
 #define CONFIG_SYS_PROMPT      "=> "           /* Monitor Command Prompt       */
 
 #undef CONFIG_SYS_HUSH_PARSER                  /* use "hush" command parser    */
-#ifdef CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
-#endif
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE      1024            /* Console I/O Buffer Size      */
@@ -180,6 +176,7 @@
 #define PCI_HOST_AUTO   2               /* detected via arbiter enable  */
 
 #define CONFIG_PCI                     /* include pci support          */
+#define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #define CONFIG_PCI_HOST        PCI_HOST_AUTO   /* select pci host function     */
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play         */
                                        /* resource configuration       */
@@ -199,7 +196,7 @@
 #define CONFIG_SYS_PCI_PTM1PCI 0x00000000      /* Host: use this pci address   */
 #define CONFIG_SYS_PCI_PTM2LA  0xffc00000      /* point to flash               */
 #define CONFIG_SYS_PCI_PTM2MS  0xffc00001      /* 4MB, enable                  */
-#define CONFIG_SYS_PCI_PTM2PCI 0x04000000      /* Host: use this pci address   */
+#define CONFIG_SYS_PCI_PTM2PCI (bd->bi_memsize) /* host use this pci address */
 
 #define CONFIG_PCI_4xx_PTM_OVERWRITE   1 /* overwrite PTMx settings by env */
 
@@ -396,9 +393,8 @@
 #define CONFIG_SYS_INIT_DCACHE_CS      7       /* use cs # 7 for data cache memory    */
 
 #define CONFIG_SYS_INIT_RAM_ADDR       0x40000000  /* use data cache                  */
-#define CONFIG_SYS_INIT_RAM_END        0x2000  /* End of used area in RAM             */
-#define CONFIG_SYS_GBL_DATA_SIZE      128  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       0x2000  /* Size of used area in RAM            */
+#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 #endif /* __CONFIG_H */