ppc4xx: Remove cache definition from 4xx board config files

[platform/kernel/u-boot.git] / include / configs / CPCI405.h

diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h
index 0a4e1e9..bd43e1d 100644 (file)
--- a/include/configs/CPCI405.h
+++ b/include/configs/CPCI405.h
@@ -92,8 +92,6 @@
 
 #define CONFIG_SUPPORT_VFAT
 
-#define CFG_NAND_LEGACY
-
 #undef CONFIG_WATCHDOG                 /* watchdog disabled            */
 
 #define CONFIG_SDRAM_BANK0     1       /* init onboard SDRAM bank 0    */
@@ -268,15 +266,6 @@
 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10   /* and takes up to 10 msec */
 #define CFG_EEPROM_PAGE_WRITE_ENABLE
 
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE                8192    /* For AMCC 405 CPUs                    */
-#define CFG_CACHELINE_SIZE     32      /* ...                  */
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value        */
-#endif
-
 /*
  * Init Memory Controller:
  *