Merge with /home/wd/git/u-boot/custodian/u-boot-testing

[platform/kernel/u-boot.git] / include / configs / CPC45.h

diff --git a/include/configs/CPC45.h b/include/configs/CPC45.h
index 5a00133..aea8523 100644 (file)
--- a/include/configs/CPC45.h
+++ b/include/configs/CPC45.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2001-2003
+ * (C) Copyright 2001-2005
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -50,26 +50,40 @@
 #define CONFIG_BAUDRATE                9600
 #define CFG_BAUDRATE_TABLE     { 9600, 19200, 38400, 57600, 115200 }
 
-#define CONFIG_CLOCKS_IN_MHZ   1       /* clocks passsed to Linux in MHz       */
-
 #define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo"
 
 #define CONFIG_BOOTDELAY       5
 
-#define CONFIG_BOOTP_MASK      (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+#define CONFIG_BOOTP_BOOTFILESIZE
 
-#define CONFIG_COMMANDS              ( CONFIG_CMD_DFL  | \
-                               CFG_CMD_BEDBUG  | \
-                               CFG_CMD_DATE    | \
-                               CFG_CMD_DHCP    | \
-                               CFG_CMD_EEPROM  | \
-                               CFG_CMD_I2C     | \
-                               CFG_CMD_PCI     | \
-                               CFG_CMD_SDRAM   )
 
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any)
+/*
+ * Command line configuration.
  */
-#include <cmd_confdefs.h>
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SNTP
 
 
 /*
@@ -320,7 +334,7 @@
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE     32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #  define CFG_CACHELINE_SHIFT  5       /* log base 2 of the above value        */
 #endif
 
@@ -344,7 +358,7 @@
 #define ST16552_B_BASE 0x80400000      /* ST16552 channel A            */
 #define BCSR_BASE      0x80600000      /* board control / status registers */
 #define DISPLAY_BASE   0x80600040      /* DISPLAY base                 */
-#define PCMCIA_MEM_BASE 0x81000000     /* PCMCIA memory window base    */
+#define PCMCIA_MEM_BASE 0x83000000     /* PCMCIA memory window base    */
 #define PCMCIA_IO_BASE 0xFE000000      /* PCMCIA IO window base        */
 
 
@@ -464,4 +478,45 @@
 #define PCI_ENET0_MEMADDR      0x82000000
 #define PCI_PLX9030_IOADDR     0x82100000
 #define PCI_PLX9030_MEMADDR    0x82100000
+
+/*-----------------------------------------------------------------------
+ * PCMCIA stuff
+ *-----------------------------------------------------------------------
+ */
+
+#define CONFIG_I82365
+
+#define CFG_PCMCIA_MEM_ADDR    PCMCIA_MEM_BASE
+#define CFG_PCMCIA_MEM_SIZE    0x1000
+
+#define CONFIG_PCMCIA_SLOT_A
+
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
+ *-----------------------------------------------------------------------
+ */
+
+#define        CONFIG_IDE_8xx_PCCARD   1       /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT           /* Direct IDE    not supported  */
+#undef CONFIG_IDE_RESET                /* reset for IDE not supported  */
+#define        CONFIG_IDE_LED                  /* LED   for IDE is  supported  */
+
+#define CFG_IDE_MAXBUS         1       /* max. 1 IDE bus               */
+#define CFG_IDE_MAXDEVICE      1       /* max. 1 drive per IDE bus     */
+
+#define CFG_ATA_IDE0_OFFSET    0x0000
+
+#define CFG_ATA_BASE_ADDR      CFG_PCMCIA_MEM_ADDR
+
+#define CFG_ATA_DATA_OFFSET    CFG_PCMCIA_MEM_SIZE
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET     (CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for alternate registers      */
+#define CFG_ATA_ALT_OFFSET     (CFG_PCMCIA_MEM_SIZE + 0x400)
+
+#define CONFIG_DOS_PARTITION
+
 #endif /* __CONFIG_H */