configs: Migrate CMD_NAND*

[platform/kernel/u-boot.git] / include / configs / C29XPCIE.h

diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 39eefb4..050847b 100644 (file)
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -68,10 +68,6 @@
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_BOOKE                   /* BOOKE */
-#define CONFIG_E500                    /* BOOKE e500 family */
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
-#define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_SYS_HAS_SERDES          /* common SERDES init code */
 
 #ifdef CONFIG_PCI
@@ -99,10 +95,8 @@
 #define CONFIG_SYS_PCIE1_IO_PHYS       0xfffc00000ull
 
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
-#define CONFIG_DOS_PARTITION
 #endif
 
-#define CONFIG_FSL_LAW                 /* Use common FSL init code */
 #define CONFIG_TSEC_ENET
 #define CONFIG_ENV_OVERWRITE
 
@@ -129,7 +123,6 @@
 #define CONFIG_PANIC_HANG
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM         0
 #define SPD_EEPROM_ADDRESS             0x50
@@ -156,10 +149,6 @@
                        (0xf00000000ull | CONFIG_SYS_PLATFORM_SRAM_BASE)
 #define CONFIG_SYS_PLATFORM_SRAM_SIZE  (512 << 10)
 
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_NO_FLASH
-#endif
-
 /*
  * IFC Definitions
  */
@@ -211,7 +200,6 @@
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (1024 * 1024)
 
 /* 8Bit NAND Flash - K9F1G08U0B */
@@ -382,7 +370,6 @@
 
 /* I2C EEPROM */
 /* enable read and write access to EEPROM */
-#define CONFIG_CMD_EEPROM
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
@@ -416,7 +403,6 @@
  */
 #if defined(CONFIG_SYS_RAMBOOT)
 #if defined(CONFIG_RAMBOOT_SPIFLASH)
-#define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SPI_BUS     0
 #define CONFIG_ENV_SPI_CS      0
 #define CONFIG_ENV_SPI_MAX_HZ  10000000
@@ -426,7 +412,6 @@
 #define CONFIG_ENV_SIZE                0x2000
 #endif
 #elif defined(CONFIG_NAND)
-#define CONFIG_ENV_IS_IN_NAND
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_ENV_SIZE                0x2000
 #define CONFIG_ENV_ADDR                (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
@@ -436,7 +421,6 @@
 #endif
 #define CONFIG_ENV_OFFSET      CONFIG_SYS_NAND_BLOCK_SIZE
 #else
-#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR        (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE                0x2000
 #define CONFIG_ENV_SECT_SIZE   0x20000
@@ -448,16 +432,8 @@
 /*
  * Command line configuration.
  */
-#define CONFIG_CMD_ERRATA
-#define CONFIG_CMD_IRQ
 #define CONFIG_CMD_REGINFO
 
-/* Hash command with SHA acceleration supported in hardware */
-#ifdef CONFIG_FSL_CAAM
-#define CONFIG_CMD_HASH
-#define CONFIG_SHA_HW_ACCEL
-#endif
-
 /*
  * Miscellaneous configurable options
  */
@@ -496,9 +472,6 @@
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-
-#define CONFIG_BAUDRATE                115200
-
 #define CONFIG_DEF_HWCONFIG    fsl_ddr:ecc=on
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                               \