include/configs/[A-G]*: Directly use CONFIG_BOOTP_* symbols rather than CONFIG_BOOTP_...
[platform/kernel/u-boot.git] / include / configs / BAB7xx.h
index d312e6b..d8d0983 100644 (file)
@@ -28,8 +28,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/processor.h>
-
 #undef  DEBUG
 #define GTREGREAD(x) 0xffffffff         /* needed for debug */
 
 #define CONFIG_BOOTCOMMAND                                  \
     "bootp 1000000; "                                       \
     "setenv bootargs root=ramfs console=ttyS00,9600 "       \
-    "ip=$(ipaddr):$(serverip):$(rootpath):$(gatewayip):"    \
-    "$(netmask):$(hostname):eth0:none; "                    \
+    "ip=${ipaddr}:${serverip}:${rootpath}:${gatewayip}:"    \
+    "${netmask}:${hostname}:eth0:none; "                    \
     "bootm"
 
 #define CONFIG_LOADS_ECHO       0       /* echo off for serial download */
 #define CFG_LOADS_BAUD_CHANGE           /* allow baudrate changes */
 
-#define CONFIG_BOOTP_MASK       (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
 
-#define CONFIG_COMMANDS         (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_JFFS2 |\
-                                 CFG_CMD_SCSI   | CFG_CMD_IDE | CFG_CMD_DATE  |\
-                                 CFG_CMD_FDC    | CFG_CMD_ELF)
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_SCSI  
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_DATE 
+#define CONFIG_CMD_FDC   
+#define CONFIG_CMD_ELF
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
 
 /*
  * Miscellaneous configurable options
  */
 #define CONFIG_CONS_INDEX       1
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CBSIZE              1024        /* Console I/O Buffer Size */
 #else
 #define CFG_CBSIZE              256         /* Console I/O Buffer Size */
 #define CFG_FLASH_ERASE_TOUT    120000      /* Timeout for Flash Erase (in ms) */
 #define CFG_FLASH_WRITE_TOUT    500         /* Timeout for Flash Write (in ms) */
 
-#define CFG_JFFS2_FIRST_BANK    0           /* use for JFFS2 */
-#define CFG_JFFS2_NUM_BANKS     1           /* ! second bank contains U-Boot */
+/*
+ * JFFS2 partitions
+ *
+ */
+/* No command line, one static partition */
+#undef CONFIG_JFFS2_CMDLINE
+#define CONFIG_JFFS2_DEV               "nor"
+#define CONFIG_JFFS2_PART_SIZE         0xFFFFFFFF
+#define CONFIG_JFFS2_PART_OFFSET       0x00000000
+
+/* mtdparts command line support
+ *
+ * Note: fake mtd_id used, no linux mtd map file
+ */
+/*
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT         "nor0=bab7xx-0"
+#define MTDPARTS_DEFAULT       "mtdparts=bab7xx-0:-(jffs2)"
+*/
 
 #define CFG_MONITOR_BASE        CFG_FLASH_BASE
 #define CFG_MONITOR_LEN         0x40000     /* Reserve 256 kB for Monitor */
@@ -319,14 +350,14 @@ extern unsigned char   scsi_sym53c8xx_ccf;
 #define CFG_NS87308                    /* Nat Semi super-io cntr on ISA bus */
 #define CFG_NS87308_BADDR_10    1
 #define CFG_NS87308_DEVS        (CFG_NS87308_UART1   | \
-                                 CFG_NS87308_UART2   | \
-                                 CFG_NS87308_KBC1    | \
-                                 CFG_NS87308_MOUSE   | \
-                                 CFG_NS87308_FDC     | \
-                                 CFG_NS87308_RARP    | \
-                                 CFG_NS87308_GPIO    | \
-                                 CFG_NS87308_POWRMAN | \
-                                 CFG_NS87308_RTC_APC )
+                                CFG_NS87308_UART2   | \
+                                CFG_NS87308_KBC1    | \
+                                CFG_NS87308_MOUSE   | \
+                                CFG_NS87308_FDC     | \
+                                CFG_NS87308_RARP    | \
+                                CFG_NS87308_GPIO    | \
+                                CFG_NS87308_POWRMAN | \
+                                CFG_NS87308_RTC_APC )
 
 #define CFG_NS87308_PS2MOD
 #define CFG_NS87308_GPIO_BASE   0x0220
@@ -421,7 +452,7 @@ extern  unsigned long           bab7xx_get_gclk_freq (void);
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE        32    /* For all MPC74xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT        5    /* log base 2 of the above value */
 #endif
 
@@ -431,7 +462,7 @@ extern  unsigned long           bab7xx_get_gclk_freq (void);
  */
 #undef  CFG_L2
 #define L2_INIT     (L2CR_L2SIZ_HM | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \
-                     L2CR_L2OH_5   | L2CR_L2CTL   | L2CR_L2WT)
+                    L2CR_L2OH_5   | L2CR_L2CTL   | L2CR_L2WT)
 #define L2_ENABLE   (L2_INIT | L2CR_L2E)
 
 #define CFG_L2_BAB7xx