#define CONFIG_MPC8220 1
#define CONFIG_ALASKA8220 1 /* ... on Alaska board */
+#define CONFIG_HIGH_BATS 1 /* High BATs supported */
+
/* Input clock running at 30Mhz, read Hid1 for the CPU multiplier to
determine the CPU speed. */
#define CFG_MPC8220_CLKIN 30000000/* ... running at 30MHz */
+#define CFG_MPC8220_SYSPLL_VCO_MULTIPLIER 16 /* VCO multiplier can't be read from any register */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC8220 CPUs */
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
-#define CONFIG_PSC_CONSOLE 1 /* console is on PSC */
+
+/* Define this for PSC console
+#define CONFIG_PSC_CONSOLE 1
+*/
+
#define CONFIG_EXTUART_CONSOLE 1
#ifdef CONFIG_EXTUART_CONSOLE
+# define CONFIG_CONS_INDEX 1
+# define CFG_NS16550_SERIAL
# define CFG_NS16550
# define CFG_NS16550_REG_SIZE 1
# define CFG_NS16550_COM1 (CFG_CPLD_BASE + 0x1008)
+# define CFG_NS16550_CLK 18432000
#endif
#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
-
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+#define CONFIG_TIMESTAMP /* Print image info with timestamp */
+
+
/*
- * Supported commands
+ * BOOTP options
*/
-/* CONFIG_CMD_DFL includes CFG_CMD_BDI (bdinfo), CFG_CMD_LOADS (loads),
- CFG_CMD_LOADB (loadb), CFG_CMD_IMI (iminfo), CFG_CMD_FLASH
- (flinfo, erase, protect), CFG_CMD_MEMORY (md, mm, nm, mw, cp, cmp,
- crc, base, loop, mtest), CFG_CMD_ENV (printenv, setenv, saveenv),
- CFG_CMD_BOOTD (bootd), CFG_CMD_CONSOLE (coninfo), CFG_CMD_NET (bootp,
- tftpboot, rarpboot), CFG_CMD_RUN, CFG_CMD_MISC (sleep, etc),
- CFG_CMD_BSP, CFG_CMD_IMLS, CFG_CMD_FPGA */
-
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_BOOTD | \
- CFG_CMD_CACHE | \
- CFG_CMD_DIAG | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM \
- )
-/* CFG_CMD_DHCP | \ */
-/* CFG_CMD_MII | \ */
-/* CFG_CMD_PCI | \ */
-/* CFG_CMD_USB */
-
-# define CONFIG_NET_MULTI
-/*#if (CONFIG_COMMANDS & CFG_CMD_NET)
-# define CONFIG_NET_MULTI
-#else
-# undef CONFIG_NET_MULTI
-#endif*/
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SNTP
+
+
+#define CONFIG_NET_MULTI
+#define CONFIG_MII
/*
* Autobooting
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOOTARGS "root=/dev/ram rw"
#define CONFIG_ETHADDR 00:e0:0c:bc:e0:60
+#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:e0:0c:bc:e0:61
#define CONFIG_IPADDR 192.162.1.2
#define CONFIG_NETMASK 255.255.255.0
#define CFG_EEPROM_PAGE_WRITE_BITS 3
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 70
/*
-#define CFG_ENV_IS_IN_EEPROM 1
+#define CONFIG_ENV_IS_IN_EEPROM 1
#define CFG_ENV_OFFSET 0
#define CFG_ENV_SIZE 256
*/
#define CONFIG_ENV_OVERWRITE 1
#if defined CFG_ENV_IS_IN_FLASH
-#undef CFG_ENV_IS_IN_NVRAM
-#undef CFG_ENV_IS_IN_EEPROM
-#elif defined CFG_ENV_IS_IN_NVRAM
+#undef CONFIG_ENV_IS_IN_NVRAM
+#undef CONFIG_ENV_IS_IN_EEPROM
+#elif defined CONFIG_ENV_IS_IN_NVRAM
#undef CFG_ENV_IS_IN_FLASH
-#undef CFG_ENV_IS_IN_EEPROM
-#elif defined CFG_ENV_IS_IN_EEPROM
-#undef CFG_ENV_IS_IN_NVRAM
+#undef CONFIG_ENV_IS_IN_EEPROM
+#elif defined CONFIG_ENV_IS_IN_EEPROM
+#undef CONFIG_ENV_IS_IN_NVRAM
#undef CFG_ENV_IS_IN_FLASH
#endif
-#ifndef CFG_JFFS2_FIRST_SECTOR
-#define CFG_JFFS2_FIRST_SECTOR 0
-#endif
-#ifndef CFG_JFFS2_FIRST_BANK
-#define CFG_JFFS2_FIRST_BANK 0
-#endif
-#ifndef CFG_JFFS2_NUM_BANKS
-#define CFG_JFFS2_NUM_BANKS 1
-#endif
-#define CFG_JFFS2_LAST_BANK (CFG_JFFS2_FIRST_BANK + CFG_JFFS2_NUM_BANKS - 1)
-
/*
* Memory map
*/
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+/* SDRAM configuration */
+#define CFG_SDRAM_TOTAL_BANKS 2
+#define CFG_SDRAM_SPD_I2C_ADDR 0x51 /* 7bit */
+#define CFG_SDRAM_SPD_SIZE 0x40
+#define CFG_SDRAM_CAS_LATENCY 4 /* (CL=2)x2 */
+
+/* SDRAM drive strength register */
+#define CFG_SDRAM_DRIVE_STRENGTH ((DRIVE_STRENGTH_LOW << SDRAMDS_SBE_SHIFT) | \
+ (DRIVE_STRENGTH_HIGH << SDRAMDS_SBC_SHIFT) | \
+ (DRIVE_STRENGTH_LOW << SDRAMDS_SBA_SHIFT) | \
+ (DRIVE_STRENGTH_OFF << SDRAMDS_SBS_SHIFT) | \
+ (DRIVE_STRENGTH_LOW << SDRAMDS_SBD_SHIFT))
+
/*
* Ethernet configuration
*/
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC8220 CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
#define CFG_HID0_FINAL HID0_ICE
+/*
+ * JFFS2 partitions
+ */
+
+/* No command line, one static partition */
+/*
+#undef CONFIG_JFFS2_CMDLINE
+#define CONFIG_JFFS2_DEV "nor0"
+#define CONFIG_JFFS2_PART_SIZE 0x00400000
+#define CONFIG_JFFS2_PART_OFFSET 0x00000000
+*/
+
+/* mtdparts command line support */
+/*
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT "nor0=alaska-0"
+#define MTDPARTS_DEFAULT "mtdparts=alaska-0:4m(user)"
+*/
+
#endif /* __CONFIG_H */
projects / platform / kernel / u-boot.git / blobdiff