rename CFG_ENV macros to CONFIG_ENV

[platform/kernel/u-boot.git] / include / configs / A3000.h

diff --git a/include/configs/A3000.h b/include/configs/A3000.h
index f933ea8..cee5560 100644 (file)
--- a/include/configs/A3000.h
+++ b/include/configs/A3000.h
@@ -52,23 +52,20 @@
 
 #define CONFIG_BOOTDELAY       5
 
-#if 0
-#define CONFIG_COMMANDS                ( CONFIG_CMD_DFL | \
-                                 CFG_CMD_BEDBUG | \
-                                 CFG_CMD_BSP    | \
-                                 CFG_CMD_ELF    | \
-                                 CFG_CMD_I2C    | \
-                                 CFG_CMD_FLASH | \
-                                 CFG_CMD_BEDBUG | \
-                                 CFG_CMD_NET    | \
-                                 CFG_CMD_PCI )
-#endif
 
-#define CONFIG_COMMANDS                ( CONFIG_CMD_DFL )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any)      */
 
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
 
 
 /*
@@ -90,7 +87,7 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_HARD_I2C                1               /* To enable I2C support        */
-#undef  CONFIG_SOFT_I2C                                /* I2C bit-banged               */
+#undef CONFIG_SOFT_I2C                         /* I2C bit-banged               */
 #define CFG_I2C_SPEED          400000          /* I2C speed and slave address  */
 #define CFG_I2C_SLAVE          0x7F
 
@@ -98,15 +95,15 @@
  * PCI stuff
  *-----------------------------------------------------------------------
  */
-#define CONFIG_PCI                     /* include pci support          */
-#undef CONFIG_PCI_PNP
-#define CONFIG_PCI_SCAN_SHOW    /* print pci devices @ startup  */
+#define CONFIG_PCI                     /* include pci support          */
+#undef CONFIG_PCI_PNP
+#define CONFIG_PCI_SCAN_SHOW           /* print pci devices @ startup  */
 
 #define CONFIG_NET_MULTI               /* Multi ethernet cards support */
 
 /* #define CONFIG_TULIP */
 /* #define CONFIG_EEPRO100 */
-#define CONFIG_NATSEMI  
+#define CONFIG_NATSEMI
 
 #define PCI_ENET0_IOADDR               0x80000000
 #define PCI_ENET0_MEMADDR              0x80000000
@@ -114,6 +111,8 @@
 #define PCI_ENET1_MEMADDR              0x81000000
 #define PCI_ENET2_IOADDR               0x82000000
 #define PCI_ENET2_MEMADDR              0x82000000
+#define PCI_ENET3_IOADDR               0x83000000
+#define PCI_ENET3_MEMADDR              0x83000000
 
 
 /*-----------------------------------------------------------------------
@@ -121,11 +120,11 @@
  * (Set up by the startup code)
  * Please note that CFG_SDRAM_BASE _must_ start at 0
  */
-#define CFG_SDRAM_BASE     0x00000000
+#define CFG_SDRAM_BASE                 0x00000000
 
-#define CFG_FLASH_BASE0_PRELIM      0xFF000000      /* FLASH bank on RCS#0 */
-#define CFG_FLASH_BASE1_PRELIM      0xFF000000      /* FLASH bank on RCS#1 */
-#define CFG_FLASH_BASE                         CFG_FLASH_BASE0_PRELIM
+#define CFG_FLASH_BASE0_PRELIM         0xFF000000      /* FLASH bank on RCS#0 */
+#define CFG_FLASH_BASE1_PRELIM         0xFF000000      /* FLASH bank on RCS#1 */
+#define CFG_FLASH_BASE                 CFG_FLASH_BASE0_PRELIM
 #define CFG_FLASH_BANKS                        { CFG_FLASH_BASE0_PRELIM }
 
 /* even though FLASHP_BASE is FF800000, with 4MB is RCS0, the
@@ -171,7 +170,7 @@
  * Definitions for initial stack pointer and data area
  */
 
-/* #define CFG_MONITOR_BASE        TEXT_BASE */
+/* #define CFG_MONITOR_BASE       TEXT_BASE */
 /*#define CFG_GBL_DATA_SIZE    256*/
 #define CFG_GBL_DATA_SIZE      128
 #define CFG_INIT_RAM_ADDR     0x40000000
@@ -193,7 +192,7 @@
         */
 #define CFG_ROMNAL         7
 #define CFG_ROMFAL         11
-#define CFG_DBUS_SIZE       0x3
+#define CFG_DBUS_SIZE      0x3
 
        /* Bit-field values for MCCR2.
         */
@@ -219,7 +218,7 @@
 #define CFG_EXTROM         1
 #define CFG_REGDIMM        0
 
-#define CFG_PGMAX           0x32 /* how long the 8240 reatins the currently accessed page in memory FIXME: was 0x32*/
+#define CFG_PGMAX          0x32 /* how long the 8240 reatins the currently accessed page in memory FIXME: was 0x32*/
 
 #define CFG_SDRAM_DSCD 0x20    /* SDRAM data in sample clock delay - note bottom 3 bits MUST be 0 */
 
@@ -298,16 +297,16 @@
        /* Warining: environment is not EMBEDDED in the U-Boot code.
         * It's stored in flash separately.
         */
-#define CFG_ENV_IS_IN_FLASH        1
-#define CFG_ENV_ADDR           0xFFFE0000
-#define CFG_ENV_SIZE           0x00020000 /* Size of the Environment           */
-#define CFG_ENV_SECT_SIZE      0x00020000 /* Size of the Environment Sector    */
+#define CONFIG_ENV_IS_IN_FLASH     1
+#define CONFIG_ENV_ADDR                0xFFFE0000
+#define CONFIG_ENV_SIZE                0x00020000 /* Size of the Environment           */
+#define CONFIG_ENV_SECT_SIZE   0x00020000 /* Size of the Environment Sector    */
 
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE     32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #  define CFG_CACHELINE_SHIFT  5       /* log base 2 of the above value        */
 #endif
 
@@ -319,6 +318,4 @@
 #define BOOTFLAG_COLD          0x01    /* Normal Power-On: Boot from FLASH     */
 #define BOOTFLAG_WARM          0x02    /* Software reboot                      */
 
-
-
 #endif /* __CONFIG_H */