#include <fdtdec.h>
#include <membuff.h>
#include <linux/list.h>
+#include <linux/build_bug.h>
+#include <asm-offsets.h>
struct acpi_ctx;
struct driver_rt;
/**
* @ram_top: top address of RAM used by U-Boot
*/
- unsigned long ram_top;
+ phys_addr_t ram_top;
/**
* @relocaddr: start address of U-Boot in RAM
*
*/
struct udevice *dm_root_f;
/**
- * @uclass_root: head of core tree
+ * @uclass_root_s:
+ * head of core tree when uclasses are not in read-only memory.
+ *
+ * When uclasses are in read-only memory, @uclass_root_s is not used and
+ * @uclass_root points to the root node generated by dtoc.
+ */
+ struct list_head uclass_root_s;
+ /**
+ * @uclass_root:
+ * pointer to head of core tree, if uclasses are in read-only memory and
+ * cannot be adjusted to use @uclass_root as a list head.
+ *
+ * When not in read-only memory, @uclass_root_s is used to hold the
+ * uclass root, and @uclass_root points to the address of
+ * @uclass_root_s.
*/
- struct list_head uclass_root;
-# if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct list_head *uclass_root;
+# if CONFIG_IS_ENABLED(OF_PLATDATA_DRIVER_RT)
/** @dm_driver_rt: Dynamic info about the driver */
struct driver_rt *dm_driver_rt;
# endif
+#if CONFIG_IS_ENABLED(OF_PLATDATA_RT)
+ /** @dm_udevice_rt: Dynamic info about the udevice */
+ struct udevice_rt *dm_udevice_rt;
+ /**
+ * @dm_priv_base: Base address of the priv/plat region used when
+ * udevices and uclasses are in read-only memory. This is NULL if not
+ * used
+ */
+ void *dm_priv_base;
+# endif
#endif
#ifdef CONFIG_TIMER
/**
*/
void *trace_buff;
#endif
-#if defined(CONFIG_SYS_I2C)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
/**
* @cur_i2c_bus: currently used I2C bus
*/
* This value is used as logging level for continuation messages.
*/
int logl_prev;
+ /**
+ * @log_cont: Previous log line did not finished wtih \n
+ *
+ * This allows for chained log messages on the same line
+ */
+ bool log_cont;
#endif
#if CONFIG_IS_ENABLED(BLOBLIST)
/**
* @new_bloblist: relocated blob list information
*/
struct bloblist_hdr *new_bloblist;
-# ifdef CONFIG_SPL
+#endif
+#if CONFIG_IS_ENABLED(HANDOFF)
/**
* @spl_handoff: SPL hand-off information
*/
struct spl_handoff *spl_handoff;
-# endif
#endif
#if defined(CONFIG_TRANSLATION_OFFSET)
/**
*/
struct acpi_ctx *acpi_ctx;
#endif
+#if CONFIG_IS_ENABLED(GENERATE_SMBIOS_TABLE)
+ /**
+ * @smbios_version: Points to SMBIOS type 0 version
+ */
+ char *smbios_version;
+#endif
};
+#ifndef DO_DEPS_ONLY
+static_assert(sizeof(struct global_data) == GD_SIZE);
+#endif
/**
* gd_board_type() - retrieve board type
#define gd_set_of_root(_root)
#endif
-#if CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_PLATDATA_DRIVER_RT)
#define gd_set_dm_driver_rt(dyn) gd->dm_driver_rt = dyn
#define gd_dm_driver_rt() gd->dm_driver_rt
#else
#define gd_dm_driver_rt() NULL
#endif
+#if CONFIG_IS_ENABLED(OF_PLATDATA_RT)
+#define gd_set_dm_udevice_rt(dyn) gd->dm_udevice_rt = dyn
+#define gd_dm_udevice_rt() gd->dm_udevice_rt
+#define gd_set_dm_priv_base(dyn) gd->dm_priv_base = dyn
+#define gd_dm_priv_base() gd->dm_priv_base
+#else
+#define gd_set_dm_udevice_rt(dyn)
+#define gd_dm_udevice_rt() NULL
+#define gd_set_dm_priv_base(dyn)
+#define gd_dm_priv_base() NULL
+#endif
+
#ifdef CONFIG_GENERATE_ACPI_TABLE
#define gd_acpi_ctx() gd->acpi_ctx
#else
*/
GD_FLG_RECORD = 0x01000,
/**
+ * @GD_FLG_RECORD_OVF: record console overflow
+ */
+ GD_FLG_RECORD_OVF = 0x02000,
+ /**
* @GD_FLG_ENV_DEFAULT: default variable flag
*/
- GD_FLG_ENV_DEFAULT = 0x02000,
+ GD_FLG_ENV_DEFAULT = 0x04000,
/**
* @GD_FLG_SPL_EARLY_INIT: early SPL initialization is done
*/
- GD_FLG_SPL_EARLY_INIT = 0x04000,
+ GD_FLG_SPL_EARLY_INIT = 0x08000,
/**
* @GD_FLG_LOG_READY: log system is ready for use
*/
- GD_FLG_LOG_READY = 0x08000,
+ GD_FLG_LOG_READY = 0x10000,
/**
* @GD_FLG_WDT_READY: watchdog is ready for use
*/
- GD_FLG_WDT_READY = 0x10000,
+ GD_FLG_WDT_READY = 0x20000,
/**
* @GD_FLG_SKIP_LL_INIT: don't perform low-level initialization
*/
- GD_FLG_SKIP_LL_INIT = 0x20000,
+ GD_FLG_SKIP_LL_INIT = 0x40000,
/**
* @GD_FLG_SMP_READY: SMP initialization is complete
*/
- GD_FLG_SMP_READY = 0x40000,
+ GD_FLG_SMP_READY = 0x80000,
};
#endif /* __ASSEMBLY__ */