fast_passive_parallel,
/* fast passive parallel with security (FPPS) */
fast_passive_parallel_security,
+ /* secure device manager (SDM) mailbox */
+ secure_device_manager_mailbox,
/* insert all new types before this */
max_altera_iface_type,
};
Altera_StratixV,
/* SoCFPGA Family */
Altera_SoCFPGA,
+ /* Intel FPGA Family with SDM (Secure Device Manager) Mailbox */
+ Intel_FPGA_SDM_Mailbox,
/* Add new models here */
int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size);
#endif
+#ifdef CONFIG_FPGA_INTEL_SDM_MAILBOX
+int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data,
+ size_t rbf_size);
+#endif
+
#endif /* _ALTERA_H_ */