+2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
+
+2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
+
+2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
+
+2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
+
+2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * opcode/aarch64.h (AARCH64_FEATURE_SVE2
+ AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
+ AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
+ feature macros.
+
+2019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
+ Faraz Shahbazker <fshahbazker@wavecomp.com>
+
+ * opcode/mips.h (ASE_EVA_R6): New macro.
+ (M_LLWPE_AB, M_SCWPE_AB): New enum values.
+
+2019-05-01 Sudakshina Das <sudi.das@arm.com>
+
+ * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
+ (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
+
+2019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
+ Faraz Shahbazker <fshahbazker@wavecomp.com>
+
+ * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
+ (M_SCWP_AB, M_SCDP_AB): Likewise.
+
+2019-04-25 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
+
+2019-04-15 Sudakshina Das <sudi.das@arm.com>
+
+ * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
+
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.