/* Target-dependent code for the Xtensa port of GDB, the GNU debugger.
- Copyright (C) 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011
- Free Software Foundation, Inc.
+ Copyright (C) 2003-2014 Free Software Foundation, Inc.
This file is part of GDB.
#include "dwarf2.h"
#include "dwarf2-frame.h"
#include "dwarf2loc.h"
-#include "frame.h"
#include "frame-base.h"
#include "frame-unwind.h"
#include "command.h"
#include "gdbcmd.h"
-#include "gdb_assert.h"
#include "xtensa-isa.h"
#include "xtensa-tdep.h"
#include "xtensa-config.h"
-static int xtensa_debug_level = 0;
+static unsigned int xtensa_debug_level = 0;
#define DEBUGWARN(args...) \
if (xtensa_debug_level > 0) \
#define PS_WOE (1<<18)
#define PS_EXC (1<<4)
-static inline int
+static int
windowing_enabled (struct gdbarch *gdbarch, unsigned int ps)
{
/* If we know CALL0 ABI is set explicitly, say it is Call0. */
}
/* Read Xtensa register directly from the hardware. */
-static inline unsigned long
+static unsigned long
xtensa_read_register (int regnum)
{
ULONGEST value;
}
/* Write Xtensa register directly to the hardware. */
-static inline void
+static void
xtensa_write_register (int regnum, ULONGEST value)
{
regcache_raw_write_unsigned (get_current_regcache (), regnum, value);
if (tp == NULL)
{
- char *name = xmalloc (16);
+ char *name = xstrprintf ("int%d", size * 8);
tp = xmalloc (sizeof (struct ctype_cache));
tp->next = tdep->type_entries;
tdep->type_entries = tp;
tp->size = size;
-
- sprintf (name, "int%d", size * 8);
tp->virtual_type
- = arch_integer_type (gdbarch, size * 8, 1, xstrdup (name));
+ = arch_integer_type (gdbarch, size * 8, 1, name);
+ xfree (name);
}
reg->ctype = tp->virtual_type;
/* Read a tie state or mapped registers. Read the masked areas
of the registers and assemble them into a single value. */
-static void
+static enum register_status
xtensa_register_read_masked (struct regcache *regcache,
xtensa_register_t *reg, gdb_byte *buffer)
{
int r = mask->mask[i].reg_num;
if (r >= 0)
{
+ enum register_status status;
ULONGEST val;
- regcache_cooked_read_unsigned (regcache, r, &val);
+
+ status = regcache_cooked_read_unsigned (regcache, r, &val);
+ if (status != REG_VALID)
+ return status;
regval = (unsigned int) val;
}
else
buffer[i] = mem & 0xff;
mem >>= 8;
}
+
+ return REG_VALID;
}
/* Read pseudo registers. */
-static void
+static enum register_status
xtensa_pseudo_register_read (struct gdbarch *gdbarch,
struct regcache *regcache,
int regnum,
&& (regnum <= gdbarch_tdep (gdbarch)->a0_base + 15))
{
gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
+ enum register_status status;
- regcache_raw_read (regcache, gdbarch_tdep (gdbarch)->wb_regnum, buf);
+ status = regcache_raw_read (regcache,
+ gdbarch_tdep (gdbarch)->wb_regnum,
+ buf);
+ if (status != REG_VALID)
+ return status;
regnum = arreg_number (gdbarch, regnum,
extract_unsigned_integer (buf, 4, byte_order));
}
/* We can always read non-pseudo registers. */
if (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch))
- regcache_raw_read (regcache, regnum, buffer);
-
+ return regcache_raw_read (regcache, regnum, buffer);
/* We have to find out how to deal with priveleged registers.
Let's treat them as pseudo-registers, but we cannot read/write them. */
buffer[1] = (gdb_byte)0;
buffer[2] = (gdb_byte)0;
buffer[3] = (gdb_byte)0;
+ return REG_VALID;
}
/* Pseudo registers. */
else if (regnum >= 0
{
warning (_("cannot read register %s"),
xtensa_register_name (gdbarch, regnum));
- return;
+ return REG_VALID;
}
}
if (flags & xtTargetFlagsUseFetchStore)
{
warning (_("cannot read register"));
- return;
+ return REG_VALID;
}
/* On some targets (esp. simulators), we can always read the reg. */
else if ((flags & xtTargetFlagsNonVisibleRegs) == 0)
{
warning (_("cannot read register"));
- return;
+ return REG_VALID;
}
}
/* We can always read mapped registers. */
else if (type == xtRegisterTypeMapped || type == xtRegisterTypeTieState)
- {
- xtensa_register_read_masked (regcache, reg, buffer);
- return;
- }
+ return xtensa_register_read_masked (regcache, reg, buffer);
/* Assume that we can read the register. */
- regcache_raw_read (regcache, regnum, buffer);
+ return regcache_raw_read (regcache, regnum, buffer);
}
else
internal_error (__FILE__, __LINE__,
&& (regnum <= gdbarch_tdep (gdbarch)->a0_base + 15))
{
gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
- unsigned int wb;
regcache_raw_read (regcache,
gdbarch_tdep (gdbarch)->wb_regnum, buf);
_("invalid register number %d"), regnum);
}
-/* Return a character representation of a hex-decimal digit.
- The value of "xdigit" is assumed to be in a range [0..15]. */
-
-static inline
-char xtensa_hextochar (int xdigit)
-{
- return '0' + xdigit;
-}
-
static struct reggroup *xtensa_ar_reggroup;
static struct reggroup *xtensa_user_reggroup;
static struct reggroup *xtensa_vectra_reggroup;
for (i = 0; i < XTENSA_MAX_COPROCESSOR; i++)
{
- cpname[2] = xtensa_hextochar (i);
+ cpname[2] = '0' + i;
xtensa_cp[i] = reggroup_new (cpname, USER_REGGROUP);
}
}
if (group == restore_reggroup)
return (regnum < gdbarch_num_regs (gdbarch)
&& (reg->flags & SAVE_REST_FLAGS) == SAVE_REST_VALID);
- if ((cp_number = xtensa_coprocessor_register_group (group)) >= 0)
+ cp_number = xtensa_coprocessor_register_group (group);
+ if (cp_number >= 0)
return rg & (xtRegisterGroupCP0 << cp_number);
else
return 1;
};
-/* Return the appropriate register set for the core
- section identified by SECT_NAME and SECT_SIZE. */
+/* Iterate over supported core file register note sections. */
-static const struct regset *
-xtensa_regset_from_core_section (struct gdbarch *core_arch,
- const char *sect_name,
- size_t sect_size)
+static void
+xtensa_iterate_over_regset_sections (struct gdbarch *gdbarch,
+ iterate_over_regset_sections_cb *cb,
+ void *cb_data,
+ const struct regcache *regcache)
{
- DEBUGTRACE ("xtensa_regset_from_core_section "
- "(..., sect_name==\"%s\", sect_size==%x)\n",
- sect_name, (unsigned int) sect_size);
+ DEBUGTRACE ("xtensa_iterate_over_regset_sections\n");
- if (strcmp (sect_name, ".reg") == 0
- && sect_size >= sizeof(xtensa_elf_gregset_t))
- return &xtensa_gregset;
-
- return NULL;
+ cb (".reg", sizeof (xtensa_elf_gregset_t), &xtensa_gregset,
+ NULL, cb_data);
}
CORE_ADDR start_addr;
xtensa_isa isa;
xtensa_insnbuf ins, slot;
- char ibuf[XTENSA_ISA_BSZ];
+ gdb_byte ibuf[XTENSA_ISA_BSZ];
CORE_ADDR ia, bt, ba;
xtensa_format ifmt;
int ilen, islots, is;
/* Report a problem with prologue analysis while doing backtracing.
But, do it only once to avoid annoyng repeated messages. */
-static inline void warning_once ()
+static void
+warning_once (void)
{
if (xtensa_session_once_reported == 0)
warning (_("\
xtensa_unwind =
{
NORMAL_FRAME,
+ default_frame_unwind_stop_reason,
xtensa_frame_this_id,
xtensa_frame_prev_register,
NULL,
static enum return_value_convention
xtensa_return_value (struct gdbarch *gdbarch,
- struct type *func_type,
+ struct value *function,
struct type *valtype,
struct regcache *regcache,
gdb_byte *readbuf,
#define RETURN_RET goto done
xtensa_isa isa;
xtensa_insnbuf ins, slot;
- char ibuf[XTENSA_ISA_BSZ];
+ gdb_byte ibuf[XTENSA_ISA_BSZ];
CORE_ADDR ia, bt, ba;
xtensa_format ifmt;
int ilen, islots, is;
CORE_ADDR ia; /* Current insn address in prologue. */
CORE_ADDR ba = 0; /* Current address at base of insn buffer. */
CORE_ADDR bt; /* Current address at top+1 of insn buffer. */
- char ibuf[XTENSA_ISA_BSZ];/* Instruction buffer for decoding prologue. */
+ gdb_byte ibuf[XTENSA_ISA_BSZ];/* Instruction buffer for decoding prologue. */
xtensa_isa isa; /* libisa ISA handle. */
xtensa_insnbuf ins, slot; /* libisa handle to decoded insn, slot. */
xtensa_format ifmt; /* libisa instruction format. */
too bad. */
int i;
- for (i = 0;
- (i < C0_NREGS) &&
- (i == C0_RA || cache->c0.c0_rt[i].fr_reg != C0_RA);
+ for (i = 0;
+ (i < C0_NREGS)
+ && (i == C0_RA || cache->c0.c0_rt[i].fr_reg != C0_RA);
++i);
if (i >= C0_NREGS && cache->c0.c0_rt[C0_RA].fr_reg == C0_RA)
i = C0_RA;
{
xtensa_isa isa;
xtensa_insnbuf ins, slot;
- char ibuf[XTENSA_ISA_BSZ];
+ gdb_byte ibuf[XTENSA_ISA_BSZ];
CORE_ADDR ia, bt, ba;
xtensa_format ifmt;
int ilen, islots, is;
int fail = 0;
void (*func) (struct gdbarch *, int, int, int, CORE_ADDR);
- int at, as, offset;
- int num_operands;
+ uint32_t at, as, offset;
/* WindowUnderflow12 = true, when inside _WindowUnderflow12. */
int WindowUnderflow12 = (current_pc & 0x1ff) >= 0x140;
xtensa_add_reggroups (gdbarch);
set_gdbarch_register_reggroup_p (gdbarch, xtensa_register_reggroup_p);
- set_gdbarch_regset_from_core_section (gdbarch,
- xtensa_regset_from_core_section);
+ set_gdbarch_iterate_over_regset_sections
+ (gdbarch, xtensa_iterate_over_regset_sections);
set_solib_svr4_fetch_link_map_offsets
(gdbarch, svr4_ilp32_fetch_link_map_offsets);
gdbarch_register (bfd_arch_xtensa, xtensa_gdbarch_init, xtensa_dump_tdep);
xtensa_init_reggroups ();
- add_setshow_zinteger_cmd ("xtensa",
- class_maintenance,
- &xtensa_debug_level,
+ add_setshow_zuinteger_cmd ("xtensa",
+ class_maintenance,
+ &xtensa_debug_level,
_("Set Xtensa debugging."),
_("Show Xtensa debugging."), _("\
When non-zero, Xtensa-specific debugging is enabled. \
Can be 1, 2, 3, or 4 indicating the level of debugging."),
- NULL,
- NULL,
- &setdebuglist, &showdebuglist);
+ NULL,
+ NULL,
+ &setdebuglist, &showdebuglist);
}
projects / platform / upstream / binutils.git / blobdiff