.EXPORT integer_load_short_memory,CODE
.EXPORT integer_store_short_memory,CODE
.EXPORT immediate_tests,CODE
- .EXPORT branch_tests,CODE
+ .EXPORT branch_tests_1,CODE
+ .EXPORT branch_tests_2,CODE
.EXPORT movb_tests,CODE
.EXPORT movb_nullified_tests,CODE
.EXPORT movib_tests,CODE
.EXPORT movib_nullified_tests,CODE
- .EXPORT comb_tests,CODE
- .EXPORT comb_nullified_tests,CODE
- .EXPORT comib_tests,CODE
- .EXPORT comib_nullified_tests,CODE
- .EXPORT addb_tests,CODE
- .EXPORT addb_nullified_tests,CODE
- .EXPORT addib_tests,CODE
- .EXPORT addib_nullified_tests,CODE
+ .EXPORT comb_tests_1,CODE
+ .EXPORT comb_tests_2,CODE
+ .EXPORT comb_nullified_tests_1,CODE
+ .EXPORT comb_nullified_tests_2,CODE
+ .EXPORT comib_tests_1,CODE
+ .EXPORT comib_tests_2,CODE
+ .EXPORT comib_nullified_tests_1,CODE
+ .EXPORT comib_nullified_tests_2,CODE
+ .EXPORT addb_tests_1,CODE
+ .EXPORT addb_tests_2,CODE
+ .EXPORT addb_nullified_tests_1,CODE
+ .EXPORT addb_nullified_tests_2,CODE
+ .EXPORT addib_tests_1,CODE
+ .EXPORT addib_tests_2,CODE
+ .EXPORT addib_nullified_tests_1,CODE
+ .EXPORT addib_nullified_tests_2,CODE
.EXPORT bb_tests,CODE
.EXPORT add_tests,CODE
.EXPORT addl_tests,CODE
.EXPORT fmpy_tests,CODE
.EXPORT fdiv_tests,CODE
.EXPORT frem_tests,CODE
- .EXPORT fcmp_sgl_tests,CODE
- .EXPORT fcmp_dbl_tests,CODE
- .EXPORT fcmp_quad_tests,CODE
+ .EXPORT fcmp_sgl_tests_1,CODE
+ .EXPORT fcmp_sgl_tests_2,CODE
+ .EXPORT fcmp_sgl_tests_3,CODE
+ .EXPORT fcmp_sgl_tests_4,CODE
+ .EXPORT fcmp_dbl_tests_1,CODE
+ .EXPORT fcmp_dbl_tests_2,CODE
+ .EXPORT fcmp_dbl_tests_3,CODE
+ .EXPORT fcmp_dbl_tests_4,CODE
+ .EXPORT fcmp_quad_tests_1,CODE
+ .EXPORT fcmp_quad_tests_2,CODE
+ .EXPORT fcmp_quad_tests_3,CODE
+ .EXPORT fcmp_quad_tests_4,CODE
.EXPORT fmpy_addsub_tests,CODE
.EXPORT xmpyu_tests,CODE
.EXPORT special_tests,CODE
.EXPORT copr_indexing_load,CODE
.EXPORT copr_indexing_store,CODE
.EXPORT copr_short_memory,CODE
+ .EXPORT fmemLRbug_tests_1,CODE
+ .EXPORT fmemLRbug_tests_2,CODE
+ .EXPORT fmemLRbug_tests_3,CODE
+ .EXPORT fmemLRbug_tests_4,CODE
.EXPORT main,CODE
.EXPORT main,ENTRY,PRIV_LEV=3,RTNVAL=GR
main
; Lots of branch instructions.
; blr with %r0 as return pointer should really be just br <target>,
; but the assemblers can't handle it.
-branch_tests
+branch_tests_1
bl main,%r2
bl,n main,%r2
b main
blr,n %r4,%r2
blr %r4,%r0
blr,n %r4,%r0
+branch_tests_2
bv 0(%r2)
bv,n 0(%r2)
be 0x1234(%sr1,%r2)
movib,>=,n 5,%r26,movib_tests
movib,ev,n 5,%r26,movib_tests
-comb_tests
- comb %r0,%r4,comb_tests
- comb,= %r0,%r4,comb_tests
- comb,< %r0,%r4,comb_tests
- comb,<= %r0,%r4,comb_tests
- comb,<< %r0,%r4,comb_tests
- comb,<<= %r0,%r4,comb_tests
- comb,sv %r0,%r4,comb_tests
- comb,od %r0,%r4,comb_tests
- comb,tr %r0,%r4,comb_tests
- comb,<> %r0,%r4,comb_tests
- comb,>= %r0,%r4,comb_tests
- comb,> %r0,%r4,comb_tests
- comb,>>= %r0,%r4,comb_tests
- comb,>> %r0,%r4,comb_tests
- comb,nsv %r0,%r4,comb_tests
- comb,ev %r0,%r4,comb_tests
-comb_nullified_tests
- comb,n %r0,%r4,comb_tests
- comb,=,n %r0,%r4,comb_tests
- comb,<,n %r0,%r4,comb_tests
- comb,<=,n %r0,%r4,comb_tests
- comb,<<,n %r0,%r4,comb_tests
- comb,<<=,n %r0,%r4,comb_tests
- comb,sv,n %r0,%r4,comb_tests
- comb,od,n %r0,%r4,comb_tests
- comb,tr,n %r0,%r4,comb_tests
- comb,<>,n %r0,%r4,comb_tests
- comb,>=,n %r0,%r4,comb_tests
- comb,>,n %r0,%r4,comb_tests
- comb,>>=,n %r0,%r4,comb_tests
- comb,>>,n %r0,%r4,comb_tests
- comb,nsv,n %r0,%r4,comb_tests
- comb,ev,n %r0,%r4,comb_tests
-
-comib_tests
- comib 0,%r4,comib_tests
- comib,< 0,%r4,comib_tests
- comib,<= 0,%r4,comib_tests
- comib,<< 0,%r4,comib_tests
- comib,<<= 0,%r4,comib_tests
- comib,sv 0,%r4,comib_tests
- comib,od 0,%r4,comib_tests
- comib,tr 0,%r4,comib_tests
- comib,<> 0,%r4,comib_tests
- comib,>= 0,%r4,comib_tests
- comib,> 0,%r4,comib_tests
- comib,>>= 0,%r4,comib_tests
- comib,>> 0,%r4,comib_tests
- comib,nsv 0,%r4,comib_tests
- comib,ev 0,%r4,comb_tests
-
-comib_nullified_tests
- comib,n 0,%r4,comib_tests
- comib,=,n 0,%r4,comib_tests
- comib,<,n 0,%r4,comib_tests
- comib,<=,n 0,%r4,comib_tests
- comib,<<,n 0,%r4,comib_tests
- comib,<<=,n 0,%r4,comib_tests
- comib,sv,n 0,%r4,comib_tests
- comib,od,n 0,%r4,comib_tests
- comib,tr,n 0,%r4,comib_tests
- comib,<>,n 0,%r4,comib_tests
- comib,>=,n 0,%r4,comib_tests
- comib,>,n 0,%r4,comib_tests
- comib,>>=,n 0,%r4,comib_tests
- comib,>>,n 0,%r4,comib_tests
- comib,nsv,n 0,%r4,comib_tests
- comib,ev,n 0,%r4,comib_tests
-
-
-
-addb_tests
- addb %r1,%r4,addb_tests
- addb,= %r1,%r4,addb_tests
- addb,< %r1,%r4,addb_tests
- addb,<= %r1,%r4,addb_tests
- addb,nuv %r1,%r4,addb_tests
- addb,znv %r1,%r4,addb_tests
- addb,sv %r1,%r4,addb_tests
- addb,od %r1,%r4,addb_tests
- addb,tr %r1,%r4,addb_tests
- addb,<> %r1,%r4,addb_tests
- addb,>= %r1,%r4,addb_tests
- addb,> %r1,%r4,addb_tests
- addb,uv %r1,%r4,addb_tests
- addb,vnz %r1,%r4,addb_tests
- addb,nsv %r1,%r4,addb_tests
- addb,ev %r1,%r4,addb_tests
-addb_nullified_tests
- addb,n %r1,%r4,addb_tests
- addb,=,n %r1,%r4,addb_tests
- addb,<,n %r1,%r4,addb_tests
- addb,<=,n %r1,%r4,addb_tests
- addb,nuv,n %r1,%r4,addb_tests
- addb,znv,n %r1,%r4,addb_tests
- addb,sv,n %r1,%r4,addb_tests
- addb,od,n %r1,%r4,addb_tests
- addb,tr,n %r1,%r4,addb_tests
- addb,<>,n %r1,%r4,addb_tests
- addb,>=,n %r1,%r4,addb_tests
- addb,>,n %r1,%r4,addb_tests
- addb,uv,n %r1,%r4,addb_tests
- addb,vnz,n %r1,%r4,addb_tests
- addb,nsv,n %r1,%r4,addb_tests
- addb,ev,n %r1,%r4,addb_tests
-
-addib_tests
- addib -1,%r4,addib_tests
- addib,= -1,%r4,addib_tests
- addib,< -1,%r4,addib_tests
- addib,<= -1,%r4,addib_tests
- addib,nuv -1,%r4,addib_tests
- addib,znv -1,%r4,addib_tests
- addib,sv -1,%r4,addib_tests
- addib,od -1,%r4,addib_tests
- addib,tr -1,%r4,addib_tests
- addib,<> -1,%r4,addib_tests
- addib,>= -1,%r4,addib_tests
- addib,> -1,%r4,addib_tests
- addib,uv -1,%r4,addib_tests
- addib,vnz -1,%r4,addib_tests
- addib,nsv -1,%r4,addib_tests
- addib,ev -1,%r4,addib_tests
-
-addib_nullified_tests
- addib,n -1,%r4,addib_tests
- addib,=,n -1,%r4,addib_tests
- addib,<,n -1,%r4,addib_tests
- addib,<=,n -1,%r4,addib_tests
- addib,nuv,n -1,%r4,addib_tests
- addib,znv,n -1,%r4,addib_tests
- addib,sv,n -1,%r4,addib_tests
- addib,od,n -1,%r4,addib_tests
- addib,tr,n -1,%r4,addib_tests
- addib,<>,n -1,%r4,addib_tests
- addib,>=,n -1,%r4,addib_tests
- addib,>,n -1,%r4,addib_tests
- addib,uv,n -1,%r4,addib_tests
- addib,vnz,n -1,%r4,addib_tests
- addib,nsv,n -1,%r4,addib_tests
- addib,ev,n -1,%r4,addib_tests
+comb_tests_1
+ comb %r0,%r4,comb_tests_1
+ comb,= %r0,%r4,comb_tests_1
+ comb,< %r0,%r4,comb_tests_1
+ comb,<= %r0,%r4,comb_tests_1
+ comb,<< %r0,%r4,comb_tests_1
+ comb,<<= %r0,%r4,comb_tests_1
+ comb,sv %r0,%r4,comb_tests_1
+ comb,od %r0,%r4,comb_tests_1
+
+comb_tests_2
+ comb,tr %r0,%r4,comb_tests_2
+ comb,<> %r0,%r4,comb_tests_2
+ comb,>= %r0,%r4,comb_tests_2
+ comb,> %r0,%r4,comb_tests_2
+ comb,>>= %r0,%r4,comb_tests_2
+ comb,>> %r0,%r4,comb_tests_2
+ comb,nsv %r0,%r4,comb_tests_2
+ comb,ev %r0,%r4,comb_tests_2
+
+comb_nullified_tests_1
+ comb,n %r0,%r4,comb_tests_1
+ comb,=,n %r0,%r4,comb_tests_1
+ comb,<,n %r0,%r4,comb_tests_1
+ comb,<=,n %r0,%r4,comb_tests_1
+ comb,<<,n %r0,%r4,comb_tests_1
+ comb,<<=,n %r0,%r4,comb_tests_1
+ comb,sv,n %r0,%r4,comb_tests_1
+ comb,od,n %r0,%r4,comb_tests_1
+
+comb_nullified_tests_2
+ comb,tr,n %r0,%r4,comb_tests_2
+ comb,<>,n %r0,%r4,comb_tests_2
+ comb,>=,n %r0,%r4,comb_tests_2
+ comb,>,n %r0,%r4,comb_tests_2
+ comb,>>=,n %r0,%r4,comb_tests_2
+ comb,>>,n %r0,%r4,comb_tests_2
+ comb,nsv,n %r0,%r4,comb_tests_2
+ comb,ev,n %r0,%r4,comb_tests_2
+
+comib_tests_1
+ comib 0,%r4,comib_tests_1
+ comib,= 0,%r4,comib_tests_1
+ comib,< 0,%r4,comib_tests_1
+ comib,<= 0,%r4,comib_tests_1
+ comib,<< 0,%r4,comib_tests_1
+ comib,<<= 0,%r4,comib_tests_1
+ comib,sv 0,%r4,comib_tests_1
+ comib,od 0,%r4,comib_tests_1
+
+comib_tests_2
+ comib,tr 0,%r4,comib_tests_2
+ comib,<> 0,%r4,comib_tests_2
+ comib,>= 0,%r4,comib_tests_2
+ comib,> 0,%r4,comib_tests_2
+ comib,>>= 0,%r4,comib_tests_2
+ comib,>> 0,%r4,comib_tests_2
+ comib,nsv 0,%r4,comib_tests_2
+ comib,ev 0,%r4,comib_tests_2
+
+comib_nullified_tests_1
+ comib,n 0,%r4,comib_tests_1
+ comib,=,n 0,%r4,comib_tests_1
+ comib,<,n 0,%r4,comib_tests_1
+ comib,<=,n 0,%r4,comib_tests_1
+ comib,<<,n 0,%r4,comib_tests_1
+ comib,<<=,n 0,%r4,comib_tests_1
+ comib,sv,n 0,%r4,comib_tests_1
+ comib,od,n 0,%r4,comib_tests_1
+
+comib_nullified_tests_2
+ comib,tr,n 0,%r4,comib_tests_2
+ comib,<>,n 0,%r4,comib_tests_2
+ comib,>=,n 0,%r4,comib_tests_2
+ comib,>,n 0,%r4,comib_tests_2
+ comib,>>=,n 0,%r4,comib_tests_2
+ comib,>>,n 0,%r4,comib_tests_2
+ comib,nsv,n 0,%r4,comib_tests_2
+ comib,ev,n 0,%r4,comib_tests_2
+
+addb_tests_1
+ addb %r1,%r4,addb_tests_1
+ addb,= %r1,%r4,addb_tests_1
+ addb,< %r1,%r4,addb_tests_1
+ addb,<= %r1,%r4,addb_tests_1
+ addb,nuv %r1,%r4,addb_tests_1
+ addb,znv %r1,%r4,addb_tests_1
+ addb,sv %r1,%r4,addb_tests_1
+ addb,od %r1,%r4,addb_tests_1
+
+addb_tests_2
+ addb,tr %r1,%r4,addb_tests_2
+ addb,<> %r1,%r4,addb_tests_2
+ addb,>= %r1,%r4,addb_tests_2
+ addb,> %r1,%r4,addb_tests_2
+ addb,uv %r1,%r4,addb_tests_2
+ addb,vnz %r1,%r4,addb_tests_2
+ addb,nsv %r1,%r4,addb_tests_2
+ addb,ev %r1,%r4,addb_tests_2
+
+addb_nullified_tests_1
+ addb,n %r1,%r4,addb_tests_1
+ addb,=,n %r1,%r4,addb_tests_1
+ addb,<,n %r1,%r4,addb_tests_1
+ addb,<=,n %r1,%r4,addb_tests_1
+ addb,nuv,n %r1,%r4,addb_tests_1
+ addb,znv,n %r1,%r4,addb_tests_1
+ addb,sv,n %r1,%r4,addb_tests_1
+ addb,od,n %r1,%r4,addb_tests_1
+
+addb_nullified_tests_2
+ addb,tr,n %r1,%r4,addb_tests_2
+ addb,<>,n %r1,%r4,addb_tests_2
+ addb,>=,n %r1,%r4,addb_tests_2
+ addb,>,n %r1,%r4,addb_tests_2
+ addb,uv,n %r1,%r4,addb_tests_2
+ addb,vnz,n %r1,%r4,addb_tests_2
+ addb,nsv,n %r1,%r4,addb_tests_2
+ addb,ev,n %r1,%r4,addb_tests_2
+
+addib_tests_1
+ addib -1,%r4,addib_tests_1
+ addib,= -1,%r4,addib_tests_1
+ addib,< -1,%r4,addib_tests_1
+ addib,<= -1,%r4,addib_tests_1
+ addib,nuv -1,%r4,addib_tests_1
+ addib,znv -1,%r4,addib_tests_1
+ addib,sv -1,%r4,addib_tests_1
+ addib,od -1,%r4,addib_tests_1
+
+addib_tests_2
+ addib,tr -1,%r4,addib_tests_2
+ addib,<> -1,%r4,addib_tests_2
+ addib,>= -1,%r4,addib_tests_2
+ addib,> -1,%r4,addib_tests_2
+ addib,uv -1,%r4,addib_tests_2
+ addib,vnz -1,%r4,addib_tests_2
+ addib,nsv -1,%r4,addib_tests_2
+ addib,ev -1,%r4,addib_tests_2
+
+addib_nullified_tests_1
+ addib,n -1,%r4,addib_tests_1
+ addib,=,n -1,%r4,addib_tests_1
+ addib,<,n -1,%r4,addib_tests_1
+ addib,<=,n -1,%r4,addib_tests_1
+ addib,nuv,n -1,%r4,addib_tests_1
+ addib,znv,n -1,%r4,addib_tests_1
+ addib,sv,n -1,%r4,addib_tests_1
+ addib,od,n -1,%r4,addib_tests_1
+
+addib_nullified_tests_2
+ addib,tr,n -1,%r4,addib_tests_2
+ addib,<>,n -1,%r4,addib_tests_2
+ addib,>=,n -1,%r4,addib_tests_2
+ addib,>,n -1,%r4,addib_tests_2
+ addib,uv,n -1,%r4,addib_tests_2
+ addib,vnz,n -1,%r4,addib_tests_2
+ addib,nsv,n -1,%r4,addib_tests_2
+ addib,ev,n -1,%r4,addib_tests_2
; Needs to check lots of stuff (like corner bit cases)
mfsp %sr0,%r4
mfctl %cr10,%r4
sync
+ syncdma
diag 1234
probe_tests
lpa,m %r4(%sr0,%r5),%r6
lha %r4(%sr0,%r5),%r6
lha,m %r4(%sr0,%r5),%r6
+ lci %r4(%sr0,%r5),%r6
purge_tests
pdtlb %r4(%sr0,%r5)
frem,dbl %fr20,%fr24,%fr28
frem,quad %fr20,%fr24,%fr28
-fcmp_sgl_tests
+fcmp_sgl_tests_1
fcmp,sgl,false? %fr4,%fr5
fcmp,sgl,false %fr4,%fr5
fcmp,sgl,? %fr4,%fr5
fcmp,sgl,=T %fr4,%fr5
fcmp,sgl,?= %fr4,%fr5
fcmp,sgl,!<> %fr4,%fr5
+fcmp_sgl_tests_2
fcmp,sgl,!?>= %fr4,%fr5
fcmp,sgl,< %fr4,%fr5
fcmp,sgl,?< %fr4,%fr5
fcmp,sgl,<= %fr4,%fr5
fcmp,sgl,?<= %fr4,%fr5
fcmp,sgl,!> %fr4,%fr5
+fcmp_sgl_tests_3
fcmp,sgl,!?<= %fr4,%fr5
fcmp,sgl,> %fr4,%fr5
fcmp,sgl,?> %fr4,%fr5
fcmp,sgl,>= %fr4,%fr5
fcmp,sgl,?>= %fr4,%fr5
fcmp,sgl,!< %fr4,%fr5
+fcmp_sgl_tests_4
fcmp,sgl,!?= %fr4,%fr5
fcmp,sgl,<> %fr4,%fr5
fcmp,sgl,!= %fr4,%fr5
fcmp,sgl,true? %fr4,%fr5
fcmp,sgl,true %fr4,%fr5
-fcmp_dbl_tests
+fcmp_dbl_tests_1
fcmp,dbl,false? %fr4,%fr5
fcmp,dbl,false %fr4,%fr5
fcmp,dbl,? %fr4,%fr5
fcmp,dbl,=T %fr4,%fr5
fcmp,dbl,?= %fr4,%fr5
fcmp,dbl,!<> %fr4,%fr5
+fcmp_dbl_tests_2
fcmp,dbl,!?>= %fr4,%fr5
fcmp,dbl,< %fr4,%fr5
fcmp,dbl,?< %fr4,%fr5
fcmp,dbl,<= %fr4,%fr5
fcmp,dbl,?<= %fr4,%fr5
fcmp,dbl,!> %fr4,%fr5
+fcmp_dbl_tests_3
fcmp,dbl,!?<= %fr4,%fr5
fcmp,dbl,> %fr4,%fr5
fcmp,dbl,?> %fr4,%fr5
fcmp,dbl,>= %fr4,%fr5
fcmp,dbl,?>= %fr4,%fr5
fcmp,dbl,!< %fr4,%fr5
+fcmp_dbl_tests_4
fcmp,dbl,!?= %fr4,%fr5
fcmp,dbl,<> %fr4,%fr5
fcmp,dbl,!= %fr4,%fr5
fcmp,dbl,true? %fr4,%fr5
fcmp,dbl,true %fr4,%fr5
-fcmp_quad_tests
+fcmp_quad_tests_1
fcmp,quad,false? %fr4,%fr5
fcmp,quad,false %fr4,%fr5
fcmp,quad,? %fr4,%fr5
fcmp,quad,=T %fr4,%fr5
fcmp,quad,?= %fr4,%fr5
fcmp,quad,!<> %fr4,%fr5
+fcmp_quad_tests_2
fcmp,quad,!?>= %fr4,%fr5
fcmp,quad,< %fr4,%fr5
fcmp,quad,?< %fr4,%fr5
fcmp,quad,<= %fr4,%fr5
fcmp,quad,?<= %fr4,%fr5
fcmp,quad,!> %fr4,%fr5
+fcmp_quad_tests_3
fcmp,quad,!?<= %fr4,%fr5
fcmp,quad,> %fr4,%fr5
fcmp,quad,?> %fr4,%fr5
fcmp,quad,>= %fr4,%fr5
fcmp,quad,?>= %fr4,%fr5
fcmp,quad,!< %fr4,%fr5
+fcmp_quad_tests_4
fcmp,quad,!?= %fr4,%fr5
fcmp,quad,<> %fr4,%fr5
fcmp,quad,!= %fr4,%fr5
cstds,4,mb 26,0(0,4)
cstds,4,ma 26,0(0,4)
+fmemLRbug_tests_1
+ fstws %fr6R,0(%r26)
+ fstws %fr6L,4(%r26)
+ fstws %fr6,8(%r26)
+ fstds %fr6R,0(%r26)
+ fstds %fr6L,4(%r26)
+ fstds %fr6,8(%r26)
+ fldws 0(%r26),%fr6R
+ fldws 4(%r26),%fr6L
+ fldws 8(%r26),%fr6
+ fldds 0(%r26),%fr6R
+ fldds 4(%r26),%fr6L
+ fldds 8(%r26),%fr6
+
+fmemLRbug_tests_2
+ fstws %fr6R,0(%sr0,%r26)
+ fstws %fr6L,4(%sr0,%r26)
+ fstws %fr6,8(%sr0,%r26)
+ fstds %fr6R,0(%sr0,%r26)
+ fstds %fr6L,4(%sr0,%r26)
+ fstds %fr6,8(%sr0,%r26)
+ fldws 0(%sr0,%r26),%fr6R
+ fldws 4(%sr0,%r26),%fr6L
+ fldws 8(%sr0,%r26),%fr6
+ fldds 0(%sr0,%r26),%fr6R
+ fldds 4(%sr0,%r26),%fr6L
+ fldds 8(%sr0,%r26),%fr6
+
+fmemLRbug_tests_3
+ fstwx %fr6R,%r25(%r26)
+ fstwx %fr6L,%r25(%r26)
+ fstwx %fr6,%r25(%r26)
+ fstdx %fr6R,%r25(%r26)
+ fstdx %fr6L,%r25(%r26)
+ fstdx %fr6,%r25(%r26)
+ fldwx %r25(%r26),%fr6R
+ fldwx %r25(%r26),%fr6L
+ fldwx %r25(%r26),%fr6
+ flddx %r25(%r26),%fr6R
+ flddx %r25(%r26),%fr6L
+ flddx %r25(%r26),%fr6
+
+fmemLRbug_tests_4
+ fstwx %fr6R,%r25(%sr0,%r26)
+ fstwx %fr6L,%r25(%sr0,%r26)
+ fstwx %fr6,%r25(%sr0,%r26)
+ fstdx %fr6R,%r25(%sr0,%r26)
+ fstdx %fr6L,%r25(%sr0,%r26)
+ fstdx %fr6,%r25(%sr0,%r26)
+ fldwx %r25(%sr0,%r26),%fr6R
+ fldwx %r25(%sr0,%r26),%fr6L
+ fldwx %r25(%sr0,%r26),%fr6
+ flddx %r25(%sr0,%r26),%fr6R
+ flddx %r25(%sr0,%r26),%fr6L
+ flddx %r25(%sr0,%r26),%fr6
+
ldw 0(0,%r4),%r26
ldw 0(0,%r4),%r26
ldo 64(%r4),%r30