/* AltiVec registers. */
/* .vr0_offset = */ 0,
- /* .vrsave_offset = */ 512,
- /* .vscr_offset = */ 512 + 12
+ /* .vscr_offset = */ 512 + 12,
+ /* .vrsave_offset = */ 528
};
static const struct ppc_reg_offsets ppc64_linux_reg_offsets =
/* AltiVec registers. */
/* .vr0_offset = */ 0,
- /* .vrsave_offset = */ 528,
- /* .vscr_offset = */ 512 + 12
+ /* .vscr_offset = */ 512 + 12,
+ /* .vrsave_offset = */ 528
};
static const struct regset ppc32_linux_gregset = {
NULL
};
+static const struct regset ppc32_linux_vrregset = {
+ &ppc32_linux_reg_offsets,
+ ppc_supply_vrregset,
+ ppc_collect_vrregset,
+ NULL
+};
+
const struct regset *
ppc_linux_gregset (int wordsize)
{
}
if (strcmp (sect_name, ".reg2") == 0)
return &ppc32_linux_fpregset;
+ if (strcmp (sect_name, ".reg-ppc-vmx") == 0)
+ return &ppc32_linux_vrregset;
return NULL;
}