/* Target-dependent code for Motorola 68HC11 & 68HC12
- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008
- Free Software Foundation, Inc.
+ Copyright (C) 1999-2016 Free Software Foundation, Inc.
Contributed by Stephane Carrez, stcarrez@nerim.fr
#include "gdbtypes.h"
#include "gdbcmd.h"
#include "gdbcore.h"
-#include "gdb_string.h"
#include "value.h"
#include "inferior.h"
#include "dis-asm.h"
MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol. */
-#define MSYMBOL_SET_RTC(msym) \
+#define MSYMBOL_SET_RTC(msym) \
MSYMBOL_TARGET_FLAG_1 (msym) = 1
-#define MSYMBOL_SET_RTI(msym) \
+#define MSYMBOL_SET_RTI(msym) \
MSYMBOL_TARGET_FLAG_2 (msym) = 1
#define MSYMBOL_IS_RTC(msym) \
static void
m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
{
- struct minimal_symbol *msymbol;
+ struct bound_minimal_symbol msymbol;
msymbol = lookup_minimal_symbol (name, NULL, NULL);
- if (msymbol)
+ if (msymbol.minsym)
{
- reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
+ reg->addr = BMSYMBOL_VALUE_ADDRESS (msymbol);
reg->name = xstrdup (name);
/* Keep track of the address range for soft registers. */
{
char buf[10];
- sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
+ xsnprintf (buf, sizeof (buf), "_.d%d", i - SOFT_D1_REGNUM + 1);
m68hc11_get_register_info (&soft_regs[i], buf);
}
/* Fetch a pseudo register. The 68hc11 soft registers are treated like
pseudo registers. They are located in memory. Translate the register
fetch into a memory read. */
-static void
+static enum register_status
m68hc11_pseudo_register_read (struct gdbarch *gdbarch,
struct regcache *regcache,
int regno, gdb_byte *buf)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+
/* The PC is a pseudo reg only for 68HC12 with the memory bank
addressing mode. */
if (regno == M68HC12_HARD_PC_REGNUM)
{
ULONGEST pc;
- const int regsize = TYPE_LENGTH (builtin_type_uint32);
+ const int regsize = 4;
+ enum register_status status;
- regcache_cooked_read_unsigned (regcache, HARD_PC_REGNUM, &pc);
+ status = regcache_cooked_read_unsigned (regcache, HARD_PC_REGNUM, &pc);
+ if (status != REG_VALID)
+ return status;
if (pc >= 0x8000 && pc < 0xc000)
{
ULONGEST page;
pc += (page << 14);
pc += 0x1000000;
}
- store_unsigned_integer (buf, regsize, pc);
- return;
+ store_unsigned_integer (buf, regsize, byte_order, pc);
+ return REG_VALID;
}
m68hc11_initialize_register_info ();
{
memset (buf, 0, 2);
}
+
+ return REG_VALID;
}
/* Store a pseudo register. Translate the register store
struct regcache *regcache,
int regno, const gdb_byte *buf)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+
/* The PC is a pseudo reg only for 68HC12 with the memory bank
addressing mode. */
if (regno == M68HC12_HARD_PC_REGNUM)
{
- const int regsize = TYPE_LENGTH (builtin_type_uint32);
- char *tmp = alloca (regsize);
+ const int regsize = 4;
+ gdb_byte *tmp = (gdb_byte *) alloca (regsize);
CORE_ADDR pc;
memcpy (tmp, buf, regsize);
- pc = extract_unsigned_integer (tmp, regsize);
+ pc = extract_unsigned_integer (tmp, regsize, byte_order);
if (pc >= 0x1000000)
{
pc -= 0x1000000;
if (soft_regs[regno].name)
{
const int regsize = 2;
- char *tmp = alloca (regsize);
+ gdb_byte *tmp = (gdb_byte *) alloca (regsize);
memcpy (tmp, buf, regsize);
target_write_memory (soft_regs[regno].addr, tmp, regsize);
}
}
\f
-/* 68HC11 & 68HC12 prologue analysis.
+/* 68HC11 & 68HC12 prologue analysis. */
- */
#define MAX_CODES 12
/* 68HC11 opcodes. */
Returns a pointer to the sequence when it is recognized and
the optional value (constant/address) associated with it. */
static struct insn_sequence *
-m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR pc,
+m68hc11_analyze_instruction (struct gdbarch *gdbarch,
+ struct insn_sequence *seq, CORE_ADDR pc,
CORE_ADDR *val)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
unsigned char buffer[MAX_CODES];
unsigned bufsize;
unsigned j;
if (bufsize < j + 1)
{
buffer[bufsize] = read_memory_unsigned_integer (pc + bufsize,
- 1);
+ 1, byte_order);
bufsize++;
}
/* Continue while we match the opcode. */
}
else if ((buffer[j] & 0xfe) == 0xf0)
{
- v = read_memory_unsigned_integer (pc + j + 1, 1);
+ v = read_memory_unsigned_integer (pc + j + 1, 1, byte_order);
if (buffer[j] & 1)
v |= 0xff00;
}
else if (buffer[j] == 0xf2)
{
- v = read_memory_unsigned_integer (pc + j + 1, 2);
+ v = read_memory_unsigned_integer (pc + j + 1, 2, byte_order);
}
cur_val = v;
break;
static enum insn_return_kind
m68hc11_get_return_insn (CORE_ADDR pc)
{
- struct minimal_symbol *sym;
+ struct bound_minimal_symbol sym;
/* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
function is stored by elfread.c in the high bit of the info field.
Use this to decide which instruction the function uses to return. */
sym = lookup_minimal_symbol_by_pc (pc);
- if (sym == 0)
+ if (sym.minsym == 0)
return RETURN_RTS;
- if (MSYMBOL_IS_RTC (sym))
+ if (MSYMBOL_IS_RTC (sym.minsym))
return RETURN_RTC;
- else if (MSYMBOL_IS_RTI (sym))
+ else if (MSYMBOL_IS_RTI (sym.minsym))
return RETURN_RTI;
else
return RETURN_RTS;
We limit the search to 128 bytes so that the algorithm is bounded
in case of random and wrong code. We also stop and abort if
we find an instruction which is not supposed to appear in the
- prologue (as generated by gcc 2.95, 2.96).
- */
+ prologue (as generated by gcc 2.95, 2.96). */
+
func_end = pc + 128;
found_frame_point = 0;
info->size = 0;
struct insn_sequence *seq;
CORE_ADDR val;
- seq = m68hc11_analyze_instruction (seq_table, pc, &val);
+ seq = m68hc11_analyze_instruction (gdbarch, seq_table, pc, &val);
if (seq == 0)
break;
{
ULONGEST pc;
- pc = frame_unwind_register_unsigned (next_frame, gdbarch_pc_regnum (gdbarch));
+ pc = frame_unwind_register_unsigned (next_frame,
+ gdbarch_pc_regnum (gdbarch));
return pc;
}
the saved registers of frame described by FRAME_INFO. This
includes special registers such as pc and fp saved in special ways
in the stack frame. sp is even more special: the address we return
- for it IS the sp for the next frame. */
+ for it IS the sp for the next frame. */
-struct m68hc11_unwind_cache *
+static struct m68hc11_unwind_cache *
m68hc11_frame_unwind_cache (struct frame_info *this_frame,
void **this_prologue_cache)
{
int i;
if ((*this_prologue_cache))
- return (*this_prologue_cache);
+ return (struct m68hc11_unwind_cache *) (*this_prologue_cache);
info = FRAME_OBSTACK_ZALLOC (struct m68hc11_unwind_cache);
(*this_prologue_cache) = info;
}
/* Add 1 here to adjust for the post-decrement nature of the push
- instruction.*/
+ instruction. */
info->prev_sp = prev_sp;
info->base = this_base;
static const struct frame_unwind m68hc11_frame_unwind = {
NORMAL_FRAME,
+ default_frame_unwind_stop_reason,
m68hc11_frame_this_id,
m68hc11_frame_prev_register,
NULL,
V = (l & M6811_V_BIT) != 0;
C = (l & M6811_C_BIT) != 0;
- /* Print flags following the h8300 */
+ /* Print flags following the h8300. */
if ((C | Z) == 0)
fprintf_filtered (file, "u> ");
else if ((C | Z) == 1)
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int argnum;
int first_stack_argnum;
struct type *type;
- char *val;
- int len;
- char buf[2];
+ const gdb_byte *val;
+ gdb_byte buf[2];
first_stack_argnum = 0;
if (struct_return)
else if (nargs > 0)
{
type = value_type (args[0]);
- len = TYPE_LENGTH (type);
/* First argument is passed in D and X registers. */
- if (len <= 4)
+ if (TYPE_LENGTH (type) <= 4)
{
ULONGEST v;
- v = extract_unsigned_integer (value_contents (args[0]), len);
+ v = extract_unsigned_integer (value_contents (args[0]),
+ TYPE_LENGTH (type), byte_order);
first_stack_argnum = 1;
regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, v);
- if (len > 2)
+ if (TYPE_LENGTH (type) > 2)
{
v >>= 16;
regcache_cooked_write_unsigned (regcache, HARD_X_REGNUM, v);
for (argnum = nargs - 1; argnum >= first_stack_argnum; argnum--)
{
type = value_type (args[argnum]);
- len = TYPE_LENGTH (type);
- if (len & 1)
+ if (TYPE_LENGTH (type) & 1)
{
- static char zero = 0;
+ static gdb_byte zero = 0;
sp--;
write_memory (sp, &zero, 1);
}
- val = (char*) value_contents (args[argnum]);
- sp -= len;
- write_memory (sp, val, len);
+ val = value_contents (args[argnum]);
+ sp -= TYPE_LENGTH (type);
+ write_memory (sp, val, TYPE_LENGTH (type));
}
/* Store return address. */
sp -= 2;
- store_unsigned_integer (buf, 2, bp_addr);
+ store_unsigned_integer (buf, 2, byte_order, bp_addr);
write_memory (sp, buf, 2);
/* Finally, update the stack pointer... */
case HARD_A_REGNUM:
case HARD_B_REGNUM:
case HARD_CCR_REGNUM:
- return builtin_type_uint8;
+ return builtin_type (gdbarch)->builtin_uint8;
case M68HC12_HARD_PC_REGNUM:
- return builtin_type_uint32;
+ return builtin_type (gdbarch)->builtin_uint32;
default:
- return builtin_type_uint16;
+ return builtin_type (gdbarch)->builtin_uint16;
}
}
static void
m68hc11_store_return_value (struct type *type, struct regcache *regcache,
- const void *valbuf)
+ const gdb_byte *valbuf)
{
int len;
{
regcache_raw_write_part (regcache, HARD_X_REGNUM, 4 - len,
len - 2, valbuf);
- regcache_raw_write (regcache, HARD_D_REGNUM, (char*) valbuf + (len - 2));
+ regcache_raw_write (regcache, HARD_D_REGNUM, valbuf + (len - 2));
}
else
error (_("return of value > 4 is not supported."));
m68hc11_extract_return_value (struct type *type, struct regcache *regcache,
void *valbuf)
{
- int len = TYPE_LENGTH (type);
- char buf[M68HC11_REG_SIZE];
+ gdb_byte buf[M68HC11_REG_SIZE];
regcache_raw_read (regcache, HARD_D_REGNUM, buf);
- switch (len)
+ switch (TYPE_LENGTH (type))
{
case 1:
memcpy (valbuf, buf + 1, 1);
}
}
-enum return_value_convention
-m68hc11_return_value (struct gdbarch *gdbarch, struct type *func_type,
+static enum return_value_convention
+m68hc11_return_value (struct gdbarch *gdbarch, struct value *function,
struct type *valtype, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
else
elf_flags = 0;
- /* try to find a pre-existing architecture */
+ /* Try to find a pre-existing architecture. */
for (arches = gdbarch_list_lookup_by_info (arches, &info);
arches != NULL;
arches = gdbarch_list_lookup_by_info (arches->next, &info))
return arches->gdbarch;
}
- /* Need a new architecture. Fill in a target specific vector. */
- tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
+ /* Need a new architecture. Fill in a target specific vector. */
+ tdep = XNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
tdep->elf_flags = elf_flags;
set_gdbarch_short_bit (gdbarch, 16);
set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16);
set_gdbarch_float_bit (gdbarch, 32);
- set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32);
+ if (elf_flags & E_M68HC11_F64)
+ {
+ set_gdbarch_double_bit (gdbarch, 64);
+ set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
+ }
+ else
+ {
+ set_gdbarch_double_bit (gdbarch, 32);
+ set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
+ }
set_gdbarch_long_double_bit (gdbarch, 64);
set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 16);
return gdbarch;
}
-extern initialize_file_ftype _initialize_m68hc11_tdep; /* -Wmissing-prototypes */
+/* -Wmissing-prototypes */
+extern initialize_file_ftype _initialize_m68hc11_tdep;
void
_initialize_m68hc11_tdep (void)
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