/* Common target dependent code for GDB on ARM systems.
- Copyright (C) 1988-2015 Free Software Foundation, Inc.
+ Copyright (C) 1988-2019 Free Software Foundation, Inc.
This file is part of GDB.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
-#ifndef ARM_H
-#define ARM_H
+#ifndef ARCH_ARM_H
+#define ARCH_ARM_H
/* Register numbers of various important registers. */
ARM_LAST_FP_ARG_REGNUM = ARM_F3_REGNUM
};
+/* Enum describing the different kinds of breakpoints. */
+enum arm_breakpoint_kinds
+{
+ ARM_BP_KIND_THUMB = 2,
+ ARM_BP_KIND_THUMB2 = 3,
+ ARM_BP_KIND_ARM = 4,
+};
+
/* Instruction condition field values. */
#define INST_EQ 0x0
#define INST_NE 0x1
#define XPSR_T 0x01000000
-/* Size of integer registers. */
-#define INT_REGISTER_SIZE 4
+/* Size of registers. */
+
+#define ARM_INT_REGISTER_SIZE 4
+/* IEEE extended doubles are 80 bits. DWORD aligned they use 96 bits. */
+#define ARM_FP_REGISTER_SIZE 12
+#define ARM_VFP_REGISTER_SIZE 8
/* Addresses for calling Thumb functions have the bit 0 set.
Here are some macros to test, set, or clear bit 0 of addresses. */
unsigned long pc_val,
unsigned long status_reg);
-#endif
+#endif /* ARCH_ARM_H */