merge from gcc

[external/binutils.git] / gdb / amd64-tdep.h

diff --git a/gdb/amd64-tdep.h b/gdb/amd64-tdep.h
index aff0c6a..363479c 100644 (file)
--- a/gdb/amd64-tdep.h
+++ b/gdb/amd64-tdep.h
@@ -1,13 +1,14 @@
 /* Target-dependent definitions for AMD64.
 
-   Copyright 2001, 2003, 2004 Free Software Foundation, Inc.
+   Copyright (C) 2001, 2003, 2004, 2007, 2008, 2009, 2010
+   Free Software Foundation, Inc.
    Contributed by Jiri Smid, SuSE Labs.
 
    This file is part of GDB.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
+   the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
@@ -16,9 +17,7 @@
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 59 Temple Place - Suite 330,
-   Boston, MA 02111-1307, USA.  */
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
 #ifndef AMD64_TDEP_H
 #define AMD64_TDEP_H
@@ -41,20 +40,49 @@ enum amd64_regnum
   AMD64_RDI_REGNUM,            /* %rdi */
   AMD64_RBP_REGNUM,            /* %rbp */
   AMD64_RSP_REGNUM,            /* %rsp */
-  AMD64_R8_REGNUM = 8,         /* %r8 */
-  AMD64_R15_REGNUM = 15,       /* %r15 */
+  AMD64_R8_REGNUM,             /* %r8 */
+  AMD64_R9_REGNUM,             /* %r9 */
+  AMD64_R10_REGNUM,            /* %r10 */
+  AMD64_R11_REGNUM,            /* %r11 */
+  AMD64_R12_REGNUM,            /* %r12 */
+  AMD64_R13_REGNUM,            /* %r13 */
+  AMD64_R14_REGNUM,            /* %r14 */
+  AMD64_R15_REGNUM,            /* %r15 */
   AMD64_RIP_REGNUM,            /* %rip */
   AMD64_EFLAGS_REGNUM,         /* %eflags */
+  AMD64_CS_REGNUM,             /* %cs */
+  AMD64_SS_REGNUM,             /* %ss */
+  AMD64_DS_REGNUM,             /* %ds */
+  AMD64_ES_REGNUM,             /* %es */
+  AMD64_FS_REGNUM,             /* %fs */
+  AMD64_GS_REGNUM,             /* %gs */
   AMD64_ST0_REGNUM = 24,       /* %st0 */
+  AMD64_FCTRL_REGNUM = AMD64_ST0_REGNUM + 8,
+  AMD64_FSTAT_REGNUM = AMD64_ST0_REGNUM + 9,
   AMD64_XMM0_REGNUM = 40,      /* %xmm0 */
-  AMD64_XMM1_REGNUM            /* %xmm1 */
+  AMD64_XMM1_REGNUM,           /* %xmm1 */
+  AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16
 };
 
 /* Number of general purpose registers.  */
 #define AMD64_NUM_GREGS                24
 
+extern struct displaced_step_closure *amd64_displaced_step_copy_insn
+  (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
+   struct regcache *regs);
+extern void amd64_displaced_step_fixup (struct gdbarch *gdbarch,
+                                       struct displaced_step_closure *closure,
+                                       CORE_ADDR from, CORE_ADDR to,
+                                       struct regcache *regs);
+
 extern void amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch);
 
+/* Functions from amd64-tdep.c which may be needed on architectures
+   with extra registers.  */
+
+extern const char *amd64_register_name (struct gdbarch *gdbarch, int regnum);
+extern struct type *amd64_register_type (struct gdbarch *gdbarch, int regnum);
+
 /* Fill register REGNUM in REGCACHE with the appropriate
    floating-point or SSE register value from *FXSAVE.  If REGNUM is
    -1, do this for all registers.  This function masks off any of the
@@ -64,11 +92,15 @@ extern void amd64_supply_fxsave (struct regcache *regcache, int regnum,
                                 const void *fxsave);
 
 /* Fill register REGNUM (if it is a floating-point or SSE register) in
-   *FXSAVE with the value in GDB's register cache.  If REGNUM is -1, do
-   this for all registers.  This function doesn't touch any of the
-   reserved bits in *FXSAVE.  */
+   *FXSAVE with the value from REGCACHE.  If REGNUM is -1, do this for
+   all registers.  This function doesn't touch any of the reserved
+   bits in *FXSAVE.  */
+
+extern void amd64_collect_fxsave (const struct regcache *regcache, int regnum,
+                                 void *fxsave);
+
+void amd64_classify (struct type *type, enum amd64_reg_class class[2]);
 
-extern void amd64_fill_fxsave (char *fxsave, int regnum);
 \f
 
 /* Variables exported from amd64nbsd-tdep.c.  */