/* If-conversion support.
- Copyright (C) 2000-2015 Free Software Foundation, Inc.
+ Copyright (C) 2000-2019 Free Software Foundation, Inc.
This file is part of GCC.
#include "system.h"
#include "coretypes.h"
#include "backend.h"
-#include "cfghooks.h"
-#include "tree.h"
+#include "target.h"
#include "rtl.h"
+#include "tree.h"
+#include "cfghooks.h"
#include "df.h"
-
+#include "memmodel.h"
+#include "tm_p.h"
+#include "expmed.h"
+#include "optabs.h"
#include "regs.h"
-#include "flags.h"
-#include "insn-config.h"
+#include "emit-rtl.h"
#include "recog.h"
-#include "except.h"
+
#include "cfgrtl.h"
#include "cfganal.h"
#include "cfgcleanup.h"
-#include "alias.h"
-#include "expmed.h"
-#include "dojump.h"
-#include "explow.h"
-#include "calls.h"
-#include "emit-rtl.h"
-#include "varasm.h"
-#include "stmt.h"
#include "expr.h"
#include "output.h"
-#include "insn-codes.h"
-#include "optabs.h"
-#include "diagnostic-core.h"
-#include "tm_p.h"
#include "cfgloop.h"
-#include "target.h"
#include "tree-pass.h"
#include "dbgcnt.h"
#include "shrink-wrap.h"
#include "rtl-iter.h"
#include "ifcvt.h"
+#include "params.h"
#ifndef MAX_CONDITIONAL_EXECUTE
#define MAX_CONDITIONAL_EXECUTE \
/* Forward references. */
static int count_bb_insns (const_basic_block);
-static bool cheap_bb_rtx_cost_p (const_basic_block, int, int);
+static bool cheap_bb_rtx_cost_p (const_basic_block, profile_probability, int);
static rtx_insn *first_active_insn (basic_block);
static rtx_insn *last_active_insn (basic_block, int);
static rtx_insn *find_active_insn_before (basic_block, rtx_insn *);
static rtx_insn *find_active_insn_after (basic_block, rtx_insn *);
static basic_block block_fallthru (basic_block);
-static int cond_exec_process_insns (ce_if_block *, rtx_insn *, rtx, rtx, int,
- int);
static rtx cond_exec_get_condition (rtx_insn *);
static rtx noce_get_condition (rtx_insn *, rtx_insn **, bool);
static int noce_operand_ok (const_rtx);
return count;
}
-/* Determine whether the total insn_rtx_cost on non-jump insns in
+/* Determine whether the total insn_cost on non-jump insns in
basic block BB is less than MAX_COST. This function returns
false if the cost of any instruction could not be estimated.
plus a small fudge factor. */
static bool
-cheap_bb_rtx_cost_p (const_basic_block bb, int scale, int max_cost)
+cheap_bb_rtx_cost_p (const_basic_block bb,
+ profile_probability prob, int max_cost)
{
int count = 0;
rtx_insn *insn = BB_HEAD (bb);
bool speed = optimize_bb_for_speed_p (bb);
+ int scale = prob.initialized_p () ? prob.to_reg_br_prob_base ()
+ : REG_BR_PROB_BASE;
/* Set scale to REG_BR_PROB_BASE to void the identical scaling
- applied to insn_rtx_cost when optimizing for size. Only do
+ applied to insn_cost when optimizing for size. Only do
this after combine because if-conversion might interfere with
passes before combine.
{
if (NONJUMP_INSN_P (insn))
{
- int cost = insn_rtx_cost (PATTERN (insn), speed) * REG_BR_PROB_BASE;
+ int cost = insn_cost (insn, speed) * REG_BR_PROB_BASE;
if (cost == 0)
return false;
/* if block information */rtx_insn *start,
/* first insn to look at */rtx end,
/* last insn to look at */rtx test,
- /* conditional execution test */int prob_val,
+ /* conditional execution test */profile_probability
+ prob_val,
/* probability of branch taken. */int mod_ok)
{
int must_be_last = FALSE;
validate_change (insn, &PATTERN (insn), pattern, 1);
- if (CALL_P (insn) && prob_val >= 0)
+ if (CALL_P (insn) && prob_val.initialized_p ())
validate_change (insn, ®_NOTES (insn),
gen_rtx_INT_LIST ((machine_mode) REG_BR_PROB,
- prob_val, REG_NOTES (insn)), 1);
+ prob_val.to_reg_br_prob_note (),
+ REG_NOTES (insn)), 1);
insn_done:
if (insn == end)
/* If this branches to JUMP_LABEL when the condition is false,
reverse the condition. */
if (GET_CODE (XEXP (test_if, 2)) == LABEL_REF
- && LABEL_REF_LABEL (XEXP (test_if, 2)) == JUMP_LABEL (jump))
+ && label_ref_label (XEXP (test_if, 2)) == JUMP_LABEL (jump))
{
enum rtx_code rev = reversed_comparison_code (cond, jump);
if (rev == UNKNOWN)
int then_mod_ok; /* whether conditional mods are ok in THEN */
rtx true_expr; /* test for else block insns */
rtx false_expr; /* test for then block insns */
- int true_prob_val; /* probability of else block */
- int false_prob_val; /* probability of then block */
+ profile_probability true_prob_val;/* probability of else block */
+ profile_probability false_prob_val;/* probability of then block */
rtx_insn *then_last_head = NULL; /* Last match at the head of THEN */
rtx_insn *else_last_head = NULL; /* Last match at the head of ELSE */
rtx_insn *then_first_tail = NULL; /* First match at the tail of THEN */
return FALSE;
/* If the conditional jump is more than just a conditional jump,
- then we can not do conditional execution conversion on this block. */
+ then we cannot do conditional execution conversion on this block. */
if (! onlyjump_p (BB_END (test_bb)))
return FALSE;
note = find_reg_note (BB_END (test_bb), REG_BR_PROB, NULL_RTX);
if (note)
{
- true_prob_val = XINT (note, 0);
- false_prob_val = REG_BR_PROB_BASE - true_prob_val;
+ true_prob_val = profile_probability::from_reg_br_prob_note (XINT (note, 0));
+ false_prob_val = true_prob_val.invert ();
}
else
{
- true_prob_val = -1;
- false_prob_val = -1;
+ true_prob_val = profile_probability::uninitialized ();
+ false_prob_val = profile_probability::uninitialized ();
}
/* If we have && or || tests, do them here. These tests are in the adjacent
goto fail;
/* If the conditional jump is more than just a conditional jump, then
- we can not do conditional execution conversion on this block. */
+ we cannot do conditional execution conversion on this block. */
if (! onlyjump_p (BB_END (bb)))
goto fail;
rtx_insn *from = then_first_tail;
if (!INSN_P (from))
from = find_active_insn_after (then_bb, from);
- delete_insn_chain (from, BB_END (then_bb), false);
+ delete_insn_chain (from, get_last_bb_insn (then_bb), false);
}
if (else_last_head)
delete_insn_chain (first_active_insn (else_bb), else_last_head, false);
return FALSE;
}
\f
-/* Used by noce_process_if_block to communicate with its subroutines.
-
- The subroutines know that A and B may be evaluated freely. They
- know that X is a register. They should insert new instructions
- before cond_earliest. */
-
-struct noce_if_info
-{
- /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
- basic_block test_bb, then_bb, else_bb, join_bb;
-
- /* The jump that ends TEST_BB. */
- rtx_insn *jump;
-
- /* The jump condition. */
- rtx cond;
-
- /* New insns should be inserted before this one. */
- rtx_insn *cond_earliest;
-
- /* Insns in the THEN and ELSE block. There is always just this
- one insns in those blocks. The insns are single_set insns.
- If there was no ELSE block, INSN_B is the last insn before
- COND_EARLIEST, or NULL_RTX. In the former case, the insn
- operands are still valid, as if INSN_B was moved down below
- the jump. */
- rtx_insn *insn_a, *insn_b;
-
- /* The SET_SRC of INSN_A and INSN_B. */
- rtx a, b;
-
- /* The SET_DEST of INSN_A. */
- rtx x;
-
- /* True if this if block is not canonical. In the canonical form of
- if blocks, the THEN_BB is the block reached via the fallthru edge
- from TEST_BB. For the noce transformations, we allow the symmetric
- form as well. */
- bool then_else_reversed;
-
- /* True if the contents of then_bb and else_bb are a
- simple single set instruction. */
- bool then_simple;
- bool else_simple;
-
- /* The total rtx cost of the instructions in then_bb and else_bb. */
- unsigned int then_cost;
- unsigned int else_cost;
-
- /* Estimated cost of the particular branch instruction. */
- unsigned int branch_cost;
-};
-
static rtx noce_emit_store_flag (struct noce_if_info *, rtx, int, int);
static int noce_try_move (struct noce_if_info *);
+static int noce_try_ifelse_collapse (struct noce_if_info *);
static int noce_try_store_flag (struct noce_if_info *);
static int noce_try_addcc (struct noce_if_info *);
static int noce_try_store_flag_constants (struct noce_if_info *);
static int noce_try_abs (struct noce_if_info *);
static int noce_try_sign_mask (struct noce_if_info *);
+/* Return the comparison code for reversed condition for IF_INFO,
+ or UNKNOWN if reversing the condition is not possible. */
+
+static inline enum rtx_code
+noce_reversed_cond_code (struct noce_if_info *if_info)
+{
+ if (if_info->rev_cond)
+ return GET_CODE (if_info->rev_cond);
+ return reversed_comparison_code (if_info->cond, if_info->jump);
+}
+
+/* Return true if SEQ is a good candidate as a replacement for the
+ if-convertible sequence described in IF_INFO.
+ This is the default implementation that targets can override
+ through a target hook. */
+
+bool
+default_noce_conversion_profitable_p (rtx_insn *seq,
+ struct noce_if_info *if_info)
+{
+ bool speed_p = if_info->speed_p;
+
+ /* Cost up the new sequence. */
+ unsigned int cost = seq_cost (seq, speed_p);
+
+ if (cost <= if_info->original_cost)
+ return true;
+
+ /* When compiling for size, we can make a reasonably accurately guess
+ at the size growth. When compiling for speed, use the maximum. */
+ return speed_p && cost <= if_info->max_seq_cost;
+}
+
/* Helper function for noce_try_store_flag*. */
static rtx
rtx set = pc_set (if_info->jump);
cond = XEXP (SET_SRC (set), 0);
if (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
- && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (if_info->jump))
+ && label_ref_label (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (if_info->jump))
reversep = !reversep;
if (if_info->then_else_reversed)
reversep = !reversep;
}
+ else if (reversep
+ && if_info->rev_cond
+ && general_operand (XEXP (if_info->rev_cond, 0), VOIDmode)
+ && general_operand (XEXP (if_info->rev_cond, 1), VOIDmode))
+ {
+ cond = if_info->rev_cond;
+ reversep = false;
+ }
if (reversep)
code = reversed_comparison_code (cond, if_info->jump);
&& (normalize == 0 || STORE_FLAG_VALUE == normalize))
{
rtx src = gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (cond, 0),
- XEXP (cond, 1));
+ XEXP (cond, 1));
rtx set = gen_rtx_SET (x, src);
start_sequence ();
{
machine_mode outmode;
rtx outer, inner;
- int bitpos;
+ poly_int64 bitpos;
if (GET_CODE (x) != STRICT_LOW_PART)
{
}
gcc_assert (start < (MEM_P (op) ? BITS_PER_UNIT : BITS_PER_WORD));
- store_bit_field (op, size, start, 0, 0, GET_MODE (x), y);
+ store_bit_field (op, size, start, 0, 0, GET_MODE (x), y, false);
return;
}
outmode = GET_MODE (outer);
bitpos = SUBREG_BYTE (outer) * BITS_PER_UNIT;
store_bit_field (inner, GET_MODE_BITSIZE (outmode), bitpos,
- 0, 0, outmode, y);
+ 0, 0, outmode, y, false);
}
/* Return the CC reg if it is used in COND. */
emit_insn_before_setloc (seq, if_info->jump,
INSN_LOCATION (if_info->insn_a));
}
+ if_info->transform_name = "noce_try_move";
return TRUE;
}
return FALSE;
}
+/* Try forming an IF_THEN_ELSE (cond, b, a) and collapsing that
+ through simplify_rtx. Sometimes that can eliminate the IF_THEN_ELSE.
+ If that is the case, emit the result into x. */
+
+static int
+noce_try_ifelse_collapse (struct noce_if_info * if_info)
+{
+ if (!noce_simple_bbs (if_info))
+ return FALSE;
+
+ machine_mode mode = GET_MODE (if_info->x);
+ rtx if_then_else = simplify_gen_ternary (IF_THEN_ELSE, mode, mode,
+ if_info->cond, if_info->b,
+ if_info->a);
+
+ if (GET_CODE (if_then_else) == IF_THEN_ELSE)
+ return FALSE;
+
+ rtx_insn *seq;
+ start_sequence ();
+ noce_emit_move_insn (if_info->x, if_then_else);
+ seq = end_ifcvt_sequence (if_info);
+ if (!seq)
+ return FALSE;
+
+ emit_insn_before_setloc (seq, if_info->jump,
+ INSN_LOCATION (if_info->insn_a));
+
+ if_info->transform_name = "noce_try_ifelse_collapse";
+ return TRUE;
+}
+
+
/* Convert "if (test) x = 1; else x = 0".
Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
else if (if_info->b == const0_rtx
&& CONST_INT_P (if_info->a)
&& INTVAL (if_info->a) == STORE_FLAG_VALUE
- && (reversed_comparison_code (if_info->cond, if_info->jump)
- != UNKNOWN))
+ && noce_reversed_cond_code (if_info) != UNKNOWN)
reversep = 1;
else
return FALSE;
emit_insn_before_setloc (seq, if_info->jump,
INSN_LOCATION (if_info->insn_a));
+ if_info->transform_name = "noce_try_store_flag";
return TRUE;
}
else
}
}
+
+/* Convert "if (test) x = -A; else x = A" into
+ x = A; if (test) x = -x if the machine can do the
+ conditional negate form of this cheaply.
+ Try this before noce_try_cmove that will just load the
+ immediates into two registers and do a conditional select
+ between them. If the target has a conditional negate or
+ conditional invert operation we can save a potentially
+ expensive constant synthesis. */
+
+static bool
+noce_try_inverse_constants (struct noce_if_info *if_info)
+{
+ if (!noce_simple_bbs (if_info))
+ return false;
+
+ if (!CONST_INT_P (if_info->a)
+ || !CONST_INT_P (if_info->b)
+ || !REG_P (if_info->x))
+ return false;
+
+ machine_mode mode = GET_MODE (if_info->x);
+
+ HOST_WIDE_INT val_a = INTVAL (if_info->a);
+ HOST_WIDE_INT val_b = INTVAL (if_info->b);
+
+ rtx cond = if_info->cond;
+
+ rtx x = if_info->x;
+ rtx target;
+
+ start_sequence ();
+
+ rtx_code code;
+ if (val_b != HOST_WIDE_INT_MIN && val_a == -val_b)
+ code = NEG;
+ else if (val_a == ~val_b)
+ code = NOT;
+ else
+ {
+ end_sequence ();
+ return false;
+ }
+
+ rtx tmp = gen_reg_rtx (mode);
+ noce_emit_move_insn (tmp, if_info->a);
+
+ target = emit_conditional_neg_or_complement (x, code, mode, cond, tmp, tmp);
+
+ if (target)
+ {
+ rtx_insn *seq = get_insns ();
+
+ if (!seq)
+ {
+ end_sequence ();
+ return false;
+ }
+
+ if (target != if_info->x)
+ noce_emit_move_insn (if_info->x, target);
+
+ seq = end_ifcvt_sequence (if_info);
+
+ if (!seq)
+ return false;
+
+ emit_insn_before_setloc (seq, if_info->jump,
+ INSN_LOCATION (if_info->insn_a));
+ if_info->transform_name = "noce_try_inverse_constants";
+ return true;
+ }
+
+ end_sequence ();
+ return false;
+}
+
+
/* Convert "if (test) x = a; else x = b", for A and B constant.
Also allow A = y + c1, B = y + c2, with a common y between A
and B. */
HOST_WIDE_INT itrue, ifalse, diff, tmp;
int normalize;
bool can_reverse;
- machine_mode mode = GET_MODE (if_info->x);;
+ machine_mode mode = GET_MODE (if_info->x);
rtx common = NULL_RTX;
rtx a = if_info->a;
&& CONST_INT_P (XEXP (a, 1))
&& CONST_INT_P (XEXP (b, 1))
&& rtx_equal_p (XEXP (a, 0), XEXP (b, 0))
- && noce_operand_ok (XEXP (a, 0))
- && if_info->branch_cost >= 2)
+ /* Allow expressions that are not using the result or plain
+ registers where we handle overlap below. */
+ && (REG_P (XEXP (a, 0))
+ || (noce_operand_ok (XEXP (a, 0))
+ && ! reg_overlap_mentioned_p (if_info->x, XEXP (a, 0)))))
{
common = XEXP (a, 0);
a = XEXP (a, 1);
diff = trunc_int_for_mode (diff, mode);
- can_reverse = (reversed_comparison_code (if_info->cond, if_info->jump)
- != UNKNOWN);
-
+ can_reverse = noce_reversed_cond_code (if_info) != UNKNOWN;
reversep = false;
if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE)
{
else
gcc_unreachable ();
}
- else if (ifalse == 0 && exact_log2 (itrue) >= 0
- && (STORE_FLAG_VALUE == 1
- || if_info->branch_cost >= 2))
+ /* Is this (cond) ? 2^n : 0? */
+ else if (ifalse == 0 && pow2p_hwi (itrue)
+ && STORE_FLAG_VALUE == 1)
normalize = 1;
- else if (itrue == 0 && exact_log2 (ifalse) >= 0 && can_reverse
- && (STORE_FLAG_VALUE == 1 || if_info->branch_cost >= 2))
+ /* Is this (cond) ? 0 : 2^n? */
+ else if (itrue == 0 && pow2p_hwi (ifalse) && can_reverse
+ && STORE_FLAG_VALUE == 1)
{
normalize = 1;
reversep = true;
}
+ /* Is this (cond) ? -1 : x? */
else if (itrue == -1
- && (STORE_FLAG_VALUE == -1
- || if_info->branch_cost >= 2))
+ && STORE_FLAG_VALUE == -1)
normalize = -1;
+ /* Is this (cond) ? x : -1? */
else if (ifalse == -1 && can_reverse
- && (STORE_FLAG_VALUE == -1 || if_info->branch_cost >= 2))
+ && STORE_FLAG_VALUE == -1)
{
normalize = -1;
reversep = true;
noce_emit_move_insn (if_info->x, target);
seq = end_ifcvt_sequence (if_info);
- if (!seq)
+ if (!seq || !targetm.noce_conversion_profitable_p (seq, if_info))
return FALSE;
emit_insn_before_setloc (seq, if_info->jump,
INSN_LOCATION (if_info->insn_a));
+ if_info->transform_name = "noce_try_store_flag_constants";
+
return TRUE;
}
if (GET_CODE (if_info->a) == PLUS
&& rtx_equal_p (XEXP (if_info->a, 0), if_info->b)
- && (reversed_comparison_code (if_info->cond, if_info->jump)
- != UNKNOWN))
+ && noce_reversed_cond_code (if_info) != UNKNOWN)
{
- rtx cond = if_info->cond;
- enum rtx_code code = reversed_comparison_code (cond, if_info->jump);
+ rtx cond = if_info->rev_cond;
+ enum rtx_code code;
+
+ if (cond == NULL_RTX)
+ {
+ cond = if_info->cond;
+ code = reversed_comparison_code (cond, if_info->jump);
+ }
+ else
+ code = GET_CODE (cond);
/* First try to use addcc pattern. */
if (general_operand (XEXP (cond, 0), VOIDmode)
noce_emit_move_insn (if_info->x, target);
seq = end_ifcvt_sequence (if_info);
- if (!seq)
+ if (!seq || !targetm.noce_conversion_profitable_p (seq, if_info))
return FALSE;
emit_insn_before_setloc (seq, if_info->jump,
INSN_LOCATION (if_info->insn_a));
+ if_info->transform_name = "noce_try_addcc";
+
return TRUE;
}
end_sequence ();
}
/* If that fails, construct conditional increment or decrement using
- setcc. */
- if (if_info->branch_cost >= 2
- && (XEXP (if_info->a, 1) == const1_rtx
- || XEXP (if_info->a, 1) == constm1_rtx))
+ setcc. We're changing a branch and an increment to a comparison and
+ an ADD/SUB. */
+ if (XEXP (if_info->a, 1) == const1_rtx
+ || XEXP (if_info->a, 1) == constm1_rtx)
{
start_sequence ();
if (STORE_FLAG_VALUE == INTVAL (XEXP (if_info->a, 1)))
noce_emit_move_insn (if_info->x, target);
seq = end_ifcvt_sequence (if_info);
- if (!seq)
+ if (!seq || !targetm.noce_conversion_profitable_p (seq, if_info))
return FALSE;
emit_insn_before_setloc (seq, if_info->jump,
INSN_LOCATION (if_info->insn_a));
+ if_info->transform_name = "noce_try_addcc";
return TRUE;
}
end_sequence ();
return FALSE;
reversep = 0;
- if ((if_info->branch_cost >= 2
- || STORE_FLAG_VALUE == -1)
- && ((if_info->a == const0_rtx
- && rtx_equal_p (if_info->b, if_info->x))
- || ((reversep = (reversed_comparison_code (if_info->cond,
- if_info->jump)
- != UNKNOWN))
- && if_info->b == const0_rtx
- && rtx_equal_p (if_info->a, if_info->x))))
+
+ if ((if_info->a == const0_rtx
+ && rtx_equal_p (if_info->b, if_info->x))
+ || ((reversep = (noce_reversed_cond_code (if_info) != UNKNOWN))
+ && if_info->b == const0_rtx
+ && rtx_equal_p (if_info->a, if_info->x)))
{
start_sequence ();
target = noce_emit_store_flag (if_info,
if (target)
{
- int old_cost, new_cost, insn_cost;
- int speed_p;
-
if (target != if_info->x)
noce_emit_move_insn (if_info->x, target);
seq = end_ifcvt_sequence (if_info);
- if (!seq)
- return FALSE;
-
- speed_p = optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info->insn_a));
- insn_cost = insn_rtx_cost (PATTERN (if_info->insn_a), speed_p);
- old_cost = COSTS_N_INSNS (if_info->branch_cost) + insn_cost;
- new_cost = seq_cost (seq, speed_p);
-
- if (new_cost > old_cost)
+ if (!seq || !targetm.noce_conversion_profitable_p (seq, if_info))
return FALSE;
emit_insn_before_setloc (seq, if_info->jump,
INSN_LOCATION (if_info->insn_a));
+ if_info->transform_name = "noce_try_store_flag_mask";
+
return TRUE;
}
{
rtx reg_vtrue = SUBREG_REG (vtrue);
rtx reg_vfalse = SUBREG_REG (vfalse);
- unsigned int byte_vtrue = SUBREG_BYTE (vtrue);
- unsigned int byte_vfalse = SUBREG_BYTE (vfalse);
+ poly_uint64 byte_vtrue = SUBREG_BYTE (vtrue);
+ poly_uint64 byte_vfalse = SUBREG_BYTE (vfalse);
rtx promoted_target;
if (GET_MODE (reg_vtrue) != GET_MODE (reg_vfalse)
- || byte_vtrue != byte_vfalse
+ || maybe_ne (byte_vtrue, byte_vfalse)
|| (SUBREG_PROMOTED_VAR_P (vtrue)
!= SUBREG_PROMOTED_VAR_P (vfalse))
|| (SUBREG_PROMOTED_GET (vtrue)
noce_emit_move_insn (if_info->x, target);
seq = end_ifcvt_sequence (if_info);
- if (!seq)
+ if (!seq || !targetm.noce_conversion_profitable_p (seq, if_info))
return FALSE;
emit_insn_before_setloc (seq, if_info->jump,
INSN_LOCATION (if_info->insn_a));
+ if_info->transform_name = "noce_try_cmove";
+
return TRUE;
}
/* If both a and b are constants try a last-ditch transformation:
we don't know about, so give them a chance before trying this
approach. */
else if (!targetm.have_conditional_execution ()
- && CONST_INT_P (if_info->a) && CONST_INT_P (if_info->b)
- && ((if_info->branch_cost >= 2 && STORE_FLAG_VALUE == -1)
- || if_info->branch_cost >= 3))
+ && CONST_INT_P (if_info->a) && CONST_INT_P (if_info->b))
{
machine_mode mode = GET_MODE (if_info->x);
HOST_WIDE_INT ifalse = INTVAL (if_info->a);
noce_emit_move_insn (if_info->x, target);
seq = end_ifcvt_sequence (if_info);
- if (!seq)
+ if (!seq || !targetm.noce_conversion_profitable_p (seq, if_info))
return FALSE;
emit_insn_before_setloc (seq, if_info->jump,
INSN_LOCATION (if_info->insn_a));
+ if_info->transform_name = "noce_try_cmove";
return TRUE;
}
else
return FALSE;
}
+/* Return true if X contains a conditional code mode rtx. */
+
+static bool
+contains_ccmode_rtx_p (rtx x)
+{
+ subrtx_iterator::array_type array;
+ FOR_EACH_SUBRTX (iter, array, x, ALL)
+ if (GET_MODE_CLASS (GET_MODE (*iter)) == MODE_CC)
+ return true;
+
+ return false;
+}
+
/* Helper for bb_valid_for_noce_process_p. Validate that
the rtx insn INSN is a single set that does not set
the conditional register CC and is in general valid for
/* Currently support only simple single sets in test_bb. */
if (!sset
|| !noce_operand_ok (SET_DEST (sset))
+ || contains_ccmode_rtx_p (SET_DEST (sset))
|| !noce_operand_ok (SET_SRC (sset)))
return false;
}
-/* Return true iff the registers that the insns in BB_A set do not
- get used in BB_B. */
+/* Return true iff the registers that the insns in BB_A set do not get
+ used in BB_B. If TO_RENAME is non-NULL then it is a location that will be
+ renamed later by the caller and so conflicts on it should be ignored
+ in this function. */
static bool
-bbs_ok_for_cmove_arith (basic_block bb_a, basic_block bb_b)
+bbs_ok_for_cmove_arith (basic_block bb_a, basic_block bb_b, rtx to_rename)
{
rtx_insn *a_insn;
bitmap bba_sets = BITMAP_ALLOC (®_obstack);
BITMAP_FREE (bba_sets);
return false;
}
-
/* Record all registers that BB_A sets. */
FOR_EACH_INSN_DEF (def, a_insn)
- bitmap_set_bit (bba_sets, DF_REF_REGNO (def));
+ if (!(to_rename && DF_REF_REG (def) == to_rename))
+ bitmap_set_bit (bba_sets, DF_REF_REGNO (def));
}
rtx_insn *b_insn;
}
/* Make sure this is a REG and not some instance
- of ZERO_EXTRACT or SUBREG or other dangerous stuff. */
- if (!REG_P (SET_DEST (sset_b)))
+ of ZERO_EXTRACT or SUBREG or other dangerous stuff.
+ If we have a memory destination then we have a pair of simple
+ basic blocks performing an operation of the form [addr] = c ? a : b.
+ bb_valid_for_noce_process_p will have ensured that these are
+ the only stores present. In that case [addr] should be the location
+ to be renamed. Assert that the callers set this up properly. */
+ if (MEM_P (SET_DEST (sset_b)))
+ gcc_assert (rtx_equal_p (SET_DEST (sset_b), to_rename));
+ else if (!REG_P (SET_DEST (sset_b)))
{
BITMAP_FREE (bba_sets);
return false;
rtx target;
int is_mem = 0;
enum rtx_code code;
+ rtx cond = if_info->cond;
rtx_insn *ifcvt_seq;
/* A conditional move from two memory sources is equivalent to a
conditional on their addresses followed by a load. Don't do this
early because it'll screw alias analysis. Note that we've
already checked for no side effects. */
- /* ??? FIXME: Magic number 5. */
if (cse_not_expected
&& MEM_P (a) && MEM_P (b)
- && MEM_ADDR_SPACE (a) == MEM_ADDR_SPACE (b)
- && if_info->branch_cost >= 5)
+ && MEM_ADDR_SPACE (a) == MEM_ADDR_SPACE (b))
{
machine_mode address_mode = get_address_mode (a);
x = y;
*/
- code = GET_CODE (if_info->cond);
+ code = GET_CODE (cond);
insn_a = if_info->insn_a;
insn_b = if_info->insn_b;
if (!can_conditionally_move_p (x_mode))
return FALSE;
- unsigned int then_cost;
- unsigned int else_cost;
- if (insn_a)
- then_cost = if_info->then_cost;
- else
- then_cost = 0;
-
- if (insn_b)
- else_cost = if_info->else_cost;
- else
- else_cost = 0;
-
- /* We're going to execute one of the basic blocks anyway, so
- bail out if the most expensive of the two blocks is unacceptable. */
- if (MAX (then_cost, else_cost) > COSTS_N_INSNS (if_info->branch_cost))
- return FALSE;
-
/* Possibly rearrange operands to make things come out more natural. */
- if (reversed_comparison_code (if_info->cond, if_info->jump) != UNKNOWN)
+ if (noce_reversed_cond_code (if_info) != UNKNOWN)
{
int reversep = 0;
if (rtx_equal_p (b, x))
if (reversep)
{
- code = reversed_comparison_code (if_info->cond, if_info->jump);
+ if (if_info->rev_cond)
+ {
+ cond = if_info->rev_cond;
+ code = GET_CODE (cond);
+ }
+ else
+ code = reversed_comparison_code (cond, if_info->jump);
std::swap (a, b);
std::swap (insn_a, insn_b);
std::swap (a_simple, b_simple);
}
}
- if (then_bb && else_bb && !a_simple && !b_simple
- && (!bbs_ok_for_cmove_arith (then_bb, else_bb)
- || !bbs_ok_for_cmove_arith (else_bb, then_bb)))
+ if (then_bb && else_bb
+ && (!bbs_ok_for_cmove_arith (then_bb, else_bb, if_info->orig_x)
+ || !bbs_ok_for_cmove_arith (else_bb, then_bb, if_info->orig_x)))
return FALSE;
start_sequence ();
emit might clobber the register used by B or A, so move it to a pseudo
first. */
+ rtx tmp_a = NULL_RTX;
+ rtx tmp_b = NULL_RTX;
+
if (b_simple || !else_bb)
- {
- rtx tmp_b = gen_reg_rtx (x_mode);
- /* Perform the simplest kind of set. The register allocator
- should remove it if it's not actually needed. If this set is not
- a valid insn (can happen on the is_mem path) then end_ifcvt_sequence
- will cancel the whole sequence. Don't try any of the fallback paths
- from noce_emit_move_insn since we want this to be the simplest kind
- of move. */
- emit_insn (gen_rtx_SET (tmp_b, b));
- b = tmp_b;
- }
+ tmp_b = gen_reg_rtx (x_mode);
if (a_simple || !then_bb)
- {
- rtx tmp_a = gen_reg_rtx (x_mode);
- emit_insn (gen_rtx_SET (tmp_a, a));
- a = tmp_a;
- }
+ tmp_a = gen_reg_rtx (x_mode);
orig_a = a;
orig_b = b;
rtx emit_a = NULL_RTX;
rtx emit_b = NULL_RTX;
-
+ rtx_insn *tmp_insn = NULL;
+ bool modified_in_a = false;
+ bool modified_in_b = false;
/* If either operand is complex, load it into a register first.
The best way to do this is to copy the original insn. In this
way we preserve any clobbers etc that the insn may have had.
This is of course not possible in the IS_MEM case. */
- if (! general_operand (a, GET_MODE (a)))
+ if (! general_operand (a, GET_MODE (a)) || tmp_a)
{
if (is_mem)
rtx reg = gen_reg_rtx (GET_MODE (a));
emit_a = gen_rtx_SET (reg, a);
}
- else if (! insn_a)
- goto end_seq_and_fail;
else
{
- a = gen_reg_rtx (GET_MODE (a));
- rtx_insn *copy_of_a = as_a <rtx_insn *> (copy_rtx (insn_a));
- rtx set = single_set (copy_of_a);
- SET_DEST (set) = a;
+ if (insn_a)
+ {
+ a = tmp_a ? tmp_a : gen_reg_rtx (GET_MODE (a));
+
+ rtx_insn *copy_of_a = as_a <rtx_insn *> (copy_rtx (insn_a));
+ rtx set = single_set (copy_of_a);
+ SET_DEST (set) = a;
- emit_a = PATTERN (copy_of_a);
+ emit_a = PATTERN (copy_of_a);
+ }
+ else
+ {
+ rtx tmp_reg = tmp_a ? tmp_a : gen_reg_rtx (GET_MODE (a));
+ emit_a = gen_rtx_SET (tmp_reg, a);
+ a = tmp_reg;
+ }
}
}
- if (! general_operand (b, GET_MODE (b)))
+ if (! general_operand (b, GET_MODE (b)) || tmp_b)
{
if (is_mem)
{
rtx reg = gen_reg_rtx (GET_MODE (b));
emit_b = gen_rtx_SET (reg, b);
}
- else if (! insn_b)
- goto end_seq_and_fail;
else
{
- b = gen_reg_rtx (GET_MODE (b));
- rtx_insn *copy_of_b = as_a <rtx_insn *> (copy_rtx (insn_b));
- rtx set = single_set (copy_of_b);
+ if (insn_b)
+ {
+ b = tmp_b ? tmp_b : gen_reg_rtx (GET_MODE (b));
+ rtx_insn *copy_of_b = as_a <rtx_insn *> (copy_rtx (insn_b));
+ rtx set = single_set (copy_of_b);
- SET_DEST (set) = b;
- emit_b = PATTERN (copy_of_b);
+ SET_DEST (set) = b;
+ emit_b = PATTERN (copy_of_b);
+ }
+ else
+ {
+ rtx tmp_reg = tmp_b ? tmp_b : gen_reg_rtx (GET_MODE (b));
+ emit_b = gen_rtx_SET (tmp_reg, b);
+ b = tmp_reg;
+ }
}
}
- /* If insn to set up A clobbers any registers B depends on, try to
- swap insn that sets up A with the one that sets up B. If even
- that doesn't help, punt. */
-
- if (emit_a && modified_in_p (orig_b, emit_a))
- {
- if (modified_in_p (orig_a, emit_b))
- goto end_seq_and_fail;
-
- if (else_bb && !b_simple)
+ modified_in_a = emit_a != NULL_RTX && modified_in_p (orig_b, emit_a);
+ if (tmp_b && then_bb)
+ {
+ FOR_BB_INSNS (then_bb, tmp_insn)
+ /* Don't check inside insn_a. We will have changed it to emit_a
+ with a destination that doesn't conflict. */
+ if (!(insn_a && tmp_insn == insn_a)
+ && modified_in_p (orig_b, tmp_insn))
{
- if (!noce_emit_bb (emit_b, else_bb, b_simple))
- goto end_seq_and_fail;
+ modified_in_a = true;
+ break;
}
- if (!noce_emit_bb (emit_a, then_bb, a_simple))
- goto end_seq_and_fail;
- }
- else
- {
- if (!noce_emit_bb (emit_a, then_bb, a_simple))
- goto end_seq_and_fail;
+ }
- if (!noce_emit_bb (emit_b, else_bb, b_simple))
- goto end_seq_and_fail;
+ modified_in_b = emit_b != NULL_RTX && modified_in_p (orig_a, emit_b);
+ if (tmp_a && else_bb)
+ {
+ FOR_BB_INSNS (else_bb, tmp_insn)
+ /* Don't check inside insn_b. We will have changed it to emit_b
+ with a destination that doesn't conflict. */
+ if (!(insn_b && tmp_insn == insn_b)
+ && modified_in_p (orig_a, tmp_insn))
+ {
+ modified_in_b = true;
+ break;
+ }
+ }
- }
+ /* If insn to set up A clobbers any registers B depends on, try to
+ swap insn that sets up A with the one that sets up B. If even
+ that doesn't help, punt. */
+ if (modified_in_a && !modified_in_b)
+ {
+ if (!noce_emit_bb (emit_b, else_bb, b_simple))
+ goto end_seq_and_fail;
+
+ if (!noce_emit_bb (emit_a, then_bb, a_simple))
+ goto end_seq_and_fail;
+ }
+ else if (!modified_in_a)
+ {
+ if (!noce_emit_bb (emit_a, then_bb, a_simple))
+ goto end_seq_and_fail;
+
+ if (!noce_emit_bb (emit_b, else_bb, b_simple))
+ goto end_seq_and_fail;
+ }
+ else
+ goto end_seq_and_fail;
- target = noce_emit_cmove (if_info, x, code, XEXP (if_info->cond, 0),
- XEXP (if_info->cond, 1), a, b);
+ target = noce_emit_cmove (if_info, x, code, XEXP (cond, 0), XEXP (cond, 1),
+ a, b);
if (! target)
goto end_seq_and_fail;
noce_emit_move_insn (x, target);
ifcvt_seq = end_ifcvt_sequence (if_info);
- if (!ifcvt_seq)
+ if (!ifcvt_seq || !targetm.noce_conversion_profitable_p (ifcvt_seq, if_info))
return FALSE;
emit_insn_before_setloc (ifcvt_seq, if_info->jump,
INSN_LOCATION (if_info->insn_a));
+ if_info->transform_name = "noce_try_cmove_arith";
return TRUE;
end_seq_and_fail:
cond = XEXP (SET_SRC (set), 0);
reverse
= GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
- && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (if_info->jump);
+ && label_ref_label (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (if_info->jump);
if (if_info->then_else_reversed)
reverse = !reverse;
switch (code)
{
case LT:
- if (actual_val == desired_val + 1)
+ if (desired_val != HOST_WIDE_INT_MAX
+ && actual_val == desired_val + 1)
{
code = LE;
op_b = GEN_INT (desired_val);
}
break;
case LE:
- if (actual_val == desired_val - 1)
+ if (desired_val != HOST_WIDE_INT_MIN
+ && actual_val == desired_val - 1)
{
code = LT;
op_b = GEN_INT (desired_val);
}
break;
case GT:
- if (actual_val == desired_val - 1)
+ if (desired_val != HOST_WIDE_INT_MIN
+ && actual_val == desired_val - 1)
{
code = GE;
op_b = GEN_INT (desired_val);
}
break;
case GE:
- if (actual_val == desired_val + 1)
+ if (desired_val != HOST_WIDE_INT_MAX
+ && actual_val == desired_val + 1)
{
code = GT;
op_b = GEN_INT (desired_val);
emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a));
if_info->cond = cond;
if_info->cond_earliest = earliest;
+ if_info->rev_cond = NULL_RTX;
+ if_info->transform_name = "noce_try_minmax";
return TRUE;
}
/* Work around funny ideas get_condition has wrt canonicalization.
Note that these rtx constants are known to be CONST_INT, and
- therefore imply integer comparisons. */
+ therefore imply integer comparisons.
+ The one_cmpl case is more complicated, as we want to handle
+ only x < 0 ? ~x : x or x >= 0 ? x : ~x to one_cmpl_abs (x)
+ and x < 0 ? x : ~x or x >= 0 ? ~x : x to ~one_cmpl_abs (x),
+ but not other cases (x > -1 is equivalent of x >= 0). */
if (c == constm1_rtx && GET_CODE (cond) == GT)
;
else if (c == const1_rtx && GET_CODE (cond) == LT)
- ;
- else if (c != CONST0_RTX (GET_MODE (b)))
+ {
+ if (one_cmpl)
+ return FALSE;
+ }
+ else if (c == CONST0_RTX (GET_MODE (b)))
+ {
+ if (one_cmpl
+ && GET_CODE (cond) != GE
+ && GET_CODE (cond) != LT)
+ return FALSE;
+ }
+ else
return FALSE;
/* Determine what sort of operation this is. */
emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a));
if_info->cond = cond;
if_info->cond_earliest = earliest;
+ if_info->rev_cond = NULL_RTX;
+ if_info->transform_name = "noce_try_abs";
return TRUE;
}
&& (if_info->insn_b == NULL_RTX
|| BLOCK_FOR_INSN (if_info->insn_b) == if_info->test_bb));
if (!(t_unconditional
- || (set_src_cost (t, mode, optimize_bb_for_speed_p (if_info->test_bb))
+ || (set_src_cost (t, mode, if_info->speed_p)
< COSTS_N_INSNS (2))))
return FALSE;
return FALSE;
emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a));
+ if_info->transform_name = "noce_try_sign_mask";
+
return TRUE;
}
{
rtx cond, x, a, result;
rtx_insn *seq;
- machine_mode mode;
+ scalar_int_mode mode;
enum rtx_code code;
int bitnum;
cond = if_info->cond;
code = GET_CODE (cond);
+ /* Check for an integer operation. */
+ if (!is_a <scalar_int_mode> (GET_MODE (x), &mode))
+ return FALSE;
+
if (!noce_simple_bbs (if_info))
return FALSE;
|| ! rtx_equal_p (x, XEXP (cond, 0)))
return FALSE;
bitnum = INTVAL (XEXP (cond, 2));
- mode = GET_MODE (x);
if (BITS_BIG_ENDIAN)
bitnum = GET_MODE_BITSIZE (mode) - 1 - bitnum;
if (bitnum < 0 || bitnum >= HOST_BITS_PER_WIDE_INT)
if (! rtx_equal_p (x, XEXP (a, 0))
|| !CONST_INT_P (XEXP (a, 1))
|| (INTVAL (XEXP (a, 1)) & GET_MODE_MASK (mode))
- != (unsigned HOST_WIDE_INT) 1 << bitnum)
+ != HOST_WIDE_INT_1U << bitnum)
return FALSE;
/* if ((x & C) == 0) x |= C; is transformed to x |= C. */
else if (code == NE)
{
/* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
- result = gen_int_mode ((HOST_WIDE_INT) 1 << bitnum, mode);
+ result = gen_int_mode (HOST_WIDE_INT_1 << bitnum, mode);
result = simplify_gen_binary (IOR, mode, x, result);
}
else
{
/* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
- result = gen_int_mode (~((HOST_WIDE_INT) 1 << bitnum), mode);
+ result = gen_int_mode (~(HOST_WIDE_INT_1 << bitnum), mode);
result = simplify_gen_binary (AND, mode, x, result);
}
}
if (! rtx_equal_p (x, XEXP (a, 0))
|| !CONST_INT_P (XEXP (a, 1))
|| (INTVAL (XEXP (a, 1)) & GET_MODE_MASK (mode))
- != (~((HOST_WIDE_INT) 1 << bitnum) & GET_MODE_MASK (mode)))
+ != (~(HOST_WIDE_INT_1 << bitnum) & GET_MODE_MASK (mode)))
return FALSE;
/* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
emit_insn_before_setloc (seq, if_info->jump,
INSN_LOCATION (if_info->insn_a));
}
+ if_info->transform_name = "noce_try_bitop";
return TRUE;
}
/* If this branches to JUMP_LABEL when the condition is false,
reverse the condition. */
reverse = (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
- && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (jump));
+ && label_ref_label (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (jump));
/* We may have to reverse because the caller's if block is not canonical,
i.e. the THEN block isn't the fallthrough block for the TEST block
return ! may_trap_p (op);
}
-/* Return true if a write into MEM may trap or fault. */
-
-static bool
-noce_mem_write_may_trap_or_fault_p (const_rtx mem)
-{
- rtx addr;
-
- if (MEM_READONLY_P (mem))
- return true;
-
- if (may_trap_or_fault_p (mem))
- return true;
-
- addr = XEXP (mem, 0);
-
- /* Call target hook to avoid the effects of -fpic etc.... */
- addr = targetm.delegitimize_address (addr);
-
- while (addr)
- switch (GET_CODE (addr))
- {
- case CONST:
- case PRE_DEC:
- case PRE_INC:
- case POST_DEC:
- case POST_INC:
- case POST_MODIFY:
- addr = XEXP (addr, 0);
- break;
- case LO_SUM:
- case PRE_MODIFY:
- addr = XEXP (addr, 1);
- break;
- case PLUS:
- if (CONST_INT_P (XEXP (addr, 1)))
- addr = XEXP (addr, 0);
- else
- return false;
- break;
- case LABEL_REF:
- return true;
- case SYMBOL_REF:
- if (SYMBOL_REF_DECL (addr)
- && decl_readonly_section (SYMBOL_REF_DECL (addr), 0))
- return true;
- return false;
- default:
- return false;
- }
-
- return false;
-}
-
-/* Return whether we can use store speculation for MEM. TOP_BB is the
- basic block above the conditional block where we are considering
- doing the speculative store. We look for whether MEM is set
- unconditionally later in the function. */
-
-static bool
-noce_can_store_speculate_p (basic_block top_bb, const_rtx mem)
-{
- basic_block dominator;
-
- for (dominator = get_immediate_dominator (CDI_POST_DOMINATORS, top_bb);
- dominator != NULL;
- dominator = get_immediate_dominator (CDI_POST_DOMINATORS, dominator))
- {
- rtx_insn *insn;
-
- FOR_BB_INSNS (dominator, insn)
- {
- /* If we see something that might be a memory barrier, we
- have to stop looking. Even if the MEM is set later in
- the function, we still don't want to set it
- unconditionally before the barrier. */
- if (INSN_P (insn)
- && (volatile_insn_p (PATTERN (insn))
- || (CALL_P (insn) && (!RTL_CONST_CALL_P (insn)))))
- return false;
-
- if (memory_must_be_modified_in_insn_p (mem, insn))
- return true;
- if (modified_in_p (XEXP (mem, 0), insn))
- return false;
-
- }
- }
-
- return false;
-}
-
-/* Return true if X contains a MEM subrtx. */
-
-static bool
-contains_mem_rtx_p (rtx x)
-{
- subrtx_iterator::array_type array;
- FOR_EACH_SUBRTX (iter, array, x, ALL)
- if (MEM_P (*iter))
- return true;
-
- return false;
-}
-
/* Return true iff basic block TEST_BB is valid for noce if-conversion.
The condition used in this if-conversion is in COND.
In practice, check that TEST_BB ends with a single set
x := a and all previous computations
in TEST_BB don't produce any values that are live after TEST_BB.
In other words, all the insns in TEST_BB are there only
- to compute a value for x. Put the rtx cost of the insns
- in TEST_BB into COST. Record whether TEST_BB is a single simple
+ to compute a value for x. Add the rtx cost of the insns
+ in TEST_BB to COST. Record whether TEST_BB is a single simple
set instruction in SIMPLE_P. */
static bool
if (first_insn == last_insn)
{
*simple_p = noce_operand_ok (SET_DEST (first_set));
- *cost = insn_rtx_cost (first_set, speed_p);
+ *cost += pattern_cost (first_set, speed_p);
return *simple_p;
}
/* The regs that are live out of test_bb. */
bitmap test_bb_live_out = df_get_live_out (test_bb);
- int potential_cost = insn_rtx_cost (last_set, speed_p);
+ int potential_cost = pattern_cost (last_set, speed_p);
rtx_insn *insn;
FOR_BB_INSNS (test_bb, insn)
{
gcc_assert (sset);
if (contains_mem_rtx_p (SET_SRC (sset))
- || !REG_P (SET_DEST (sset)))
+ || !REG_P (SET_DEST (sset))
+ || reg_overlap_mentioned_p (SET_DEST (sset), cond))
goto free_bitmap_and_fail;
- potential_cost += insn_rtx_cost (sset, speed_p);
+ potential_cost += pattern_cost (sset, speed_p);
bitmap_set_bit (test_bb_temps, REGNO (SET_DEST (sset)));
}
}
goto free_bitmap_and_fail;
BITMAP_FREE (test_bb_temps);
- *cost = potential_cost;
+ *cost += potential_cost;
*simple_p = false;
return true;
return false;
}
+/* We have something like:
+
+ if (x > y)
+ { i = a; j = b; k = c; }
+
+ Make it:
+
+ tmp_i = (x > y) ? a : i;
+ tmp_j = (x > y) ? b : j;
+ tmp_k = (x > y) ? c : k;
+ i = tmp_i;
+ j = tmp_j;
+ k = tmp_k;
+
+ Subsequent passes are expected to clean up the extra moves.
+
+ Look for special cases such as writes to one register which are
+ read back in another SET, as might occur in a swap idiom or
+ similar.
+
+ These look like:
+
+ if (x > y)
+ i = a;
+ j = i;
+
+ Which we want to rewrite to:
+
+ tmp_i = (x > y) ? a : i;
+ tmp_j = (x > y) ? tmp_i : j;
+ i = tmp_i;
+ j = tmp_j;
+
+ We can catch these when looking at (SET x y) by keeping a list of the
+ registers we would have targeted before if-conversion and looking back
+ through it for an overlap with Y. If we find one, we rewire the
+ conditional set to use the temporary we introduced earlier.
+
+ IF_INFO contains the useful information about the block structure and
+ jump instructions. */
+
+static int
+noce_convert_multiple_sets (struct noce_if_info *if_info)
+{
+ basic_block test_bb = if_info->test_bb;
+ basic_block then_bb = if_info->then_bb;
+ basic_block join_bb = if_info->join_bb;
+ rtx_insn *jump = if_info->jump;
+ rtx_insn *cond_earliest;
+ rtx_insn *insn;
+
+ start_sequence ();
+
+ /* Decompose the condition attached to the jump. */
+ rtx cond = noce_get_condition (jump, &cond_earliest, false);
+ rtx x = XEXP (cond, 0);
+ rtx y = XEXP (cond, 1);
+ rtx_code cond_code = GET_CODE (cond);
+
+ /* The true targets for a conditional move. */
+ auto_vec<rtx> targets;
+ /* The temporaries introduced to allow us to not consider register
+ overlap. */
+ auto_vec<rtx> temporaries;
+ /* The insns we've emitted. */
+ auto_vec<rtx_insn *> unmodified_insns;
+ int count = 0;
+
+ FOR_BB_INSNS (then_bb, insn)
+ {
+ /* Skip over non-insns. */
+ if (!active_insn_p (insn))
+ continue;
+
+ rtx set = single_set (insn);
+ gcc_checking_assert (set);
+
+ rtx target = SET_DEST (set);
+ rtx temp = gen_reg_rtx (GET_MODE (target));
+ rtx new_val = SET_SRC (set);
+ rtx old_val = target;
+
+ /* If we were supposed to read from an earlier write in this block,
+ we've changed the register allocation. Rewire the read. While
+ we are looking, also try to catch a swap idiom. */
+ for (int i = count - 1; i >= 0; --i)
+ if (reg_overlap_mentioned_p (new_val, targets[i]))
+ {
+ /* Catch a "swap" style idiom. */
+ if (find_reg_note (insn, REG_DEAD, new_val) != NULL_RTX)
+ /* The write to targets[i] is only live until the read
+ here. As the condition codes match, we can propagate
+ the set to here. */
+ new_val = SET_SRC (single_set (unmodified_insns[i]));
+ else
+ new_val = temporaries[i];
+ break;
+ }
+
+ /* If we had a non-canonical conditional jump (i.e. one where
+ the fallthrough is to the "else" case) we need to reverse
+ the conditional select. */
+ if (if_info->then_else_reversed)
+ std::swap (old_val, new_val);
+
+
+ /* We allow simple lowpart register subreg SET sources in
+ bb_ok_for_noce_convert_multiple_sets. Be careful when processing
+ sequences like:
+ (set (reg:SI r1) (reg:SI r2))
+ (set (reg:HI r3) (subreg:HI (r1)))
+ For the second insn new_val or old_val (r1 in this example) will be
+ taken from the temporaries and have the wider mode which will not
+ match with the mode of the other source of the conditional move, so
+ we'll end up trying to emit r4:HI = cond ? (r1:SI) : (r3:HI).
+ Wrap the two cmove operands into subregs if appropriate to prevent
+ that. */
+ if (GET_MODE (new_val) != GET_MODE (temp))
+ {
+ machine_mode src_mode = GET_MODE (new_val);
+ machine_mode dst_mode = GET_MODE (temp);
+ if (!partial_subreg_p (dst_mode, src_mode))
+ {
+ end_sequence ();
+ return FALSE;
+ }
+ new_val = lowpart_subreg (dst_mode, new_val, src_mode);
+ }
+ if (GET_MODE (old_val) != GET_MODE (temp))
+ {
+ machine_mode src_mode = GET_MODE (old_val);
+ machine_mode dst_mode = GET_MODE (temp);
+ if (!partial_subreg_p (dst_mode, src_mode))
+ {
+ end_sequence ();
+ return FALSE;
+ }
+ old_val = lowpart_subreg (dst_mode, old_val, src_mode);
+ }
+
+ /* Actually emit the conditional move. */
+ rtx temp_dest = noce_emit_cmove (if_info, temp, cond_code,
+ x, y, new_val, old_val);
+
+ /* If we failed to expand the conditional move, drop out and don't
+ try to continue. */
+ if (temp_dest == NULL_RTX)
+ {
+ end_sequence ();
+ return FALSE;
+ }
+
+ /* Bookkeeping. */
+ count++;
+ targets.safe_push (target);
+ temporaries.safe_push (temp_dest);
+ unmodified_insns.safe_push (insn);
+ }
+
+ /* We must have seen some sort of insn to insert, otherwise we were
+ given an empty BB to convert, and we can't handle that. */
+ gcc_assert (!unmodified_insns.is_empty ());
+
+ /* Now fixup the assignments. */
+ for (int i = 0; i < count; i++)
+ noce_emit_move_insn (targets[i], temporaries[i]);
+
+ /* Actually emit the sequence if it isn't too expensive. */
+ rtx_insn *seq = get_insns ();
+
+ if (!targetm.noce_conversion_profitable_p (seq, if_info))
+ {
+ end_sequence ();
+ return FALSE;
+ }
+
+ for (insn = seq; insn; insn = NEXT_INSN (insn))
+ set_used_flags (insn);
+
+ /* Mark all our temporaries and targets as used. */
+ for (int i = 0; i < count; i++)
+ {
+ set_used_flags (temporaries[i]);
+ set_used_flags (targets[i]);
+ }
+
+ set_used_flags (cond);
+ set_used_flags (x);
+ set_used_flags (y);
+
+ unshare_all_rtl_in_chain (seq);
+ end_sequence ();
+
+ if (!seq)
+ return FALSE;
+
+ for (insn = seq; insn; insn = NEXT_INSN (insn))
+ if (JUMP_P (insn)
+ || recog_memoized (insn) == -1)
+ return FALSE;
+
+ emit_insn_before_setloc (seq, if_info->jump,
+ INSN_LOCATION (unmodified_insns.last ()));
+
+ /* Clean up THEN_BB and the edges in and out of it. */
+ remove_edge (find_edge (test_bb, join_bb));
+ remove_edge (find_edge (then_bb, join_bb));
+ redirect_edge_and_branch_force (single_succ_edge (test_bb), join_bb);
+ delete_basic_block (then_bb);
+ num_true_changes++;
+
+ /* Maybe merge blocks now the jump is simple enough. */
+ if (can_merge_blocks_p (test_bb, join_bb))
+ {
+ merge_blocks (test_bb, join_bb);
+ num_true_changes++;
+ }
+
+ num_updated_if_blocks++;
+ if_info->transform_name = "noce_convert_multiple_sets";
+ return TRUE;
+}
+
+/* Return true iff basic block TEST_BB is comprised of only
+ (SET (REG) (REG)) insns suitable for conversion to a series
+ of conditional moves. Also check that we have more than one set
+ (other routines can handle a single set better than we would), and
+ fewer than PARAM_MAX_RTL_IF_CONVERSION_INSNS sets. */
+
+static bool
+bb_ok_for_noce_convert_multiple_sets (basic_block test_bb)
+{
+ rtx_insn *insn;
+ unsigned count = 0;
+ unsigned param = PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS);
+
+ FOR_BB_INSNS (test_bb, insn)
+ {
+ /* Skip over notes etc. */
+ if (!active_insn_p (insn))
+ continue;
+
+ /* We only handle SET insns. */
+ rtx set = single_set (insn);
+ if (set == NULL_RTX)
+ return false;
+
+ rtx dest = SET_DEST (set);
+ rtx src = SET_SRC (set);
+
+ /* We can possibly relax this, but for now only handle REG to REG
+ (including subreg) moves. This avoids any issues that might come
+ from introducing loads/stores that might violate data-race-freedom
+ guarantees. */
+ if (!REG_P (dest))
+ return false;
+
+ if (!(REG_P (src)
+ || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src))
+ && subreg_lowpart_p (src))))
+ return false;
+
+ /* Destination must be appropriate for a conditional write. */
+ if (!noce_operand_ok (dest))
+ return false;
+
+ /* We must be able to conditionally move in this mode. */
+ if (!can_conditionally_move_p (GET_MODE (dest)))
+ return false;
+
+ count++;
+ }
+
+ /* If we would only put out one conditional move, the other strategies
+ this pass tries are better optimized and will be more appropriate.
+ Some targets want to strictly limit the number of conditional moves
+ that are emitted, they set this through PARAM, we need to respect
+ that. */
+ return count > 1 && count <= param;
+}
+
/* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
it without using conditional execution. Return TRUE if we were successful
at converting the block. */
(1) if (...) x = a; else x = b;
(2) x = b; if (...) x = a;
(3) if (...) x = a; // as if with an initial x = x.
-
+ (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
The later patterns require jumps to be more expensive.
For the if (...) x = a; else x = b; case we allow multiple insns
inside the then and else blocks as long as their only effect is
to calculate a value for x.
- ??? For future expansion, look for multiple X in such patterns. */
+ ??? For future expansion, further expand the "multiple X" rules. */
- if (! bb_valid_for_noce_process_p (then_bb, cond, &if_info->then_cost,
+ /* First look for multiple SETS. */
+ if (!else_bb
+ && HAVE_conditional_move
+ && !HAVE_cc0
+ && bb_ok_for_noce_convert_multiple_sets (then_bb))
+ {
+ if (noce_convert_multiple_sets (if_info))
+ {
+ if (dump_file && if_info->transform_name)
+ fprintf (dump_file, "if-conversion succeeded through %s\n",
+ if_info->transform_name);
+ return TRUE;
+ }
+ }
+
+ bool speed_p = optimize_bb_for_speed_p (test_bb);
+ unsigned int then_cost = 0, else_cost = 0;
+ if (!bb_valid_for_noce_process_p (then_bb, cond, &then_cost,
&if_info->then_simple))
return false;
if (else_bb
- && ! bb_valid_for_noce_process_p (else_bb, cond, &if_info->else_cost,
- &if_info->else_simple))
+ && !bb_valid_for_noce_process_p (else_bb, cond, &else_cost,
+ &if_info->else_simple))
return false;
+ if (else_bb == NULL)
+ if_info->original_cost += then_cost;
+ else if (speed_p)
+ if_info->original_cost += MIN (then_cost, else_cost);
+ else
+ if_info->original_cost += then_cost + else_cost;
+
insn_a = last_active_insn (then_bb, FALSE);
set_a = single_set (insn_a);
gcc_assert (set_a);
}
else
{
- insn_b = prev_nonnote_nondebug_insn (if_info->cond_earliest);
+ insn_b = if_info->cond_earliest;
+ do
+ insn_b = prev_nonnote_nondebug_insn (insn_b);
+ while (insn_b
+ && (BLOCK_FOR_INSN (insn_b)
+ == BLOCK_FOR_INSN (if_info->cond_earliest))
+ && !modified_in_p (x, insn_b));
+
/* We're going to be moving the evaluation of B down from above
COND_EARLIEST to JUMP. Make sure the relevant data is still
intact. */
/* Only operate on register destinations, and even then avoid extending
the lifetime of hard registers on small register class machines. */
orig_x = x;
+ if_info->orig_x = orig_x;
if (!REG_P (x)
|| (HARD_REGISTER_P (x)
&& targetm.small_register_classes_for_mode_p (GET_MODE (x))))
}
if (!set_b && MEM_P (orig_x))
- {
- /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
- for optimizations if writing to x may trap or fault,
- i.e. it's a memory other than a static var or a stack slot,
- is misaligned on strict aligned machines or is read-only. If
- x is a read-only memory, then the program is valid only if we
- avoid the store into it. If there are stores on both the
- THEN and ELSE arms, then we can go ahead with the conversion;
- either the program is broken, or the condition is always
- false such that the other memory is selected. */
- if (noce_mem_write_may_trap_or_fault_p (orig_x))
- return FALSE;
-
- /* Avoid store speculation: given "if (...) x = a" where x is a
- MEM, we only want to do the store if x is always set
- somewhere in the function. This avoids cases like
- if (pthread_mutex_trylock(mutex))
- ++global_variable;
- where we only want global_variable to be changed if the mutex
- is held. FIXME: This should ideally be expressed directly in
- RTL somehow. */
- if (!noce_can_store_speculate_p (test_bb, orig_x))
- return FALSE;
- }
+ /* We want to avoid store speculation to avoid cases like
+ if (pthread_mutex_trylock(mutex))
+ ++global_variable;
+ Rather than go to much effort here, we rely on the SSA optimizers,
+ which do a good enough job these days. */
+ return FALSE;
if (noce_try_move (if_info))
goto success;
+ if (noce_try_ifelse_collapse (if_info))
+ goto success;
if (noce_try_store_flag (if_info))
goto success;
if (noce_try_bitop (if_info))
goto success;
if (noce_try_abs (if_info))
goto success;
+ if (noce_try_inverse_constants (if_info))
+ goto success;
if (!targetm.have_conditional_execution ()
&& noce_try_store_flag_constants (if_info))
goto success;
return FALSE;
success:
+ if (dump_file && if_info->transform_name)
+ fprintf (dump_file, "if-conversion succeeded through %s\n",
+ if_info->transform_name);
/* If we used a temporary, fix it up now. */
if (orig_x != x)
vec<rtx> else_regs = vNULL;
unsigned int i;
int success_p = FALSE;
+ int limit = PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS);
/* Build a mapping for each block to the value used for each
register. */
is the number of assignments currently made in only one of the
branches, since if we convert we are going to always execute
them. */
- if (c > MAX_CONDITIONAL_EXECUTE)
+ if (c > MAX_CONDITIONAL_EXECUTE
+ || c > limit)
goto done;
/* Try to emit the conditional moves. First do the then block,
}
num_updated_if_blocks++;
-
success_p = TRUE;
done:
rtx cond;
rtx_insn *cond_earliest;
struct noce_if_info if_info;
+ bool speed_p = optimize_bb_for_speed_p (test_bb);
/* We only ever should get here before reload. */
gcc_assert (!reload_completed);
}
/* If the conditional jump is more than just a conditional
- jump, then we can not do if-conversion on this block. */
+ jump, then we cannot do if-conversion on this block. */
jump = BB_END (test_bb);
if (! onlyjump_p (jump))
return FALSE;
if_info.else_bb = else_bb;
if_info.join_bb = join_bb;
if_info.cond = cond;
+ rtx_insn *rev_cond_earliest;
+ if_info.rev_cond = noce_get_condition (jump, &rev_cond_earliest,
+ !then_else_reversed);
+ gcc_assert (if_info.rev_cond == NULL_RTX
+ || rev_cond_earliest == cond_earliest);
if_info.cond_earliest = cond_earliest;
if_info.jump = jump;
if_info.then_else_reversed = then_else_reversed;
- if_info.branch_cost = BRANCH_COST (optimize_bb_for_speed_p (test_bb),
- predictable_edge_p (then_edge));
+ if_info.speed_p = speed_p;
+ if_info.max_seq_cost
+ = targetm.max_noce_ifcvt_seq_cost (then_edge);
+ /* We'll add in the cost of THEN_BB and ELSE_BB later, when we check
+ that they are valid to transform. We can't easily get back to the insn
+ for COND (and it may not exist if we had to canonicalize to get COND),
+ and jump_insns are always given a cost of 1 by seq_cost, so treat
+ both instructions as having cost COSTS_N_INSNS (1). */
+ if_info.original_cost = COSTS_N_INSNS (2);
+
/* Do the real work. */
rtx_insn *trap, *jump;
rtx cond;
rtx_insn *cond_earliest;
- enum rtx_code code;
/* Locate the block with the trap instruction. */
/* ??? While we look for no successors, we really ought to allow
/* If this is not a standard conditional jump, we can't parse it. */
jump = BB_END (test_bb);
- cond = noce_get_condition (jump, &cond_earliest, false);
+ cond = noce_get_condition (jump, &cond_earliest, then_bb == trap_bb);
if (! cond)
return FALSE;
/* If the conditional jump is more than just a conditional jump, then
- we can not do if-conversion on this block. */
- if (! onlyjump_p (jump))
+ we cannot do if-conversion on this block. Give up for returnjump_p,
+ changing a conditional return followed by unconditional trap for
+ conditional trap followed by unconditional return is likely not
+ beneficial and harder to handle. */
+ if (! onlyjump_p (jump) || returnjump_p (jump))
return FALSE;
/* We must be comparing objects whose modes imply the size. */
if (GET_MODE (XEXP (cond, 0)) == BLKmode)
return FALSE;
- /* Reverse the comparison code, if necessary. */
- code = GET_CODE (cond);
- if (then_bb == trap_bb)
- {
- code = reversed_comparison_code (cond, jump);
- if (code == UNKNOWN)
- return FALSE;
- }
-
/* Attempt to generate the conditional trap. */
- rtx_insn *seq = gen_cond_trap (code, copy_rtx (XEXP (cond, 0)),
+ rtx_insn *seq = gen_cond_trap (GET_CODE (cond), copy_rtx (XEXP (cond, 0)),
copy_rtx (XEXP (cond, 1)),
TRAP_CODE (PATTERN (trap)));
if (seq == NULL)
return FALSE;
+ /* If that results in an invalid insn, back out. */
+ for (rtx_insn *x = seq; x; x = NEXT_INSN (x))
+ if (recog_memoized (x) < 0)
+ return FALSE;
+
/* Emit the new insns before cond_earliest. */
emit_insn_before_setloc (seq, cond_earliest, INSN_LOCATION (trap));
basic_block then_bb = then_edge->dest;
basic_block else_bb = else_edge->dest;
basic_block new_bb;
- int then_bb_index, then_prob;
+ int then_bb_index;
+ profile_probability then_prob;
rtx else_target = NULL_RTX;
/* If we are partitioning hot/cold basic blocks, we don't want to
"\nIF-CASE-1 found, start %d, then %d\n",
test_bb->index, then_bb->index);
- if (then_edge->probability)
- then_prob = REG_BR_PROB_BASE - then_edge->probability;
- else
- then_prob = REG_BR_PROB_BASE / 2;
+ then_prob = then_edge->probability.invert ();
/* We're speculating from the THEN path, we want to make sure the cost
of speculation is within reason. */
num_true_changes++;
num_updated_if_blocks++;
-
return TRUE;
}
basic_block then_bb = then_edge->dest;
basic_block else_bb = else_edge->dest;
edge else_succ;
- int then_prob, else_prob;
+ profile_probability then_prob, else_prob;
/* We do not want to speculate (empty) loop latches. */
if (current_loops
if (then_bb->index < NUM_FIXED_BLOCKS)
return FALSE;
- if (else_edge->probability)
- {
- else_prob = else_edge->probability;
- then_prob = REG_BR_PROB_BASE - else_prob;
- }
- else
- {
- else_prob = REG_BR_PROB_BASE / 2;
- then_prob = REG_BR_PROB_BASE / 2;
- }
+ else_prob = else_edge->probability;
+ then_prob = else_prob.invert ();
/* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
if (else_prob > then_prob)
return FALSE;
rtx note = find_reg_note (jump, REG_BR_PROB, NULL_RTX);
- int prob_val = (note ? XINT (note, 0) : -1);
+ profile_probability prob_val
+ = (note ? profile_probability::from_reg_br_prob_note (XINT (note, 0))
+ : profile_probability::uninitialized ());
if (reversep)
{
return FALSE;
cond = gen_rtx_fmt_ee (rev, GET_MODE (cond), XEXP (cond, 0),
XEXP (cond, 1));
- if (prob_val >= 0)
- prob_val = REG_BR_PROB_BASE - prob_val;
+ prob_val = prob_val.invert ();
}
if (cond_exec_process_insns (NULL, head, end, cond, prob_val, 0)
redirect_edge_succ (BRANCH_EDGE (test_bb), new_dest);
if (reversep)
{
- std::swap (BRANCH_EDGE (test_bb)->count,
- FALLTHRU_EDGE (test_bb)->count);
std::swap (BRANCH_EDGE (test_bb)->probability,
FALLTHRU_EDGE (test_bb)->probability);
update_br_prob_note (test_bb);
if (optimize == 1)
df_remove_problem (df_live);
-#ifdef ENABLE_CHECKING
- verify_flow_info ();
-#endif
+ /* Some non-cold blocks may now be only reachable from cold blocks.
+ Fix that up. */
+ fixup_partitions ();
+
+ checking_verify_flow_info ();
}
\f
/* If-conversion and CFG cleanup. */
static unsigned int
rest_of_handle_if_conversion (void)
{
+ int flags = 0;
+
if (flag_if_conversion)
{
if (dump_file)
}
cleanup_cfg (CLEANUP_EXPENSIVE);
if_convert (false);
+ if (num_updated_if_blocks)
+ /* Get rid of any dead CC-related instructions. */
+ flags |= CLEANUP_FORCE_FAST_DCE;
}
- cleanup_cfg (0);
+ cleanup_cfg (flags);
return 0;
}
projects / platform / upstream / gcc.git / blobdiff