#include "flags.h"
#include "function.h"
#include "expr.h"
+#include "vecprim.h"
#include "regs.h"
#include "hard-reg-set.h"
#include "hashtab.h"
#include "ggc.h"
#include "debug.h"
#include "langhooks.h"
-#include "tree-pass.h"
#include "df.h"
#include "params.h"
#include "target.h"
-#include "tree-flow.h"
struct target_rtl default_target_rtl;
#if SWITCHABLE_TARGET
/* We record floating-point CONST_DOUBLEs in each floating-point mode for
the values of 0, 1, and 2. For the integer entries and VOIDmode, we
- record a copy of const[012]_rtx. */
+ record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
+ is set only for MODE_INT and MODE_VECTOR_INT modes. */
-rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
+rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
rtx const_true_rtx;
rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
+/* Standard pieces of rtx, to be substituted directly into things. */
+rtx pc_rtx;
+rtx ret_rtx;
+rtx simple_return_rtx;
+rtx cc0_rtx;
+
/* A hash table storing CONST_INTs whose absolute value is greater
than MAX_SAVED_CONST_INT. */
#define cur_insn_uid (crtl->emit.x_cur_insn_uid)
#define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
-#define last_location (crtl->emit.x_last_location)
#define first_label_num (crtl->emit.x_first_label_num)
-static rtx make_call_insn_raw (rtx);
static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
static void set_used_decls (tree);
static void mark_label_nuses (rtx);
if (CONST_INT_P (cst))
r = shwi_to_double_int (INTVAL (cst));
- else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
+ else if (CONST_DOUBLE_AS_INT_P (cst))
{
r.low = CONST_DOUBLE_LOW (cst);
r.high = CONST_DOUBLE_HIGH (cst);
/* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
of ints: I0 is the low-order word and I1 is the high-order word.
- Do not use this routine for non-integer modes; convert to
- REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
+ For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
+ implied upper bits are copies of the high bit of i1. The value
+ itself is neither signed nor unsigned. Do not use this routine for
+ non-integer modes; convert to REAL_VALUE_TYPE and use
+ CONST_DOUBLE_FROM_REAL_VALUE. */
rtx
immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
unsigned int i;
/* There are the following cases (note that there are no modes with
- HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
+ HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
gen_int_mode.
- 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
- the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
- from copies of the sign bit, and sign of i0 and i1 are the same), then
- we return a CONST_INT for i0.
+ 2) If the value of the integer fits into HOST_WIDE_INT anyway
+ (i.e., i1 consists only from copies of the sign bit, and sign
+ of i0 and i1 are the same), then we return a CONST_INT for i0.
3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
if (mode != VOIDmode)
{
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
return gen_int_mode (i0, mode);
-
- gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
}
/* If this integer fits in one word, return a CONST_INT. */
set_reg_attrs_from_value (rtx reg, rtx x)
{
int offset;
+ bool can_be_reg_pointer = true;
+
+ /* Don't call mark_reg_pointer for incompatible pointer sign
+ extension. */
+ while (GET_CODE (x) == SIGN_EXTEND
+ || GET_CODE (x) == ZERO_EXTEND
+ || GET_CODE (x) == TRUNCATE
+ || (GET_CODE (x) == SUBREG && subreg_lowpart_p (x)))
+ {
+#if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
+ if ((GET_CODE (x) == SIGN_EXTEND && POINTERS_EXTEND_UNSIGNED)
+ || (GET_CODE (x) != SIGN_EXTEND && ! POINTERS_EXTEND_UNSIGNED))
+ can_be_reg_pointer = false;
+#endif
+ x = XEXP (x, 0);
+ }
/* Hard registers can be reused for multiple purposes within the same
function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
if (MEM_OFFSET_KNOWN_P (x))
REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
MEM_OFFSET (x) + offset);
- if (MEM_POINTER (x))
+ if (can_be_reg_pointer && MEM_POINTER (x))
mark_reg_pointer (reg, 0);
}
else if (REG_P (x))
{
if (REG_ATTRS (x))
update_reg_offset (reg, x, offset);
- if (REG_POINTER (x))
+ if (can_be_reg_pointer && REG_POINTER (x))
mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
}
}
&& msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
else if (innermode == VOIDmode)
- innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
+ innermode = mode_for_size (HOST_BITS_PER_DOUBLE_INT, MODE_INT, 0);
xsize = GET_MODE_SIZE (innermode);
}
else if (GET_CODE (x) == SUBREG || REG_P (x)
|| GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
- || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
+ || CONST_DOUBLE_P (x) || CONST_INT_P (x))
return simplify_gen_subreg (mode, x, innermode, offset);
/* Otherwise, we can't do this. */
/* This function can't use
if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
|| (MAX (MEM_ALIGN (mem),
- get_object_alignment (MEM_EXPR (mem), align))
+ MAX (align, get_object_alignment (MEM_EXPR (mem))))
< align))
return -1;
else
HOST_WIDE_INT apply_bitpos = 0;
tree type;
struct mem_attrs attrs, *defattrs, *refattrs;
+ addr_space_t as;
/* It can happen that type_for_mode was given a mode for which there
is no language-level type. In which case it returns NULL, which
attrs.alias = get_alias_set (t);
MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
- MEM_IN_STRUCT_P (ref)
- = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
MEM_POINTER (ref) = POINTER_TYPE_P (type);
- /* If we are making an object of this type, or if this is a DECL, we know
- that it is a scalar if the type is not an aggregate. */
- if ((objectp || DECL_P (t))
- && ! AGGREGATE_TYPE_P (type)
- && TREE_CODE (type) != COMPLEX_TYPE)
- MEM_SCALAR_P (ref) = 1;
-
/* Default values from pre-existing memory attributes if present. */
refattrs = MEM_ATTRS (ref);
if (refattrs)
MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
base = get_base_address (t);
- if (base && DECL_P (base)
- && TREE_READONLY (base)
- && (TREE_STATIC (base) || DECL_EXTERNAL (base))
- && !TREE_THIS_VOLATILE (base))
- MEM_READONLY_P (ref) = 1;
+ if (base)
+ {
+ if (DECL_P (base)
+ && TREE_READONLY (base)
+ && (TREE_STATIC (base) || DECL_EXTERNAL (base))
+ && !TREE_THIS_VOLATILE (base))
+ MEM_READONLY_P (ref) = 1;
+
+ /* Mark static const strings readonly as well. */
+ if (TREE_CODE (base) == STRING_CST
+ && TREE_READONLY (base)
+ && TREE_STATIC (base))
+ MEM_READONLY_P (ref) = 1;
+
+ if (TREE_CODE (base) == MEM_REF
+ || TREE_CODE (base) == TARGET_MEM_REF)
+ as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base,
+ 0))));
+ else
+ as = TYPE_ADDR_SPACE (TREE_TYPE (base));
+ }
+ else
+ as = TYPE_ADDR_SPACE (type);
/* If this expression uses it's parent's alias set, mark it such
that we won't change it. */
/* ??? Any reason the field size would be different than
the size we got from the type? */
}
-
- /* If this is an indirect reference, record it. */
- else if (TREE_CODE (t) == MEM_REF)
- {
- attrs.expr = t;
- attrs.offset_known_p = true;
- attrs.offset = 0;
- apply_bitpos = bitpos;
- }
}
/* If this is an indirect reference, record it. */
apply_bitpos = bitpos;
}
- if (!align_computed && !INDIRECT_REF_P (t))
+ if (!align_computed)
{
- unsigned int obj_align = get_object_alignment (t, BIGGEST_ALIGNMENT);
+ unsigned int obj_align = get_object_alignment (t);
attrs.align = MAX (attrs.align, obj_align);
}
}
+ else
+ as = TYPE_ADDR_SPACE (type);
/* If we modified OFFSET based on T, then subtract the outstanding
bit position offset. Similarly, increase the size of the accessed
}
/* Now set the attributes we computed above. */
- attrs.addrspace = TYPE_ADDR_SPACE (type);
+ attrs.addrspace = as;
set_mem_attrs (ref, &attrs);
-
- /* If this is already known to be a scalar or aggregate, we are done. */
- if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
- return;
-
- /* If it is a reference into an aggregate, this is part of an aggregate.
- Otherwise we don't know. */
- else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
- || TREE_CODE (t) == ARRAY_RANGE_REF
- || TREE_CODE (t) == BIT_FIELD_REF)
- MEM_IN_STRUCT_P (ref) = 1;
}
void
/* Convert a possibly large offset to a signed value within the
range of the target address space. */
- address_mode = targetm.addr_space.address_mode (attrs.addrspace);
+ address_mode = get_address_mode (memref);
pbits = GET_MODE_BITSIZE (address_mode);
if (HOST_BITS_PER_WIDE_INT > pbits)
{
&& (unsigned HOST_WIDE_INT) offset
< GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
- plus_constant (XEXP (addr, 1), offset));
+ plus_constant (address_mode,
+ XEXP (addr, 1), offset));
else
- addr = plus_constant (addr, offset);
+ addr = plus_constant (address_mode, addr, offset);
}
new_rtx = change_address_1 (memref, mode, addr, validate);
struct mem_attrs attrs, *defattrs;
attrs = *get_mem_attrs (memref);
- address_mode = targetm.addr_space.address_mode (attrs.addrspace);
+ address_mode = get_address_mode (memref);
new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
/* At this point we don't know _why_ the address is invalid. It
{
reset_used_flags (PATTERN (p));
reset_used_flags (REG_NOTES (p));
+ if (CALL_P (p))
+ reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
}
/* Make sure that virtual stack slots are not shared. */
return 0;
}
-struct rtl_opt_pass pass_unshare_all_rtl =
-{
- {
- RTL_PASS,
- "unshare", /* name */
- NULL, /* gate */
- unshare_all_rtl, /* execute */
- NULL, /* sub */
- NULL, /* next */
- 0, /* static_pass_number */
- TV_NONE, /* tv_id */
- 0, /* properties_required */
- 0, /* properties_provided */
- 0, /* properties_destroyed */
- 0, /* todo_flags_start */
- TODO_verify_rtl_sharing /* todo_flags_finish */
- }
-};
-
/* Check that ORIG is not marked when it should not be and mark ORIG as in use,
Recursively does the same for subexpressions. */
case PC:
case CC0:
case RETURN:
+ case SIMPLE_RETURN:
case SCRATCH:
return;
/* SCRATCH must be shared because they represent distinct values. */
{
reset_used_flags (PATTERN (p));
reset_used_flags (REG_NOTES (p));
+ if (CALL_P (p))
+ reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
if (GET_CODE (PATTERN (p)) == SEQUENCE)
{
int i;
gcc_assert (INSN_P (q));
reset_used_flags (PATTERN (q));
reset_used_flags (REG_NOTES (q));
+ if (CALL_P (q))
+ reset_used_flags (CALL_INSN_FUNCTION_USAGE (q));
}
}
}
{
verify_rtx_sharing (PATTERN (p), p);
verify_rtx_sharing (REG_NOTES (p), p);
+ if (CALL_P (p))
+ verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (p), p);
}
timevar_pop (TV_VERIFY_RTL_SHARING);
{
PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
+ if (CALL_P (insn))
+ CALL_INSN_FUNCTION_USAGE (insn)
+ = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn));
}
}
case CODE_LABEL:
case PC:
case CC0:
+ case RETURN:
+ case SIMPLE_RETURN:
case SCRATCH:
/* SCRATCH must be shared because they represent distinct values. */
return;
case CODE_LABEL:
case PC:
case CC0:
+ case RETURN:
+ case SIMPLE_RETURN:
return;
case DEBUG_INSN:
return insn;
}
-/* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
-
-rtx
-prev_label (rtx insn)
-{
- while (insn)
- {
- insn = PREV_INSN (insn);
- if (insn == 0 || LABEL_P (insn))
- break;
- }
-
- return insn;
-}
-
/* Return the last label to mark the same position as LABEL. Return LABEL
itself if it is null or any return rtx. */
case REG_NORETURN:
case REG_SETJMP:
+ case REG_TM:
for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
{
if (CALL_P (insn))
/* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
-rtx
+static rtx
make_debug_insn_raw (rtx pattern)
{
rtx insn;
/* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
-rtx
+static rtx
make_jump_insn_raw (rtx pattern)
{
rtx insn;
rtx
emit_label_before (rtx label, rtx before)
{
- /* This can be called twice for the same label as a result of the
- confusion that follows a syntax error! So make it harmless. */
- if (INSN_UID (label) == 0)
- {
- INSN_UID (label) = cur_insn_uid++;
- add_insn_before (label, before, NULL);
- }
-
+ gcc_checking_assert (INSN_UID (label) == 0);
+ INSN_UID (label) = cur_insn_uid++;
+ add_insn_before (label, before, NULL);
return label;
}
rtx
emit_label_after (rtx label, rtx after)
{
- /* This can be called twice for the same label
- as a result of the confusion that follows a syntax error!
- So make it harmless. */
- if (INSN_UID (label) == 0)
- {
- INSN_UID (label) = cur_insn_uid++;
- add_insn_after (label, after, NULL);
- }
-
+ gcc_checking_assert (INSN_UID (label) == 0);
+ INSN_UID (label) = cur_insn_uid++;
+ add_insn_after (label, after, NULL);
return label;
}
rtx
emit_label (rtx label)
{
- /* This can be called twice for the same label
- as a result of the confusion that follows a syntax error!
- So make it harmless. */
- if (INSN_UID (label) == 0)
- {
- INSN_UID (label) = cur_insn_uid++;
- add_insn (label);
- }
+ gcc_checking_assert (INSN_UID (label) == 0);
+ INSN_UID (label) = cur_insn_uid++;
+ add_insn (label);
return label;
}
return seq;
}
-/* Cause next statement to emit a line note even if the line number
- has not changed. */
-
-void
-force_next_line_note (void)
-{
- last_location = -1;
-}
-
/* Place a note of KIND on insn INSN with DATUM as the datum. If a
note of this type already exists, remove it first. */
return REG_NOTES (insn);
}
+
+/* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
+rtx
+set_dst_reg_note (rtx insn, enum reg_note kind, rtx datum, rtx dst)
+{
+ rtx set = single_set (insn);
+
+ if (set && SET_DEST (set) == dst)
+ return set_unique_reg_note (insn, kind, datum);
+ return NULL_RTX;
+}
\f
/* Return an indication of which type of insn should have X as a body.
The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
return CODE_LABEL;
if (GET_CODE (x) == CALL)
return CALL_INSN;
- if (GET_CODE (x) == RETURN)
+ if (ANY_RETURN_P (x))
return JUMP_INSN;
if (GET_CODE (x) == SET)
{
switch (code)
{
case REG:
+ case DEBUG_EXPR:
case CONST_INT:
case CONST_DOUBLE:
case CONST_FIXED:
case CODE_LABEL:
case PC:
case CC0:
+ case RETURN:
+ case SIMPLE_RETURN:
return orig;
case CLOBBER:
if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
cur_insn_uid = 1;
cur_debug_insn_uid = 1;
reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
- last_location = UNKNOWN_LOCATION;
first_label_num = label_num;
seq_stack = NULL;
return CONST0_RTX (mode);
else if (x == CONST1_RTX (inner))
return CONST1_RTX (mode);
+ else if (x == CONSTM1_RTX (inner))
+ return CONSTM1_RTX (mode);
}
return gen_rtx_raw_CONST_VECTOR (mode, v);
init_reg_modes_target ();
/* Assign register numbers to the globally defined register rtx. */
- pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
- ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
- cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
dconsthalf = dconst1;
SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
- for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
+ for (i = 0; i < 3; i++)
{
const REAL_VALUE_TYPE *const r =
(i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
mode = GET_MODE_WIDER_MODE (mode))
const_tiny_rtx[i][(int) mode] = GEN_INT (i);
- for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
- mode != VOIDmode;
- mode = GET_MODE_WIDER_MODE (mode))
+ for (mode = MIN_MODE_PARTIAL_INT;
+ mode <= MAX_MODE_PARTIAL_INT;
+ mode = (enum machine_mode)((int)(mode) + 1))
const_tiny_rtx[i][(int) mode] = GEN_INT (i);
}
+ const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
+
+ for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
+ mode != VOIDmode;
+ mode = GET_MODE_WIDER_MODE (mode))
+ const_tiny_rtx[3][(int) mode] = constm1_rtx;
+
+ for (mode = MIN_MODE_PARTIAL_INT;
+ mode <= MAX_MODE_PARTIAL_INT;
+ mode = (enum machine_mode)((int)(mode) + 1))
+ const_tiny_rtx[3][(int) mode] = constm1_rtx;
+
for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
{
const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
+ const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
}
for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
FCONST1(mode).data.low = 0;
FCONST1(mode).mode = mode;
lshift_double (1, 0, GET_MODE_FBIT (mode),
- 2 * HOST_BITS_PER_WIDE_INT,
+ HOST_BITS_PER_DOUBLE_INT,
&FCONST1(mode).data.low,
&FCONST1(mode).data.high,
SIGNED_FIXED_POINT_MODE_P (mode));
FCONST1(mode).data.low = 0;
FCONST1(mode).mode = mode;
lshift_double (1, 0, GET_MODE_FBIT (mode),
- 2 * HOST_BITS_PER_WIDE_INT,
+ HOST_BITS_PER_DOUBLE_INT,
&FCONST1(mode).data.low,
&FCONST1(mode).data.high,
SIGNED_FIXED_POINT_MODE_P (mode));
const_tiny_rtx[0][(int) BImode] = const0_rtx;
if (STORE_FLAG_VALUE == 1)
const_tiny_rtx[1][(int) BImode] = const1_rtx;
+
+ pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
+ ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
+ simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
+ cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
}
\f
/* Produce exact duplicate of insn INSN after AFTER.
gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
}
+/* Data structures representing mapping of INSN_LOCATOR into scope blocks, line
+ numbers and files. In order to be GGC friendly we need to use separate
+ varrays. This also slightly improve the memory locality in binary search.
+ The _locs array contains locators where the given property change. The
+ block_locators_blocks contains the scope block that is used for all insn
+ locator greater than corresponding block_locators_locs value and smaller
+ than the following one. Similarly for the other properties. */
+static VEC(int,heap) *block_locators_locs;
+static GTY(()) VEC(tree,gc) *block_locators_blocks;
+static VEC(int,heap) *locations_locators_locs;
+DEF_VEC_A(location_t);
+DEF_VEC_ALLOC_A(location_t,heap);
+static VEC(location_t,heap) *locations_locators_vals;
+int prologue_locator;
+int epilogue_locator;
+
+/* Hold current location information and last location information, so the
+ datastructures are built lazily only when some instructions in given
+ place are needed. */
+static location_t curr_location, last_location;
+static tree curr_block, last_block;
+static int curr_rtl_loc = -1;
+
+/* Allocate insn locator datastructure. */
+void
+insn_locators_alloc (void)
+{
+ prologue_locator = epilogue_locator = 0;
+
+ block_locators_locs = VEC_alloc (int, heap, 32);
+ block_locators_blocks = VEC_alloc (tree, gc, 32);
+ locations_locators_locs = VEC_alloc (int, heap, 32);
+ locations_locators_vals = VEC_alloc (location_t, heap, 32);
+
+ curr_location = UNKNOWN_LOCATION;
+ last_location = UNKNOWN_LOCATION;
+ curr_block = NULL;
+ last_block = NULL;
+ curr_rtl_loc = 0;
+}
+
+/* At the end of emit stage, clear current location. */
+void
+insn_locators_finalize (void)
+{
+ if (curr_rtl_loc >= 0)
+ epilogue_locator = curr_insn_locator ();
+ curr_rtl_loc = -1;
+}
+
+/* Allocate insn locator datastructure. */
+void
+insn_locators_free (void)
+{
+ prologue_locator = epilogue_locator = 0;
+
+ VEC_free (int, heap, block_locators_locs);
+ VEC_free (tree,gc, block_locators_blocks);
+ VEC_free (int, heap, locations_locators_locs);
+ VEC_free (location_t, heap, locations_locators_vals);
+}
+
+/* Set current location. */
+void
+set_curr_insn_source_location (location_t location)
+{
+ /* IV opts calls into RTL expansion to compute costs of operations. At this
+ time locators are not initialized. */
+ if (curr_rtl_loc == -1)
+ return;
+ curr_location = location;
+}
+
+/* Get current location. */
+location_t
+get_curr_insn_source_location (void)
+{
+ return curr_location;
+}
+
+/* Set current scope block. */
+void
+set_curr_insn_block (tree b)
+{
+ /* IV opts calls into RTL expansion to compute costs of operations. At this
+ time locators are not initialized. */
+ if (curr_rtl_loc == -1)
+ return;
+ if (b)
+ curr_block = b;
+}
+
+/* Get current scope block. */
+tree
+get_curr_insn_block (void)
+{
+ return curr_block;
+}
+
+/* Return current insn locator. */
+int
+curr_insn_locator (void)
+{
+ if (curr_rtl_loc == -1 || curr_location == UNKNOWN_LOCATION)
+ return 0;
+ if (last_block != curr_block)
+ {
+ curr_rtl_loc++;
+ VEC_safe_push (int, heap, block_locators_locs, curr_rtl_loc);
+ VEC_safe_push (tree, gc, block_locators_blocks, curr_block);
+ last_block = curr_block;
+ }
+ if (last_location != curr_location)
+ {
+ curr_rtl_loc++;
+ VEC_safe_push (int, heap, locations_locators_locs, curr_rtl_loc);
+ VEC_safe_push (location_t, heap, locations_locators_vals, &curr_location);
+ last_location = curr_location;
+ }
+ return curr_rtl_loc;
+}
+\f
+
+/* Return lexical scope block locator belongs to. */
+static tree
+locator_scope (int loc)
+{
+ int max = VEC_length (int, block_locators_locs);
+ int min = 0;
+
+ /* When block_locators_locs was initialized, the pro- and epilogue
+ insns didn't exist yet and can therefore not be found this way.
+ But we know that they belong to the outer most block of the
+ current function.
+ Without this test, the prologue would be put inside the block of
+ the first valid instruction in the function and when that first
+ insn is part of an inlined function then the low_pc of that
+ inlined function is messed up. Likewise for the epilogue and
+ the last valid instruction. */
+ if (loc == prologue_locator || loc == epilogue_locator)
+ return DECL_INITIAL (cfun->decl);
+
+ if (!max || !loc)
+ return NULL;
+ while (1)
+ {
+ int pos = (min + max) / 2;
+ int tmp = VEC_index (int, block_locators_locs, pos);
+
+ if (tmp <= loc && min != pos)
+ min = pos;
+ else if (tmp > loc && max != pos)
+ max = pos;
+ else
+ {
+ min = pos;
+ break;
+ }
+ }
+ return VEC_index (tree, block_locators_blocks, min);
+}
+
+/* Return lexical scope block insn belongs to. */
+tree
+insn_scope (const_rtx insn)
+{
+ return locator_scope (INSN_LOCATOR (insn));
+}
+
+/* Return line number of the statement specified by the locator. */
+location_t
+locator_location (int loc)
+{
+ int max = VEC_length (int, locations_locators_locs);
+ int min = 0;
+
+ while (1)
+ {
+ int pos = (min + max) / 2;
+ int tmp = VEC_index (int, locations_locators_locs, pos);
+
+ if (tmp <= loc && min != pos)
+ min = pos;
+ else if (tmp > loc && max != pos)
+ max = pos;
+ else
+ {
+ min = pos;
+ break;
+ }
+ }
+ return *VEC_index (location_t, locations_locators_vals, min);
+}
+
+/* Return source line of the statement that produced this insn. */
+int
+locator_line (int loc)
+{
+ expanded_location xloc;
+ if (!loc)
+ return 0;
+ else
+ xloc = expand_location (locator_location (loc));
+ return xloc.line;
+}
+
+/* Return line number of the statement that produced this insn. */
+int
+insn_line (const_rtx insn)
+{
+ return locator_line (INSN_LOCATOR (insn));
+}
+
+/* Return source file of the statement specified by LOC. */
+const char *
+locator_file (int loc)
+{
+ expanded_location xloc;
+ if (!loc)
+ return 0;
+ else
+ xloc = expand_location (locator_location (loc));
+ return xloc.file;
+}
+
+/* Return source file of the statement that produced this insn. */
+const char *
+insn_file (const_rtx insn)
+{
+ return locator_file (INSN_LOCATOR (insn));
+}
+
+/* Return true if LOC1 and LOC2 locators have the same location and scope. */
+bool
+locator_eq (int loc1, int loc2)
+{
+ if (loc1 == loc2)
+ return true;
+ if (locator_location (loc1) != locator_location (loc2))
+ return false;
+ return locator_scope (loc1) == locator_scope (loc2);
+}
+\f
+
+/* Return true if memory model MODEL requires a pre-operation (release-style)
+ barrier or a post-operation (acquire-style) barrier. While not universal,
+ this function matches behavior of several targets. */
+
+bool
+need_atomic_barrier_p (enum memmodel model, bool pre)
+{
+ switch (model)
+ {
+ case MEMMODEL_RELAXED:
+ case MEMMODEL_CONSUME:
+ return false;
+ case MEMMODEL_RELEASE:
+ return pre;
+ case MEMMODEL_ACQUIRE:
+ return !pre;
+ case MEMMODEL_ACQ_REL:
+ case MEMMODEL_SEQ_CST:
+ return true;
+ default:
+ gcc_unreachable ();
+ }
+}
+\f
#include "gt-emit-rtl.h"
projects / platform / upstream / gcc.git / blobdiff