40x.md (ppc403-compare): Remove "compare".

[platform/upstream/gcc.git] / gcc / config / rs6000 / 7450.md

diff --git a/gcc/config/rs6000/7450.md b/gcc/config/rs6000/7450.md
index b7a1d28..f790332 100644 (file)
--- a/gcc/config/rs6000/7450.md
+++ b/gcc/config/rs6000/7450.md
@@ -1,27 +1,27 @@
 ;; Scheduling description for Motorola PowerPC 7450 processor.
-;;   Copyright (C) 2003 Free Software Foundation, Inc.
-;;
-;; This file is part of GNU CC.
-;;
-;; GNU CC is free software; you can redistribute it and/or modify
-;; it under the terms of the GNU General Public License as published by
-;; the Free Software Foundation; either version 2, or (at your option)
-;; any later version.
-;;
-;; GNU CC is distributed in the hope that it will be useful,
-;; but WITHOUT ANY WARRANTY; without even the implied warranty of
-;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-;; GNU General Public License for more details.
+;;   Copyright (C) 2003-2014 Free Software Foundation, Inc.
 ;;
+;; This file is part of GCC.
+
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 3, or (at your
+;; option) any later version.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+;; License for more details.
+
 ;; You should have received a copy of the GNU General Public License
-;; along with GNU CC; see the file COPYING.  If not, write to
-;; the Free Software Foundation, 59 Temple Place - Suite 330,
-;; Boston, MA 02111-1307, USA.
+;; along with GCC; see the file COPYING3.  If not see
+;; <http://www.gnu.org/licenses/>.
 
-(define_automaton "ppc7450,ppc7450fp,ppc7450other,ppc7450vec")
-(define_cpu_unit "iu1_7450,iu2_7450,iu3_7450,mciu_7450" "ppc7450")
+(define_automaton "ppc7450,ppc7450mciu,ppc7450fp,ppc7450vec")
+(define_cpu_unit "iu1_7450,iu2_7450,iu3_7450" "ppc7450")
+(define_cpu_unit "mciu_7450" "ppc7450mciu")
 (define_cpu_unit "fpu_7450" "ppc7450fp")
-(define_cpu_unit "lsu_7450,bpu_7450" "ppc7450other")
+(define_cpu_unit "lsu_7450,bpu_7450" "ppc7450")
 (define_cpu_unit "du1_7450,du2_7450,du3_7450" "ppc7450")
 (define_cpu_unit "vecsmpl_7450,veccmplx_7450,vecflt_7450,vecperm_7450" "ppc7450vec")
 (define_cpu_unit "vdu1_7450,vdu2_7450" "ppc7450vec")
@@ -43,48 +43,74 @@
 (define_reservation "ppc7450_vec_du" "vdu1_7450|vdu2_7450")
 
 (define_insn_reservation "ppc7450-load" 3
-  (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,\
-                       load_ux,load_u,vecload")
+  (and (eq_attr "type" "load,vecload")
        (eq_attr "cpu" "ppc7450"))
   "ppc7450_du,lsu_7450")
 
 (define_insn_reservation "ppc7450-store" 3
-  (and (eq_attr "type" "store,store_ux,store_u,vecstore")
+  (and (eq_attr "type" "store,vecstore")
        (eq_attr "cpu" "ppc7450"))
   "ppc7450_du,lsu_7450")
 
 (define_insn_reservation "ppc7450-fpload" 4
-  (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
+  (and (eq_attr "type" "fpload")
        (eq_attr "cpu" "ppc7450"))
   "ppc7450_du,lsu_7450")
 
 (define_insn_reservation "ppc7450-fpstore" 3
-  (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u")
+  (and (eq_attr "type" "fpstore")
        (eq_attr "cpu" "ppc7450"))
   "ppc7450_du,lsu_7450*3")
 
+(define_insn_reservation "ppc7450-llsc" 3
+  (and (eq_attr "type" "load_l,store_c")
+       (eq_attr "cpu" "ppc7450"))
+  "ppc7450_du,lsu_7450")
+
+(define_insn_reservation "ppc7450-sync" 35
+  (and (eq_attr "type" "sync")
+       (eq_attr "cpu" "ppc7450"))
+  "ppc7450_du,lsu_7450")
+
 (define_insn_reservation "ppc7450-integer" 1
-  (and (eq_attr "type" "integer")
+  (and (ior (eq_attr "type" "integer,insert,trap,cntlz,isel")
+           (and (eq_attr "type" "add,logical,shift,exts")
+                (eq_attr "dot" "no")))
        (eq_attr "cpu" "ppc7450"))
-  "ppc7450_du,(iu1_7450|iu2_7450|iu3_7450)")
+  "ppc7450_du,iu1_7450|iu2_7450|iu3_7450")
+
+(define_insn_reservation "ppc7450-two" 1
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "ppc7450"))
+  "ppc7450_du,iu1_7450|iu2_7450|iu3_7450,iu1_7450|iu2_7450|iu3_7450")
+
+(define_insn_reservation "ppc7450-three" 1
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "ppc7450"))
+  "ppc7450_du,iu1_7450|iu2_7450|iu3_7450,\
+   iu1_7450|iu2_7450|iu3_7450,iu1_7450|iu2_7450|iu3_7450")
 
 (define_insn_reservation "ppc7450-imul" 4
-  (and (eq_attr "type" "imul")
+  (and (eq_attr "type" "mul")
+       (eq_attr "size" "32")
        (eq_attr "cpu" "ppc7450"))
   "ppc7450_du,mciu_7450*2")
 
 (define_insn_reservation "ppc7450-imul2" 3
-  (and (eq_attr "type" "imul2,imul3")
+  (and (eq_attr "type" "mul")
+       (eq_attr "size" "8,16")
        (eq_attr "cpu" "ppc7450"))
   "ppc7450_du,mciu_7450")
 
 (define_insn_reservation "ppc7450-idiv" 23
-  (and (eq_attr "type" "idiv")
+  (and (eq_attr "type" "div")
        (eq_attr "cpu" "ppc7450"))
   "ppc7450_du,mciu_7450*23")
 
 (define_insn_reservation "ppc7450-compare" 2
-  (and (eq_attr "type" "cmp,compare,delayed_compare")
+  (and (ior (eq_attr "type" "cmp")
+           (and (eq_attr "type" "add,logical,shift,exts")
+                (eq_attr "dot" "yes")))
        (eq_attr "cpu" "ppc7450"))
   "ppc7450_du,(iu1_7450|iu2_7450|iu3_7450)")
 
@@ -124,8 +150,13 @@
        (eq_attr "cpu" "ppc7450"))
   "nothing,mciu_7450*2")
 
+(define_insn_reservation "ppc7450-mfjmpr" 3
+  (and (eq_attr "type" "mfjmpr")
+       (eq_attr "cpu" "ppc7450"))
+  "nothing,mciu_7450*2")
+
 (define_insn_reservation "ppc7450-jmpreg" 1
-  (and (eq_attr "type" "jmpreg,branch")
+  (and (eq_attr "type" "jmpreg,branch,isync")
        (eq_attr "cpu" "ppc7450"))
   "nothing,bpu_7450")