-/* Definitions of target machine for GNU compiler.
- Hitachi H8/300 version generating coff
+/* Definitions of target machine for GNU compiler.
+ Hitachi H8/300 version generating coff
Copyright (C) 1992, 1993, 1994, 1995, 1996, 1996, 1997, 1998, 1999,
- 2000, 2001 Free Software Foundation, Inc.
+ 2000, 2001, 2002 Free Software Foundation, Inc.
Contributed by Steve Chamberlain (sac@cygnus.com),
Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
extern const char *h8_push_op, *h8_pop_op, *h8_mov_op;
extern const char * const *h8_reg_names;
-/* Names to predefine in the preprocessor for this target machine. */
-
-#define CPP_PREDEFINES \
-"-D__LONG_MAX__=2147483647L -D__LONG_LONG_MAX__=2147483647L"
-
-#define CPP_SPEC \
- "%{!mh:%{!ms:-D__H8300__}} %{mh:-D__H8300H__} %{ms:-D__H8300S__} \
- %{!mh:%{!ms:-D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int}} \
- %{mh:-D__SIZE_TYPE__=unsigned\\ long -D__PTRDIFF_TYPE__=long} \
- %{ms:-D__SIZE_TYPE__=unsigned\\ long -D__PTRDIFF_TYPE__=long} \
- %{!mh:%{!ms:-Acpu=h8300 -Amachine=h8300}} \
- %{mh:-Acpu=h8300h -Amachine=h8300h} \
- %{ms:-Acpu=h8300s -Amachine=h8300s} \
- %{!mint32:-D__INT_MAX__=32767} %{mint32:-D__INT_MAX__=2147483647}"
+/* Target CPU builtins. */
+#define TARGET_CPU_CPP_BUILTINS() \
+ do \
+ { \
+ if (TARGET_H8300H) \
+ { \
+ builtin_define ("__H8300H__"); \
+ builtin_assert ("cpu=h8300h"); \
+ builtin_assert ("machine=h8300h"); \
+ if (TARGET_NORMAL_MODE) \
+ { \
+ builtin_define ("__NORMAL_MODE__"); \
+ } \
+ } \
+ else if (TARGET_H8300S) \
+ { \
+ builtin_define ("__H8300S__"); \
+ builtin_assert ("cpu=h8300s"); \
+ builtin_assert ("machine=h8300s"); \
+ if (TARGET_NORMAL_MODE) \
+ { \
+ builtin_define ("__NORMAL_MODE__"); \
+ } \
+ } \
+ else \
+ { \
+ builtin_define ("__H8300__"); \
+ builtin_assert ("cpu=h8300"); \
+ builtin_assert ("machine=h8300"); \
+ } \
+ } \
+ while (0)
#define LINK_SPEC "%{mh:-m h8300h} %{ms:-m h8300s}"
#define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
+#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \
+ do \
+ { \
+ /* Basic block reordering is only beneficial on targets with cache \
+ and/or variable-cycle branches where (cycle count taken != \
+ cycle count not taken). */ \
+ flag_reorder_blocks = 0; \
+ } \
+ while (0)
+
/* Print subsidiary information on the compiler version in use. */
#define TARGET_VERSION fprintf (stderr, " (Hitachi H8/300)");
extern int target_flags;
+/* Masks for the -m switches. */
+#define MASK_H8300S 0x00000001
+#define MASK_MAC 0x00000002
+#define MASK_INT32 0x00000008
+#define MASK_ADDRESSES 0x00000040
+#define MASK_QUICKCALL 0x00000080
+#define MASK_SLOWBYTE 0x00000100
+#define MASK_NORMAL_MODE 0x00000200
+#define MASK_RELAX 0x00000400
+#define MASK_RTL_DUMP 0x00000800
+#define MASK_H8300H 0x00001000
+#define MASK_ALIGN_300 0x00002000
+
/* Macros used in the machine description to test the flags. */
/* Make int's 32 bits. */
-#define TARGET_INT32 (target_flags & 8)
+#define TARGET_INT32 (target_flags & MASK_INT32)
/* Dump recorded insn lengths into the output file. This helps debug the
md file. */
-#define TARGET_ADDRESSES (target_flags & 64)
+#define TARGET_ADDRESSES (target_flags & MASK_ADDRESSES)
/* Pass the first few arguments in registers. */
-#define TARGET_QUICKCALL (target_flags & 128)
+#define TARGET_QUICKCALL (target_flags & MASK_QUICKCALL)
/* Pretend byte accesses are slow. */
-#define TARGET_SLOWBYTE (target_flags & 256)
+#define TARGET_SLOWBYTE (target_flags & MASK_SLOWBYTE)
/* Dump each assembler insn's rtl into the output file.
This is for debugging the compiler only. */
-#define TARGET_RTL_DUMP (target_flags & 2048)
+#define TARGET_RTL_DUMP (target_flags & MASK_RTL_DUMP)
/* Select between the H8/300 and H8/300H CPUs. */
#define TARGET_H8300 (! TARGET_H8300H && ! TARGET_H8300S)
-#define TARGET_H8300H (target_flags & 4096)
-#define TARGET_H8300S (target_flags & 1)
+#define TARGET_H8300H (target_flags & MASK_H8300H)
+#define TARGET_H8300S (target_flags & MASK_H8300S)
+#define TARGET_NORMAL_MODE (target_flags & MASK_NORMAL_MODE)
/* mac register and relevant instructions are available. */
-#define TARGET_MAC (target_flags & 2)
+#define TARGET_MAC (target_flags & MASK_MAC)
/* Align all values on the H8/300H the same way as the H8/300. Specifically,
32 bit and larger values are aligned on 16 bit boundaries.
- This is all the hardware requires, but the default is 32 bits for the 300H.
+ This is all the hardware requires, but the default is 32 bits for the H8/300H.
??? Now watch someone add hardware floating point requiring 32 bit
alignment. */
-#define TARGET_ALIGN_300 (target_flags & 8192)
+#define TARGET_ALIGN_300 (target_flags & MASK_ALIGN_300)
/* Macro to define tables used to set the flags.
This is a list in braces of pairs in braces,
where VALUE is the bits to set or minus the bits to clear.
An empty string NAME is used to identify the default VALUE. */
-#define TARGET_SWITCHES \
- { {"s", 1, N_("Generate H8/S code")}, \
- {"no-s", -1, N_("Do not generate H8/S code")}, \
- {"s2600", 2, N_("Generate H8/S2600 code")}, \
- {"no-s2600", -2, N_("Do not generate H8/S2600 code")}, \
- {"int32", 8, N_("Make integers 32 bits wide")}, \
- {"addresses", 64, NULL}, \
- {"quickcall", 128, \
- N_("Use registers for argument passing")}, \
- {"no-quickcall", -128, \
- N_("Do not use registers for argument passing")}, \
- {"slowbyte", 256, \
- N_("Consider access to byte sized memory slow")}, \
- {"relax", 1024, N_("Enable linker relaxing")}, \
- {"rtl-dump", 2048, NULL}, \
- {"h", 4096, N_("Generate H8/300H code")}, \
- {"no-h", -4096, N_("Do not generate H8/300H code")}, \
- {"align-300", 8192, N_("Use H8/300 alignment rules")}, \
- { "", TARGET_DEFAULT, NULL}}
+#define TARGET_SWITCHES \
+{ {"s", MASK_H8300S, N_("Generate H8S code")}, \
+ {"no-s", -MASK_H8300S, N_("Do not generate H8S code")}, \
+ {"s2600", MASK_MAC, N_("Generate H8S/2600 code")}, \
+ {"no-s2600", -MASK_MAC, N_("Do not generate H8S/2600 code")}, \
+ {"int32", MASK_INT32, N_("Make integers 32 bits wide")}, \
+ {"addresses", MASK_ADDRESSES, NULL}, \
+ {"quickcall", MASK_QUICKCALL, \
+ N_("Use registers for argument passing")}, \
+ {"no-quickcall", -MASK_QUICKCALL, \
+ N_("Do not use registers for argument passing")}, \
+ {"slowbyte", MASK_SLOWBYTE, \
+ N_("Consider access to byte sized memory slow")}, \
+ {"relax", MASK_RELAX, N_("Enable linker relaxing")}, \
+ {"rtl-dump", MASK_RTL_DUMP, NULL}, \
+ {"h", MASK_H8300H, N_("Generate H8/300H code")}, \
+ {"n", MASK_NORMAL_MODE, N_("Enable the normal mode")}, \
+ {"no-h", -MASK_H8300H, N_("Do not generate H8/300H code")}, \
+ {"align-300", MASK_ALIGN_300, N_("Use H8/300 alignment rules")}, \
+ { "", TARGET_DEFAULT, NULL}}
#ifdef IN_LIBGCC2
#undef TARGET_H8300H
#undef TARGET_H8300S
+#undef TARGET_NORMAL_MODE
/* If compiling libgcc2, make these compile time constants based on what
flags are we actually compiling with. */
#ifdef __H8300H__
#else
#define TARGET_H8300S 0
#endif
+#ifdef __NORMAL_MODE__
+#define TARGET_NORMAL_MODE 1
+#else
+#define TARGET_NORMAL_MODE 0
+#endif
#endif /* !IN_LIBGCC2 */
/* Do things that must be done once at start up. */
/* Default target_flags if no switches specified. */
#ifndef TARGET_DEFAULT
-#define TARGET_DEFAULT (128) /* quickcall */
+#define TARGET_DEFAULT (MASK_QUICKCALL)
#endif
/* Show we can debug even without a frame pointer. */
/* Define this if addresses of constant functions
shouldn't be put through pseudo regs where they can be cse'd.
Desirable on machines where ordinary constants are expensive
- but a CALL with constant address is cheap.
+ but a CALL with constant address is cheap.
Calls through a register are cheaper than calls to named
functions; however, the register pressure this causes makes
\f
/* Target machine storage layout */
-/* Define to use software floating point emulator for REAL_ARITHMETIC and
- decimal <-> binary conversion. */
-#define REAL_ARITHMETIC
-
/* Define this if most significant bit is lowest numbered
in instructions that operate on numbered bit-fields.
This is not true on the H8/300. */
#define BYTES_BIG_ENDIAN 1
/* Define this if most significant word of a multiword number is lowest
- numbered.
+ numbered.
This is true on an H8/300 (actually we can make it up, but we choose to
be consistent). */
#define WORDS_BIG_ENDIAN 1
-/* Number of bits in an addressable storage unit */
-#define BITS_PER_UNIT 8
-
-/* Width in bits of a "word", which is the contents of a machine register.
- Note that this is not necessarily the width of data type `int';
- if using 16-bit ints on a 68000, this would still be 32.
- But on a machine with 16-bit registers, this would be 16. */
-#define BITS_PER_WORD (TARGET_H8300H || TARGET_H8300S ? 32 : 16)
#define MAX_BITS_PER_WORD 32
/* Width of a word, in units (bytes). */
#define UNITS_PER_WORD (TARGET_H8300H || TARGET_H8300S ? 4 : 2)
#define MIN_UNITS_PER_WORD 2
-/* Width in bits of a pointer.
- See also the macro `Pmode' defined below. */
-#define POINTER_SIZE (TARGET_H8300H || TARGET_H8300S ? 32 : 16)
-
-#define SHORT_TYPE_SIZE 16
-#define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16)
-#define LONG_TYPE_SIZE 32
+#define SHORT_TYPE_SIZE 16
+#define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16)
+#define LONG_TYPE_SIZE 32
#define LONG_LONG_TYPE_SIZE 32
-#define FLOAT_TYPE_SIZE 32
-#define DOUBLE_TYPE_SIZE 32
-#define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
+#define FLOAT_TYPE_SIZE 32
+#define DOUBLE_TYPE_SIZE 32
+#define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
-#define MAX_FIXED_MODE_SIZE 32
+#define MAX_FIXED_MODE_SIZE 32
/* Allocation boundary (in *bits*) for storing arguments in argument list. */
#define PARM_BOUNDARY (TARGET_H8300H || TARGET_H8300S ? 32 : 16)
structure layouts. */
#define EMPTY_FIELD_BOUNDARY 16
-/* A bitfield declared as `int' forces `int' alignment for the struct. */
+/* A bit-field declared as `int' forces `int' alignment for the struct. */
#define PCC_BITFIELD_TYPE_MATTERS 0
/* No data type wants to be aligned rounder than this.
- 32 bit values are aligned as such on the 300h for speed. */
+ 32 bit values are aligned as such on the H8/300H and H8S for speed. */
#define BIGGEST_ALIGNMENT \
(((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16)
from 0 to just below FIRST_PSEUDO_REGISTER.
All registers that the compiler knows about must be given numbers,
- even those that are not normally considered general registers.
+ even those that are not normally considered general registers.
Reg 9 does not correspond to any hardware register, but instead
appears in the RTL as an argument pointer prior to reload, and is
eliminated during reloading in favor of either the stack or frame
pointer. */
-#define FIRST_PSEUDO_REGISTER 10
+#define FIRST_PSEUDO_REGISTER 11
/* 1 for registers that have pervasive standard uses
and are not available for the register allocator. */
#define FIXED_REGISTERS \
- { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1}
+ { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1}
/* 1 for registers not available across function calls.
These must include the FIXED_REGISTERS and also any
The latter must include the registers where values are returned
and the register where structure-value addresses are passed.
Aside from that, you can include as many other registers as you
- like.
+ like.
H8 destroys r0,r1,r2,r3. */
#define CALL_USED_REGISTERS \
- { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1 }
+ { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1 }
#define REG_ALLOC_ORDER \
- { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9}
+ { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10}
-#define CONDITIONAL_REGISTER_USAGE \
-{ \
- if (!TARGET_MAC) \
- fixed_regs[8] = call_used_regs[8] = 1; \
+#define CONDITIONAL_REGISTER_USAGE \
+{ \
+ if (!TARGET_MAC) \
+ fixed_regs[MAC_REG] = call_used_regs[MAC_REG] = 1; \
}
/* Return number of consecutive hard regs needed starting at reg REGNO
to hold something of mode MODE.
This is ordinarily the length in words of a value of mode MODE
- but can be less for certain modes in special long registers.
+ but can be less for certain modes in special long registers.
We pretend the MAC register is 32bits -- we don't have any data
types on the H8 series to handle more than 32bits. */
or HI.
H8/300H: Anything goes. */
-#define HARD_REGNO_MODE_OK(REGNO, MODE) \
- (TARGET_H8300 ? (((REGNO)&1)==0) || (MODE==HImode) || (MODE==QImode) \
- : REGNO == 8 ? MODE == SImode : 1)
+#define HARD_REGNO_MODE_OK(REGNO, MODE) \
+ (TARGET_H8300 \
+ ? ((((REGNO) & 1) == 0) || ((MODE) == HImode) || ((MODE) == QImode)) \
+ : (REGNO) == MAC_REG ? (MODE) == SImode : 1)
/* Value is 1 if it is a good idea to tie two pseudo registers
when one has mode MODE1 and one has mode MODE2.
If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
for any hard reg, then this must be 0 for correct output. */
-#define MODES_TIEABLE_P(MODE1, MODE2) \
- ((MODE1) == (MODE2) \
- || ((MODE1) == HImode && (MODE2) == QImode) \
- || ((MODE1) == QImode && (MODE2) == HImode) \
- || ((TARGET_H8300H || TARGET_H8300S) \
- && (((MODE1) == SImode && (MODE2) == HImode) \
- || ((MODE1) == HImode && (MODE2) == SImode))))
+#define MODES_TIEABLE_P(MODE1, MODE2) \
+ ((MODE1) == (MODE2) \
+ || (((MODE1) == QImode || (MODE1) == HImode \
+ || ((TARGET_H8300H || TARGET_H8300S) && (MODE1) == SImode)) \
+ && ((MODE2) == QImode || (MODE2) == HImode \
+ || ((TARGET_H8300H || TARGET_H8300S) && (MODE2) == SImode))))
/* Specify the registers used for certain standard purposes.
The values of these macros are register numbers. */
/*#define PC_REGNUM 15*/
/* Register to use for pushing function arguments. */
-#define STACK_POINTER_REGNUM 7
+#define STACK_POINTER_REGNUM SP_REG
/* Base register for access to local variables of the function. */
-#define FRAME_POINTER_REGNUM 6
+#define FRAME_POINTER_REGNUM FP_REG
/* Value should be nonzero if functions must have frame pointers.
Zero means the frame pointer need not be set up (and parms
#define FRAME_POINTER_REQUIRED 0
/* Base register for access to arguments of the function. */
-#define ARG_POINTER_REGNUM 9
+#define ARG_POINTER_REGNUM AP_REG
/* Register in which static-chain is passed to a function. */
-#define STATIC_CHAIN_REGNUM 3
+#define STATIC_CHAIN_REGNUM SC_REG
+
+/* Fake register that holds the address on the stack of the
+ current function's return address. */
+#define RETURN_ADDRESS_POINTER_REGNUM RAP_REG
+
+/* A C expression whose value is RTL representing the value of the return
+ address for the frame COUNT steps up from the current frame.
+ FRAMEADDR is already the frame pointer of the COUNT frame, assuming
+ a stack layout with the frame pointer as the first saved register. */
+#define RETURN_ADDR_RTX(COUNT, FRAME) h8300_return_addr_rtx ((COUNT), (FRAME))
\f
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS, LIM_REG_CLASSES
};
-#define N_REG_CLASSES (int) LIM_REG_CLASSES
+#define N_REG_CLASSES ((int) LIM_REG_CLASSES)
-/* Give names of register classes as strings for dump file. */
+/* Give names of register classes as strings for dump file. */
#define REG_CLASS_NAMES \
{ "NO_REGS", "GENERAL_REGS", "MAC_REGS", "ALL_REGS", "LIM_REGS" }
This is an initializer for a vector of HARD_REG_SET
of length N_REG_CLASSES. */
-#define REG_CLASS_CONTENTS \
+#define REG_CLASS_CONTENTS \
{ {0}, /* No regs */ \
- {0x2ff}, /* GENERAL_REGS */ \
- {0x100}, /* MAC_REGS */ \
- {0x3ff}, /* ALL_REGS */ \
+ {0x6ff}, /* GENERAL_REGS */ \
+ {0x100}, /* MAC_REGS */ \
+ {0x7ff}, /* ALL_REGS */ \
}
/* The same information, inverted:
reg number REGNO. This could be a conditional expression
or could index an array. */
-#define REGNO_REG_CLASS(REGNO) (REGNO != 8 ? GENERAL_REGS : MAC_REGS)
+#define REGNO_REG_CLASS(REGNO) (REGNO != MAC_REG ? GENERAL_REGS : MAC_REGS)
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS NO_REGS
#define BASE_REG_CLASS GENERAL_REGS
-/* Get reg_class from a letter such as appears in the machine description.
+/* Get reg_class from a letter such as appears in the machine description.
'a' is the MAC register. */
Return 1 if VALUE is in the range specified by C. */
#define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
-#define CONST_OK_FOR_J(VALUE) ((unsigned HOST_WIDE_INT) (VALUE) < 256)
-#define CONST_OK_FOR_K(VALUE) ((VALUE) == 1 || (VALUE) == 2)
#define CONST_OK_FOR_L(VALUE) \
(TARGET_H8300H || TARGET_H8300S \
? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 4 \
: (VALUE) == 1 || (VALUE) == 2)
-#define CONST_OK_FOR_M(VALUE) ((VALUE) == 3 || (VALUE) == 4)
#define CONST_OK_FOR_N(VALUE) \
(TARGET_H8300H || TARGET_H8300S \
? (VALUE) == -1 || (VALUE) == -2 || (VALUE) == -4 \
: (VALUE) == -1 || (VALUE) == -2)
-#define CONST_OK_FOR_O(VALUE) (ok_for_bclr (VALUE))
-#define CONST_OK_FOR_P(VALUE) (small_power_of_two (VALUE))
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
- (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
- (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
(C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
- (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
(C) == 'N' ? CONST_OK_FOR_N (VALUE) : \
- (C) == 'O' ? CONST_OK_FOR_O (VALUE) : \
- (C) == 'P' ? CONST_OK_FOR_P (VALUE) : \
0)
/* Similar, but for floating constants, and defining letters G and H.
- Here VALUE is the CONST_DOUBLE rtx itself.
-
+ Here VALUE is the CONST_DOUBLE rtx itself.
+
`G' is a floating-point zero. */
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
In general this is just CLASS; but on some machines
in some cases it is preferable to use a more restrictive class. */
-#define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
+#define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS. */
#define CLASS_MAX_NREGS(CLASS, MODE) \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
-/* Any SI register to register move may need to be reloaded,
+/* Any SI register-to-register move may need to be reloaded,
so define REGISTER_MOVE_COST to be > 2 so that reload never
shortcuts. */
On the H8 the return does not pop anything. */
-#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
+#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
/* Definitions for register eliminations.
We have two registers that can be eliminated on the h8300. First, the
frame pointer register can often be eliminated in favor of the stack
pointer register. Secondly, the argument pointer register can always be
- eliminated; it is replaced with either the stack or frame pointer. */
+ eliminated; it is replaced with either the stack or frame pointer. */
-#define ELIMINABLE_REGS \
-{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
- { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
+#define ELIMINABLE_REGS \
+{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
+ { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
+ { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},\
+ { RETURN_ADDRESS_POINTER_REGNUM, FRAME_POINTER_REGNUM},\
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
/* Given FROM and TO register numbers, say whether this elimination is allowed.
Frame pointer elimination is automatically handled.
For the h8300, if frame pointer elimination is being done, we would like to
- convert ap into sp, not fp.
+ convert ap and rp into sp, not fp.
All other eliminations are valid. */
#define CAN_ELIMINATE(FROM, TO) \
- ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
- ? ! frame_pointer_needed \
- : 1)
+ ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)
/* Define the offset between two registers, one to be eliminated, and the other
its replacement, at the start of a routine. */
-#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
- OFFSET = initial_offset (FROM, TO)
+#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
+ ((OFFSET) = h8300_initial_elimination_offset ((FROM), (TO)))
/* Define how to find the value returned by a function.
VALTYPE is the data type of the value (as a tree).
If the precise function being called is known, FUNC is its FUNCTION_DECL;
- otherwise, FUNC is 0.
-
+ otherwise, FUNC is 0.
+
On the H8 the return value is in R0/R1. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
/* When defined, the compiler allows registers explicitly used in the
rtl to be used as spill registers but prevents the compiler from
- extending the lifetime of these registers. */
+ extending the lifetime of these registers. */
#define SMALL_REGISTER_CLASSES 1
\f
On the H8/300, the offset starts at 0. */
-#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
+#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
((CUM).nbytes = 0, (CUM).libcall = LIBNAME)
/* Update the data in CUM to advance over an argument
fprintf (FILE, "\t%s\t#LP%d,%s\n\tjsr @mcount\n", \
h8_mov_op, (LABELNO), h8_reg_names[0]);
-/* Output assembler code to FILE to initialize this source file's
- basic block profiling info, if that has not already been done. */
-/* ??? @LPBX0 is moved into r0 twice. */
-
-#define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
- fprintf (FILE, "\t%s\t%s\n\t%s\t@LPBX0,%s\n\tbne LPI%d\n\t%s\t@LPBX0,%s\n\t%s\t%s\n\tjsr\t@__bb_init_func\nLPI%d:\t%s\t%s\n", \
- h8_push_op, h8_reg_names[0], \
- h8_mov_op, h8_reg_names[0], \
- (LABELNO), \
- h8_mov_op, h8_reg_names[0], \
- h8_push_op, h8_reg_names[0], \
- (LABELNO), \
- h8_pop_op, h8_reg_names[0]);
-
-/* Output assembler code to FILE to increment the entry-count for
- the BLOCKNO'th basic block in this source file. This is a real pain in the
- sphincter on a VAX, since we do not want to change any of the bits in the
- processor status word. The way it is done here, it is pushed onto the stack
- before any flags have changed, and then the stack is fixed up to account for
- the fact that the instruction to restore the flags only reads a word.
- It may seem a bit clumsy, but at least it works. */
-/* ??? This one needs work. */
-
-#define BLOCK_PROFILER(FILE, BLOCKNO) \
- fprintf (FILE, "\tmovpsl -(sp)\n\tmovw (sp),2(sp)\n\taddl2 $2,sp\n\taddl2 $1,LPBX2+%d\n\tbicpsw $255\n\tbispsw (sp)+\n", \
- 4 * BLOCKNO)
-
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
the stack pointer does not matter. The value is tested only in
functions that have frame pointers.
#define EXIT_IGNORE_STACK 0
/* Output assembler code for a block containing the constant parts
- of a trampoline, leaving space for the variable parts.
+ of a trampoline, leaving space for the variable parts.
H8/300
vvvv context
- 1 0000 7900xxxx mov.w #0x1234,r3
- 2 0004 5A00xxxx jmp @0x1234
+ 1 0000 7900xxxx mov.w #0x1234,r3
+ 2 0004 5A00xxxx jmp @0x1234
^^^^ function
H8/300H
vvvvvvvv context
- 2 0000 7A00xxxxxxxx mov.l #0x12345678,er3
- 3 0006 5Axxxxxx jmp @0x123456
+ 2 0000 7A00xxxxxxxx mov.l #0x12345678,er3
+ 3 0006 5Axxxxxx jmp @0x123456
^^^^^^ function
*/
-#define TRAMPOLINE_TEMPLATE(FILE) \
- do { \
- if (TARGET_H8300) \
- { \
- fprintf (FILE, "\tmov.w #0x1234,r3\n"); \
- fprintf (FILE, "\tjmp @0x1234\n"); \
- } \
- else \
- { \
- fprintf (FILE, "\tmov.l #0x12345678,er3\n"); \
- fprintf (FILE, "\tjmp @0x123456\n"); \
- } \
- } while (0)
+#define TRAMPOLINE_TEMPLATE(FILE) \
+ do \
+ { \
+ if (TARGET_H8300) \
+ { \
+ fprintf (FILE, "\tmov.w #0x1234,r3\n"); \
+ fprintf (FILE, "\tjmp @0x1234\n"); \
+ } \
+ else \
+ { \
+ fprintf (FILE, "\tmov.l #0x12345678,er3\n"); \
+ fprintf (FILE, "\tjmp @0x123456\n"); \
+ } \
+ } \
+ while (0)
/* Length in units of the trampoline for entering a nested function. */
FNADDR is an RTX for the address of the function's pure code.
CXT is an RTX for the static chain value for the function. */
-#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
-{ \
- enum machine_mode mode = TARGET_H8300H || TARGET_H8300S? SImode : HImode; \
- emit_move_insn (gen_rtx_MEM (mode, plus_constant ((TRAMP), 2)), CXT); \
- emit_move_insn (gen_rtx_MEM (mode, plus_constant ((TRAMP), 6)), FNADDR); \
- if (TARGET_H8300H || TARGET_H8300S) \
- emit_move_insn (gen_rtx_MEM (QImode, plus_constant ((TRAMP), 6)), \
- GEN_INT (0x5A)); \
+#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
+{ \
+ emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 2)), CXT); \
+ emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 6)), FNADDR); \
+ if (TARGET_H8300H || TARGET_H8300S) \
+ emit_move_insn (gen_rtx_MEM (QImode, plus_constant ((TRAMP), 6)), \
+ GEN_INT (0x5A)); \
}
\f
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT 1
-/*#define HAVE_POST_DECREMENT 0 */
-
#define HAVE_PRE_DECREMENT 1
-/*#define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
/* Extra constraints. */
-/* Nonzero if X is a constant address suitable as an 8-bit absolute on
- the H8/300H, which is a special case of the 'R' operand. */
+#define OK_FOR_R(OP) \
+ (GET_CODE (OP) == CONST_INT \
+ ? !h8300_shift_needs_scratch_p (INTVAL (OP), QImode) \
+ : 0)
-#define EIGHTBIT_CONSTANT_ADDRESS_P(X) \
- (GET_CODE (X) == CONST_INT && TARGET_H8300H \
- && 0xffff00 <= INTVAL (X) && INTVAL (X) <= 0xffffff)
+#define OK_FOR_S(OP) \
+ (GET_CODE (OP) == CONST_INT \
+ ? !h8300_shift_needs_scratch_p (INTVAL (OP), HImode) \
+ : 0)
-/* 'T' if valid for a push destination using pre_modify. */
-#define OK_FOR_T(OP) \
- (GET_CODE (OP) == MEM \
- && GET_CODE (XEXP (OP, 0)) == PRE_MODIFY \
- && GET_CODE (XEXP (XEXP (OP, 0), 1)) == PLUS \
- && XEXP (XEXP (XEXP (OP, 0), 1), 0) == XEXP (XEXP (OP, 0), 0) \
- && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 1), 1)) == CONST_INT \
- && INTVAL (XEXP (XEXP (XEXP (OP, 0), 1), 1)) == - (int) STACK_BOUNDARY / 8 \
- && XEXP (XEXP (OP, 0), 0) == stack_pointer_rtx)
+#define OK_FOR_T(OP) \
+ (GET_CODE (OP) == CONST_INT \
+ ? !h8300_shift_needs_scratch_p (INTVAL (OP), SImode) \
+ : 0)
/* 'U' if valid for a bset destination;
i.e. a register, register indirect, or the eightbit memory region
(a SYMBOL_REF with an SYMBOL_REF_FLAG set).
- On the H8/S 'U' can also be a 16bit or 32bit absolute. */
+ On the H8S 'U' can also be a 16bit or 32bit absolute. */
#define OK_FOR_U(OP) \
((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \
|| (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
&& REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
|| (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == SYMBOL_REF \
- && (TARGET_H8300S || SYMBOL_REF_FLAG (XEXP (OP, 0)))) \
- || ((GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == CONST \
- && GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \
- && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == SYMBOL_REF \
- && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT) \
- && (TARGET_H8300S || SYMBOL_REF_FLAG (XEXP (XEXP (OP, 0), 0)))) \
+ && TARGET_H8300S) \
+ || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == CONST \
+ && GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \
+ && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == SYMBOL_REF \
+ && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT \
+ && (TARGET_H8300S \
+ || SYMBOL_REF_FLAG (XEXP (XEXP (XEXP (OP, 0), 0), 0)))) \
|| (GET_CODE (OP) == MEM \
- && EIGHTBIT_CONSTANT_ADDRESS_P (XEXP (OP, 0))) \
+ && h8300_eightbit_constant_address_p (XEXP (OP, 0))) \
|| (GET_CODE (OP) == MEM && TARGET_H8300S \
&& GET_CODE (XEXP (OP, 0)) == CONST_INT))
#define EXTRA_CONSTRAINT(OP, C) \
- ((C) == 'T' ? OK_FOR_T (OP) : \
+ ((C) == 'R' ? OK_FOR_R (OP) : \
+ (C) == 'S' ? OK_FOR_S (OP) : \
+ (C) == 'T' ? OK_FOR_T (OP) : \
(C) == 'U' ? OK_FOR_U (OP) : \
0)
\f
The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
except for CONSTANT_ADDRESS_P which is actually
- machine-independent.
+ machine-independent.
On the H8/300, a legitimate address has the form
REG, REG+CONSTANT_ADDRESS or CONSTANT_ADDRESS. */
/* Accept either REG or SUBREG where a register is valid. */
-#define RTX_OK_FOR_BASE_P(X) \
- ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
- || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
+#define RTX_OK_FOR_BASE_P(X) \
+ ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
+ || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
&& REG_OK_FOR_BASE_P (SUBREG_REG (X))))
-#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
+#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
if (RTX_OK_FOR_BASE_P (X)) goto ADDR; \
- if (CONSTANT_ADDRESS_P (X)) goto ADDR; \
+ if (CONSTANT_ADDRESS_P (X)) goto ADDR; \
if (GET_CODE (X) == PLUS \
&& CONSTANT_ADDRESS_P (XEXP (X, 1)) \
&& RTX_OK_FOR_BASE_P (XEXP (X, 0))) goto ADDR;
GO_IF_LEGITIMATE_ADDRESS.
It is always safe for this macro to do nothing. It exists to recognize
- opportunities to optimize the output.
+ opportunities to optimize the output.
For the H8/300, don't do anything. */
-#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
+#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) {}
/* Go to LABEL if ADDR (a legitimate address expression)
has an effect that depends on the machine mode it is used for.
On the H8/300, the predecrement and postincrement address depend thus
(the amount of decrement or increment being the length of the operand). */
-#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
+#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL;
\f
/* Specify the machine mode that this machine uses
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
table.
- Do not define this if the table should contain absolute addresses. */
+ Do not define this if the table should contain absolute addresses. */
/*#define CASE_VECTOR_PC_RELATIVE 1 */
-/* Specify the tree operation to be used to convert reals to integers. */
-#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
-
-/* This is the kind of divide that is easiest to do in the general case. */
-#define EASY_DIV_EXPR TRUNC_DIV_EXPR
-
/* Define this as 1 if `char' should by default be signed; else as 0.
On the H8/300, sign extension is expensive, so we'll say that chars
#define MOVE_MAX (TARGET_H8300H || TARGET_H8300S ? 4 : 2)
#define MAX_MOVE_MAX 4
-/* Define this if zero-extension is slow (more than one real instruction). */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS TARGET_SLOWBYTE
/* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */
-#define Pmode (TARGET_H8300H || TARGET_H8300S ? SImode : HImode)
+#define Pmode \
+ ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? SImode : HImode)
/* ANSI C types.
- We use longs for the 300H because ints can be 16 or 32.
+ We use longs for the H8/300H and the H8S because ints can be 16 or 32.
GCC requires SIZE_TYPE to be the same size as pointers. */
-#define NO_BUILTIN_SIZE_TYPE
-#define NO_BUILTIN_PTRDIFF_TYPE
-#define SIZE_TYPE (TARGET_H8300 ? "unsigned int" : "long unsigned int")
-#define PTRDIFF_TYPE (TARGET_H8300 ? "int" : "long int")
+#define SIZE_TYPE \
+ (TARGET_H8300 || TARGET_NORMAL_MODE ? "unsigned int" : "long unsigned int")
+#define PTRDIFF_TYPE \
+ (TARGET_H8300 || TARGET_NORMAL_MODE ? "int" : "long int")
+
+#define POINTER_SIZE \
+ ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? 32 : 16)
#define WCHAR_TYPE "short unsigned int"
#define WCHAR_TYPE_SIZE 16
of a switch statement. If the code is computed here,
return it with a return statement. Otherwise, break from the switch. */
-#define DEFAULT_RTX_COSTS(RTX,CODE,OUTER_CODE) \
- return (const_costs (RTX, CODE));
+#define DEFAULT_RTX_COSTS(RTX, CODE, OUTER_CODE) \
+ return (const_costs (RTX, CODE, OUTER_CODE));
#define BRANCH_COST 0
/* Provide the costs of a rtl expression. This is in the body of a
switch on CODE. */
-/* ??? Shifts need to have a *much* higher cost than this. */
-
-#define RTX_COSTS(RTX,CODE,OUTER_CODE) \
- case MOD: \
- case DIV: \
- return 60; \
- case MULT: \
- return 20; \
- case ASHIFT: \
- case ASHIFTRT: \
- case LSHIFTRT: \
- case ROTATE: \
- case ROTATERT: \
- if (GET_MODE (RTX) == HImode) return 2; \
+
+#define RTX_COSTS(RTX, CODE, OUTER_CODE) \
+ case AND: \
+ return COSTS_N_INSNS (h8300_and_costs (RTX)); \
+ case MOD: \
+ case DIV: \
+ return 60; \
+ case MULT: \
+ return 20; \
+ case ASHIFT: \
+ case ASHIFTRT: \
+ case LSHIFTRT: \
+ return COSTS_N_INSNS (h8300_shift_costs (RTX)); \
+ case ROTATE: \
+ case ROTATERT: \
+ if (GET_MODE (RTX) == HImode) return 2; \
return 8;
/* Tell final.c how to eliminate redundant test instructions. */
after execution of an instruction whose pattern is EXP.
Do not alter them if the instruction would not alter the cc's. */
-#define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
+#define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc (EXP, INSN)
/* The add insns don't set overflow in a usable way. */
#define CC_OVERFLOW_UNUSABLE 01000
-/* The mov,and,or,xor insns don't set carry. That's ok though as the
+/* The mov,and,or,xor insns don't set carry. That's OK though as the
Z bit is all we need when doing unsigned comparisons on the result of
these insns (since they're always with 0). However, conditions.h has
CC_NO_OVERFLOW defined for this purpose. Rename it to something more
/* Output at beginning/end of assembler file. */
-#define ASM_FILE_START(FILE) asm_file_start(FILE)
+#define ASM_FILE_START(FILE) asm_file_start (FILE)
-#define ASM_FILE_END(FILE) asm_file_end(FILE)
+#define ASM_FILE_END(FILE) asm_file_end (FILE)
/* Output to assembler file text saying following lines
may contain character constants, extra white space, comments, etc. */
#define IDENT_ASM_OP "\t.ident\n"
/* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H. */
-#define ASM_WORD_OP (TARGET_H8300 ? "\t.word\t" : "\t.long\t")
-
-/* We define a readonly data section solely to remove readonly data
- from the instruction stream. This can improve relaxing in two significant
- ways. First it's more likely that references to readonly data
- can be done with a 16bit absolute address since they'll be in low
- memory. Second, it's more likely that jsr instructions can be
- turned into bsr instructions since read-only data is not in the
- instruction stream. */
-#define READONLY_DATA_SECTION readonly_data
+#define ASM_WORD_OP \
+ (TARGET_H8300 || TARGET_NORMAL_MODE ? "\t.word\t" : "\t.long\t")
#define TEXT_SECTION_ASM_OP "\t.section .text"
#define DATA_SECTION_ASM_OP "\t.section .data"
#define BSS_SECTION_ASM_OP "\t.section .bss"
#define INIT_SECTION_ASM_OP "\t.section .init"
-#define CTORS_SECTION_ASM_OP "\t.section .ctors"
-#define DTORS_SECTION_ASM_OP "\t.section .dtors"
#define READONLY_DATA_SECTION_ASM_OP "\t.section .rodata"
-#define EXTRA_SECTIONS in_ctors, in_dtors, in_readonly_data
-
-#define EXTRA_SECTION_FUNCTIONS \
- \
-void \
-ctors_section () \
-{ \
- if (in_section != in_ctors) \
- { \
- fprintf (asm_out_file, "%s\n", CTORS_SECTION_ASM_OP); \
- in_section = in_ctors; \
- } \
-} \
- \
-void \
-dtors_section () \
-{ \
- if (in_section != in_dtors) \
- { \
- fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \
- in_section = in_dtors; \
- } \
-} \
- \
-void \
-readonly_data () \
-{ \
- if (in_section != in_readonly_data) \
- { \
- fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
- in_section = in_readonly_data; \
- } \
-}
-
-#define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME) \
- do \
- { \
- ctors_section (); \
- fprintf (FILE, "%s_%s\n", ASM_WORD_OP, NAME); \
- } \
- while (0)
-
-#define ASM_OUTPUT_DESTRUCTOR(FILE,NAME) \
- do \
- { \
- dtors_section (); \
- fprintf (FILE, "%s_%s\n", ASM_WORD_OP, NAME); \
- } \
- while (0)
-
#undef DO_GLOBAL_CTORS_BODY
#define DO_GLOBAL_CTORS_BODY \
{ \
}
#undef DO_GLOBAL_DTORS_BODY
-#define DO_GLOBAL_DTORS_BODY \
+#define DO_GLOBAL_DTORS_BODY \
{ \
typedef (*pfunc)(); \
extern pfunc __dtors[]; \
#define TINY_DATA_NAME_P(NAME) (*(NAME) == '&')
-/* If we are referencing a function that is supposed to be called
- through the function vector, the SYMBOL_REF_FLAG in the rtl
- so the call patterns can generate the correct code. */
-#define ENCODE_SECTION_INFO(DECL) \
- if (TREE_CODE (DECL) == FUNCTION_DECL \
- && h8300_funcvec_function_p (DECL)) \
- SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
- else if (TREE_CODE (DECL) == VAR_DECL \
- && (TREE_STATIC (DECL) || DECL_EXTERNAL (DECL)) \
- && h8300_eightbit_data_p (DECL)) \
- SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
- else if (TREE_CODE (DECL) == VAR_DECL \
- && (TREE_STATIC (DECL) || DECL_EXTERNAL (DECL)) \
- && h8300_tiny_data_p (DECL)) \
- h8300_encode_label (DECL);
-
-/* Store the user-specified part of SYMBOL_NAME in VAR.
- This is sort of inverse to ENCODE_SECTION_INFO. */
-#define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
- (VAR) = (SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' \
- || (SYMBOL_NAME)[0] == '@' \
- || (SYMBOL_NAME)[0] == '&');
-
/* How to refer to registers in assembler output.
This sequence is indexed by compiler's hard-register-number (see above). */
#define REGISTER_NAMES \
-{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "mac", "ap" }
+{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "mac", "ap", "rap" }
#define ADDITIONAL_REGISTER_NAMES \
{ {"er0", 0}, {"er1", 1}, {"er2", 2}, {"er3", 3}, {"er4", 4}, \
{"er5", 5}, {"er6", 6}, {"er7", 7}, {"r7", 7} }
-/* How to renumber registers for dbx and gdb.
- H8/300 needs no change in the numeration. */
-
-#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
-
-#define SDB_DEBUGGING_INFO
+#define SDB_DEBUGGING_INFO 1
#define SDB_DELIM "\n"
/* Support -gstabs. */
/* Switch into a generic section. */
#define TARGET_ASM_NAMED_SECTION h8300_asm_named_section
-/* This is how to output the definition of a user-level label named NAME,
- such as the label on a static function or variable NAME. */
-
-#define ASM_OUTPUT_LABEL(FILE, NAME) \
- do \
- { \
- assemble_name (FILE, NAME); \
- fputs (":\n", FILE); \
- } \
- while (0)
-
-#define ASM_OUTPUT_LABELREF(FILE,NAME) \
+#define ASM_OUTPUT_LABELREF(FILE, NAME) \
asm_fprintf ((FILE), "%U%s", (NAME) + (TINY_DATA_NAME_P (NAME) ? 1 : 0))
#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME)
-/* This is how to output a command to make the user-level label named NAME
- defined for reference from other files. */
-
-#define ASM_GLOBALIZE_LABEL(FILE, NAME) \
- do \
- { \
- fputs ("\t.global ", FILE); \
- assemble_name (FILE, NAME); \
- fputs ("\n", FILE); \
- } \
- while (0)
+/* Globalizing directive for a label. */
+#define GLOBAL_ASM_OP "\t.global "
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
- ASM_OUTPUT_LABEL(FILE, NAME)
+ ASM_OUTPUT_LABEL (FILE, NAME)
-/* The prefix to add to user-visible assembler symbols. */
+/* The prefix to add to user-visible assembler symbols. */
#define USER_LABEL_PREFIX "_"
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
sprintf (LABEL, "*.%s%d", PREFIX, NUM)
-/* This is how to output an assembler line defining a `double' constant.
- It is .dfloat or .gfloat, depending. */
-
-#define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
- do \
- { \
- char dstr[30]; \
- REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
- fprintf (FILE, "\t.double %s\n", dstr); \
- } while (0)
-
-/* This is how to output an assembler line defining a `float' constant. */
-#define ASM_OUTPUT_FLOAT(FILE, VALUE) \
- do \
- { \
- char dstr[30]; \
- REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
- fprintf (FILE, "\t.float %s\n", dstr); \
- } while (0)
-
-/* This is how to output an assembler line defining an `int' constant. */
-
-#define ASM_OUTPUT_INT(FILE, VALUE) \
-( fprintf (FILE, "\t.long "), \
- output_addr_const (FILE, (VALUE)), \
- fprintf (FILE, "\n"))
-
-/* Likewise for `char' and `short' constants. */
-
-#define ASM_OUTPUT_SHORT(FILE, VALUE) \
-( fprintf (FILE, "\t.word "), \
- output_addr_const (FILE, (VALUE)), \
- fprintf (FILE, "\n"))
-
-#define ASM_OUTPUT_CHAR(FILE, VALUE) \
-( fprintf (FILE, "\t.byte "), \
- output_addr_const (FILE, (VALUE)), \
- fprintf (FILE, "\n"))
-
-/* This is how to output an assembler line for a numeric constant byte. */
-#define ASM_OUTPUT_BYTE(FILE, VALUE) \
- fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
-
/* This is how to output an insn to push a register on the stack.
It need not be very fast code. */
/* This is how to output an insn to pop a register from the stack.
It need not be very fast code. */
-#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
+#define ASM_OUTPUT_REG_POP(FILE, REGNO) \
fprintf (FILE, "\t%s\t%s\n", h8_pop_op, h8_reg_names[REGNO])
/* This is how to output an element of a case-vector that is absolute. */
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
- asm_fprintf (FILE, "%s.L%d\n", ASM_WORD_OP, VALUE)
+ fprintf (FILE, "%s.L%d\n", ASM_WORD_OP, VALUE)
/* This is how to output an element of a case-vector that is relative. */
that says to advance the location counter
to a multiple of 2**LOG bytes. */
-#define ASM_OUTPUT_ALIGN(FILE,LOG) \
+#define ASM_OUTPUT_ALIGN(FILE, LOG) \
if ((LOG) != 0) \
fprintf (FILE, "\t.align %d\n", (LOG))
/* This says how to output an assembler line
to define a local common symbol. */
-#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
+#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
( fputs ("\t.lcomm ", (FILE)), \
assemble_name ((FILE), (NAME)), \
fprintf ((FILE), ",%d\n", (SIZE)))
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
((CODE) == '#')
-#define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE,X,CODE)
+#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
/* Print a memory operand whose address is X, on file FILE.
This uses a function in h8300.c. */
projects / platform / upstream / gcc.git / blobdiff