+2021-10-25 Andrew MacLeod <amacleod@redhat.com>
+
+ * tree-vrp.c (vrp_simplify_cond_using_ranges): Add return type and
+ move to vr-values.c.
+ (simplify_casted_conds): Move to vrp_folder class.
+ (execute_vrp): Call via vrp_folder now.
+ * vr-values.c (simplify_cond_using_ranges_1): Call simplify_casted_cond.
+ (simplify_using_ranges::simplify_casted_cond): Relocate from tree-vrp.c.
+ * vr-values.h (simplify_casted_cond): Add prototype.
+
+2021-10-25 Andrew MacLeod <amacleod@redhat.com>
+
+ * tree-vrp.c (rvrp_folder::fold_stmt): If simplification fails, try
+ to fold anyway.
+
+2021-10-25 Paul A. Clarke <pc@us.ibm.com>
+
+ * config/rs6000/smmintrin.h (_mm_testz_si128): Add "extern" to
+ function signature.
+ (_mm_testc_si128): Likewise.
+ (_mm_testnzc_si128): Likewise.
+ (_mm_blend_ps): Likewise.
+ (_mm_blendv_ps): Likewise.
+ (_mm_blend_pd): Likewise.
+ (_mm_blendv_pd): Likewise.
+ (_mm_ceil_pd): Likewise.
+ (_mm_ceil_sd): Likewise.
+ (_mm_ceil_ps): Likewise.
+ (_mm_ceil_ss): Likewise.
+ (_mm_floor_pd): Likewise.
+ (_mm_floor_sd): Likewise.
+ (_mm_floor_ps): Likewise.
+ (_mm_floor_ss): Likewise.
+ (_mm_minpos_epu16): Likewise.
+ (_mm_mul_epi32): Likewise.
+ (_mm_cvtepi8_epi16): Likewise.
+ (_mm_packus_epi32): Likewise.
+ (_mm_cmpgt_epi64): Likewise.
+
+2021-10-25 Roger Sayle <roger@nextmovesoftware.com>
+
+ * simplify-rtx.c (simplify_binary_operation_1) [SS_ASHIFT]: Simplify
+ shifts of the mode's smin_value and smax_value when the bit count
+ operand doesn't have side-effects.
+ [US_ASHIFT]: Likewise, simplify shifts of the mode's umax_value
+ when the bit count operand doesn't have side-effects.
+ (simplify_const_binary_operation) [SS_ASHIFT, US_ASHIFT]: Perform
+ compile-time evaluation of saturating left shifts with constant
+ arguments.
+
+2021-10-25 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range.cc (gimple_ranger::export_global_ranges): Remove check
+ for TDF_DETAILS.
+
+2021-10-25 Andrew MacLeod <amacleod@redhat.com>
+
+ * flag-types.h (enum ranger_debug): Adjust values.
+ * params.opt (ranger_debug): Ditto.
+
+2021-10-25 Martin Jambor <mjambor@suse.cz>
+
+ PR tree-optimization/102886
+ * tree-sra.c (totally_scalarize_subtree): Fix the out of
+ access-condition.
+
+2021-10-25 Andrew Pinski <apinski@marvell.com>
+
+ * tree-ssa-dce.c (simple_dce_from_worklist):
+ Check stmt_unremovable_because_of_non_call_eh_p also
+ before removing the statement.
+
+2021-10-25 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102905
+ * tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
+ Use vect_supportable_dr_alignment again to determine whether
+ an access is supported when not aligned.
+
+2021-10-25 Kito Cheng <kito.cheng@sifive.com>
+
+ * config/riscv/riscv.c (riscv_rtx_costs): Handle cost model
+ for zbs extension.
+
+2021-10-25 Jim Wilson <jimw@sifive.com>
+ Kito Cheng <kito.cheng@sifive.com>
+ Jia-Wei Chen <jiawei@iscas.ac.cn>
+ Shi-Hua Liao <shihua@iscas.ac.cn>
+
+ * config/riscv/bitmanip.md (shiftm1): New.
+ (*bset<mode>): Ditto.
+ (*bset<mode>_mask): Ditto.
+ (*bset<mode>_1): Ditto.
+ (*bset<mode>_1_mask): Ditto.
+ (*bseti<mode>): Ditto.
+ (*bclr<mode>): Ditto.
+ (*bclri<mode>): Ditto.
+ (*binv<mode>): Ditto.
+ (*binvi<mode>): Ditto.
+ (*bext<mode>): Ditto.
+ (*bexti): Ditto.
+ * config/riscv/predicates.md (splittable_const_int_operand):
+ Handle bseti.
+ (single_bit_mask_operand): New.
+ (not_single_bit_mask_operand): Ditto.
+ (const31_operand): Ditto.
+ (const63_operand): Ditto.
+ * config/riscv/riscv.c (riscv_build_integer_1): Handle bseti.
+ (riscv_output_move): Ditto.
+ (riscv_print_operand): Handle new operand type: T and S.
+ * config/riscv/riscv.h (SINGLE_BIT_MASK_OPERAND): New.
+
+2021-10-25 Jim Wilson <jimw@sifive.com>
+
+ * config/riscv/riscv.c (riscv_build_integer_1): Build integer
+ with rotate.
+
+2021-10-25 Kito Cheng <kito.cheng@sifive.com>
+
+ * config/riscv/riscv.c (riscv_extend_cost): Handle cost model
+ for zbb extension.
+ (riscv_rtx_costs): Ditto.
+
+2021-10-25 Jim Wilson <jimw@sifive.com>
+ Kito Cheng <kito.cheng@sifive.com>
+ Jia-Wei Chen <jiawei@iscas.ac.cn>
+
+ * config/riscv/bitmanip.md (bitmanip_bitwise): New.
+ (bitmanip_minmax): New.
+ (clz_ctz_pcnt): New.
+ (bitmanip_optab): New.
+ (bitmanip_insn): New.
+ (*<optab>_not<mode>): New.
+ (*xor_not<mode>): New.
+ (<bitmanip_optab>si2): New.
+ (*<bitmanip_optab>disi2): New.
+ (<bitmanip_optab>di2): New.
+ (*zero_extendhi<GPR:mode>2_bitmanip): New.
+ (*extend<SHORT:mode><SUPERQI:mode>2_zbb): New.
+ (*zero_extendhi<GPR:mode>2_zbb): New.
+ (rotrsi3): New.
+ (rotrdi3): New.
+ (rotrsi3_sext): New.
+ (rotlsi3): New.
+ (rotldi3): New.
+ (rotlsi3_sext): New.
+ (bswap<mode>2): New.
+ (<bitmanip_optab><mode>3): New.
+ * config/riscv/riscv.md (type): Add rotate.
+ (zero_extendhi<GPR:mode>2): Change to define_expand pattern.
+ (*zero_extendhi<GPR:mode>2): New.
+ (extend<SHORT:mode><SUPERQI:mode>2): Change to define_expand pattern.
+ (*extend<SHORT:mode><SUPERQI:mode>2): New.
+
+2021-10-25 Kito Cheng <kito.cheng@sifive.com>
+
+ * config/riscv/riscv.c (riscv_extend_cost): Handle cost model
+ for zba extension.
+ (riscv_rtx_costs): Ditto.
+
+2021-10-25 Jim Wilson <jimw@sifive.com>
+ Kito Cheng <kito.cheng@sifive.com>
+ Jia-Wei Chen <jiawei@iscas.ac.cn>
+
+ * config/riscv/bitmanip.md (*zero_extendsidi2_bitmanip): New.
+ (*shNadd): Ditto.
+ (*shNadduw): Ditto.
+ (*add.uw): Ditto.
+ (*slliuw): Ditto.
+ (riscv_rtx_costs): Ditto.
+ * config/riscv/riscv.md: Include bitmanip.md
+ (type): Add bitmanip bype.
+ (zero_extendsidi2): Change to define_expand pattern.
+ (*zero_extendsidi2_internal): New.
+ (zero_extendsidi2_shifted): Disable for ZBA.
+
+2021-10-25 Kito Cheng <kito.cheng@sifive.com>
+
+ * common/config/riscv/riscv-common.c (riscv_ext_version_table):
+ Add zba, zbb, zbc and zbs.
+ (riscv_ext_flag_table): Ditto.
+ * config/riscv/riscv-opts.h (MASK_ZBA): New.
+ (MASK_ZBB): Ditto.
+ (MASK_ZBC): Ditto.
+ (MASK_ZBS): Ditto.
+ (TARGET_ZBA): Ditto.
+ (TARGET_ZBB): Ditto.
+ (TARGET_ZBC): Ditto.
+ (TARGET_ZBS): Ditto.
+ * config/riscv/riscv.opt (riscv_zb_subext): New.
+
+2021-10-25 liuhongt <hongtao.liu@intel.com>
+
+ PR target/102464
+ * match.pd: Simplify (_Float16) sqrtf((float) a) to .SQRT(a)
+ when direct_internal_fn_supported_p, similar for sqrt/sqrtl.
+
+2021-10-25 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102920
+ * tree-ssa-sccvn.h (expressions_equal_p): Add argument
+ controlling VN_TOP matching behavior.
+ * tree-ssa-sccvn.c (expressions_equal_p): Likewise.
+ (vn_phi_eq): Do not optimistically match VN_TOP.
+
+2021-10-25 konglin1 <lingling.kong@intel.com>
+
+ * config/i386/sse.md (fma_<mode>_fadd_fmul): Add new
+ define_insn_and_split.
+ (fma_<mode>_fadd_fcmul):Likewise
+ (fma_<complexopname>_<mode>_fma_zero):Likewise
+
+2021-10-24 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa-d.c (pa_d_handle_target_float_abi): Don't check
+ TARGET_DISABLE_FPREGS.
+ * config/pa/pa.c (fix_range): Use MASK_SOFT_FLOAT instead of
+ MASK_DISABLE_FPREGS.
+ (hppa_rtx_costs): Don't check TARGET_DISABLE_FPREGS. Adjust
+ cost of hardware integer multiplication.
+ (pa_conditional_register_usage): Don't check TARGET_DISABLE_FPREGS.
+ * config/pa/pa.h (INT14_OK_STRICT): Likewise.
+ * config/pa/pa.md: Don't check TARGET_DISABLE_FPREGS. Check
+ TARGET_SOFT_FLOAT in patterns that use xmpyu instruction.
+ * config/pa/pa.opt (mdisable-fpregs): Change target mask to
+ SOFT_FLOAT. Revise comment.
+ (msoft-float): New option.
+
+2021-10-24 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.md: Don't use 'G' constraint in integer move patterns.
+
+2021-10-24 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/install.texi (Specific): Remove obsolete details
+ around GNU/Linux on Itanium.
+ (Specific): Remove reference to Windows for Itanium.
+
+2021-10-23 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
+
+ * config/i386/x86-tune-sched-bd.c (dispatch_group): Commentary
+ typo fix.
+
+2021-10-23 Jan Hubicka <hubicka@ucw.cz>
+
+ * tree-ssa-structalias.c (compute_points_to_sets): Cleanup.
+
+2021-10-23 Roger Sayle <roger@nextmovesoftware.com>
+
+ * config/i386/sse.md (<any_logic>v1ti3): New define_insn to
+ implement V1TImode AND, IOR and XOR on TARGET_SSE2 (and above).
+ (one_cmplv1ti2): New define expand.
+
+2021-10-22 Eric Gallager <egallager@gcc.gnu.org>
+
+ PR other/102663
+ * Makefile.in: Handle dvidir and install-dvi target.
+ * configure: Regenerate.
+ * configure.ac: Add install-dvi to target_list.
+
+2021-10-22 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/install.texi (Binaries): Convert mingw-w64.org to https.
+ (Specific): Ditto.
+
+2021-10-22 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102893
+ * tree-ssa-dce.c (find_obviously_necessary_stmts): Fix the
+ test for an exit edge.
+
+2021-10-22 Aldy Hernandez <aldyh@redhat.com>
+ Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::compute_phi_relations):
+ Kill any global relations we may know before registering a new
+ one.
+ * value-relation.cc (path_oracle::killing_def): New.
+ * value-relation.h (path_oracle::killing_def): New.
+
+2021-10-22 Richard Biener <rguenther@suse.de>
+
+ PR bootstrap/102681
+ * tree-ssa-sccvn.c (vn_phi_insert): For undefined SSA args
+ record VN_TOP.
+ (vn_phi_lookup): Likewise.
+
+2021-10-21 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98667
+ * doc/invoke.texi: Document -fcf-protection requires i686 or
+ new.
+
+2021-10-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR middle-end/102764
+ * cfgexpand.c (expand_gimple_basic_block): Robustify latest change.
+
+2021-10-21 Jonathan Wright <jonathan.wright@arm.com>
+
+ * config/aarch64/arm_neon.h (__STRUCTN): Delete function
+ macro and all invocations.
+
+2021-10-21 Andrew MacLeod <amacleod@redhat.com>
+
+ * doc/invoke.texi (ranger-debug): Document.
+ * flag-types.h (enum ranger_debug): New.
+ (enum evrp_mode): Remove debug values.
+ * gimple-range-cache.cc (DEBUG_RANGE_CACHE): Use new debug flag.
+ * gimple-range-gori.cc (gori_compute::gori_compute): Ditto.
+ * gimple-range.cc (gimple_ranger::gimple_ranger): Ditto.
+ * gimple-ssa-evrp.c (hybrid_folder::choose_value): Ditto.
+ (execute_early_vrp): Use evrp-mode directly.
+ * params.opt (enum evrp_mode): Remove debug values.
+ (ranger-debug): New.
+ (ranger-logical-depth): Relocate to be in alphabetical order.
+
+2021-10-21 Andrew MacLeod <amacleod@redhat.com>
+
+ * doc/invoke.texi: (vrp1-mode, vrp2-mode): Document.
+ * flag-types.h: (enum vrp_mode): New.
+ * params.opt: (vrp1-mode, vrp2-mode): New.
+ * tree-vrp.c (vrp_pass_num): New.
+ (pass_vrp::pass_vrp): Set pass number.
+ (pass_vrp::execute): Choose which VRP mode to execute.
+
+2021-10-21 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-ssa-evrp.c (class rvrp_folder): Move to tree-vrp.c.
+ (execute_early_vrp): For ranger only mode, invoke ranger_vrp.
+ * tree-vrp.c (class rvrp_folder): Relocate here.
+ (execute_ranger_vrp): New.
+ * tree-vrp.h (execute_ranger_vrp): Export.
+
+2021-10-21 Martin Liska <mliska@suse.cz>
+
+ PR debug/102585
+ PR bootstrap/102766
+ * opts.c (finish_options): Process flag_var_tracking* options
+ here as they can be adjusted by optimize attribute.
+ Process also flag_syntax_only and flag_gtoggle.
+ * toplev.c (process_options): Remove it here.
+ * common.opt: Make debug_nonbind_markers_p as PerFunction
+ attribute as it depends on optimization level.
+
+2021-10-21 Martin Jambor <mjambor@suse.cz>
+
+ PR tree-optimization/102505
+ * tree-sra.c (totally_scalarize_subtree): Check that the
+ encountered field fits within the acces we would like to put it
+ in.
+
+2021-10-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c
+ (back_threader::maybe_register_path): Remove circular paths check.
+
+2021-10-21 Richard Biener <rguenther@suse.de>
+
+ * toplev.c (process_options): Move the initial debug_hooks
+ setting ...
+ (toplev::main): ... before the call of the post_options
+ langhook.
+
+2021-10-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102847
+ * tree-vect-stmts.c (vect_model_load_cost): Add the scalar
+ load cost in the prologue for VMAT_INVARIANT.
+
+2021-10-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102847
+ * tree-vect-stmts.c (vect_model_load_cost): Explicitely
+ handle VMAT_INVARIANT as a splat in the prologue.
+
+2021-10-21 Hongyu Wang <hongyu.wang@intel.com>
+
+ PR target/102812
+ * config/i386/i386.c (ix86_get_ssemov): Adjust HFmode vector
+ move to use the same logic as HImode.
+
+2021-10-21 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_build_slp_tree_1): Remove
+ superfluous gimple_call_nothrow_p check.
+
+2021-10-21 Andrew Pinski <apinski@marvell.com>
+
+ * tree-cfg.c (maybe_remove_writeonly_store): Add dce_ssa_names argument.
+ Mark the ssa-name of the rhs as one to be removed.
+ (execute_fixup_cfg): Update call to maybe_remove_writeonly_store.
+ Call simple_dce_from_worklist at the end to a simple dce.
+
+2021-10-21 Andrew Pinski <apinski@marvell.com>
+
+ * tree-cfg.c (maybe_remove_writeonly_store): New function
+ factored out from ...
+ (execute_fixup_cfg): Here. Call maybe_remove_writeonly_store.
+
+2021-10-21 Andrew Pinski <apinski@marvell.com>
+
+ * tree-cfg.c (execute_fixup_cfg): Remove comment
+ about standalone pass.
+
+2021-10-21 Andrew Pinski <apinski@marvell.com>
+
+ * tree-cfg.c (execute_fixup_cfg): Output when the statement
+ is removed when it is a write only var.
+
+2021-10-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (back_threader::maybe_register_path):
+ Avoid threading circular paths.
+
+2021-10-20 Alex Coplan <alex.coplan@arm.com>
+
+ * calls.c (initialize_argument_information): Remove some dead
+ code, remove handling for function_arg returning const_int.
+ * doc/tm.texi: Delete documentation for unused target hooks.
+ * doc/tm.texi.in: Likewise.
+ * target.def (load_bounds_for_arg): Delete.
+ (store_bounds_for_arg): Delete.
+ (load_returned_bounds): Delete.
+ (store_returned_bounds): Delete.
+ * targhooks.c (default_load_bounds_for_arg): Delete.
+ (default_store_bounds_for_arg): Delete.
+ (default_load_returned_bounds): Delete.
+ (default_store_returned_bounds): Delete.
+ * targhooks.h (default_load_bounds_for_arg): Delete.
+ (default_store_bounds_for_arg): Delete.
+ (default_load_returned_bounds): Delete.
+ (default_store_returned_bounds): Delete.
+
+2021-10-20 Jonathan Wakely <jwakely@redhat.com>
+
+ * doc/extend.texi (Basic Asm): Clarify that asm is not an
+ extension in C++.
+ * doc/invoke.texi (-fno-asm): Fix description for C++.
+
+2021-10-20 Jonathan Wakely <jwakely@redhat.com>
+
+ * doc/install.texi: Remove link to old.html
+
+2021-10-20 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-simd.md (*aarch64_cmtst_same_<mode>): New.
+
+2021-10-20 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-simd.md (*aarch64_narrow_trunc<mode>): New.
+
+2021-10-20 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-simd.md (aarch64_simd_ashr<mode>): Add case cmp
+ case.
+ * config/aarch64/constraints.md (D1): New.
+
+2021-10-20 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-simd.md
+ (*aarch64_<srn_op>topbits_shuffle<mode>_le): New.
+ (*aarch64_topbits_shuffle<mode>_le): New.
+ (*aarch64_<srn_op>topbits_shuffle<mode>_be): New.
+ (*aarch64_topbits_shuffle<mode>_be): New.
+ * config/aarch64/predicates.md
+ (aarch64_simd_shift_imm_vec_exact_top): New.
+
+2021-10-20 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>_vect,
+ *aarch64_<srn_op>shrn<mode>2_vect_le,
+ *aarch64_<srn_op>shrn<mode>2_vect_be): New.
+ * config/aarch64/iterators.md (srn_op): New.
+
+2021-10-20 Chung-Lin Tang <cltang@codesourcery.com>
+
+ * omp-low.c (omp_copy_decl_2): For !ctx, use record_vars to add new copy
+ as local variable.
+ (scan_sharing_clauses): Place copy of OMP_CLAUSE_IN_REDUCTION decl in
+ ctx->outer instead of ctx.
+
+2021-10-20 Martin Liska <mliska@suse.cz>
+
+ Revert:
+ 2021-10-19 Martin Liska <mliska@suse.cz>
+
+ PR target/102374
+ * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p): Strip whitespaces.
+ * system.h (strip_whilespaces): New function.
+
+2021-10-20 Martin Liska <mliska@suse.cz>
+
+ Revert:
+ 2021-10-19 Martin Liska <mliska@suse.cz>
+
+ PR target/102375
+ * config/aarch64/aarch64.c (aarch64_process_one_target_attr):
+ Strip whitespaces.
+
+2021-10-20 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_case_values_threshold):
+ Change to 8 with -Os, 11 otherwise.
+
+2021-10-20 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * config/aarch64/aarch64.c (neoversev1_tunings):
+ Enable AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND.
+ (neoversen2_tunings): Likewise.
+
+2021-10-20 Wilco Dijkstra <wdijkstr@arm.com>
+
+ PR target/100966
+ * config/aarch64/aarch64.md (frint_pattern): Update comment.
+ * config/aarch64/aarch64-simd-builtins.def: Change frintn to roundeven.
+ * config/aarch64/arm_fp16.h: Change frintn to roundeven.
+ * config/aarch64/arm_neon.h: Likewise.
+ * config/aarch64/iterators.md (frint_pattern): Use roundeven for FRINTN.
+
+2021-10-20 Martin Liska <mliska@suse.cz>
+
+ * config/arm/arm.c (arm_unwind_emit_sequence): Do not declare
+ already declared global variable.
+ (arm_unwind_emit_set): Use out_file as function argument.
+ (arm_unwind_emit): Likewise.
+ * config/darwin.c (machopic_output_data_section_indirection): Likewise.
+ (machopic_output_stub_indirection): Likewise.
+ (machopic_output_indirection): Likewise.
+ (machopic_finish): Likewise.
+ * config/i386/i386.c (ix86_asm_output_function_label): Likewise.
+ * config/i386/winnt.c (i386_pe_seh_unwind_emit): Likewise.
+ * config/ia64/ia64.c (process_epilogue): Likewise.
+ (process_cfa_adjust_cfa): Likewise.
+ (process_cfa_register): Likewise.
+ (process_cfa_offset): Likewise.
+ (ia64_asm_unwind_emit): Likewise.
+ * config/s390/s390.c (s390_asm_output_function_label): Likewise.
+
+2021-10-20 Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com>
+
+ * config/aarch64/aarch64-builtins.c
+ (aarch64_general_gimple_fold_builtin):
+ lower vld1 and vst1 variants of the neon builtins
+ * config/aarch64/aarch64-protos.h:
+ (aarch64_general_gimple_fold_builtin): Add gsi parameter.
+ * config/aarch64/aarch64.c (aarch64_general_gimple_fold_builtin):
+ Likwise.
+
+2021-10-20 Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com>
+
+ * match.pd: Generate IFN_TRUNC.
+
+2021-10-20 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102853
+ * tree-data-ref.c (split_constant_offset_1): Bail out
+ immediately if the expression traps on overflow.
+
+2021-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (back_threader::~back_threader): Remove.
+
+2021-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadupdate.c (back_jt_path_registry::adjust_paths_after_duplication):
+ Remove superflous debugging message.
+ (back_jt_path_registry::duplicate_thread_path): Same.
+
+2021-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (back_threader_registry::back_threader_registry):
+ Remove.
+ (back_threader_registry::register_path): Remove m_threaded_paths.
+
+2021-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/102814
+ * doc/invoke.texi: Document --param=max-fsm-thread-length.
+ * params.opt: Add --param=max-fsm-thread-length.
+ * tree-ssa-threadbackward.c
+ (back_threader_profitability::profitable_path_p): Fail on paths
+ longer than max-fsm-thread-length.
+
+2021-10-20 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR middle-end/102764
+ * cfgexpand.c (expand_gimple_basic_block): Disregard a final debug
+ statement to reset the current location for the outgoing edges.
+
+2021-10-20 Aldy Hernandez <aldyh@redhat.com>
+ Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-threadupdate.c (cancel_thread): Dump threading reason
+ on the same line as the threading cancellation.
+ (jt_path_registry::cancel_invalid_paths): Avoid rotating loops.
+ Avoid threading through loop headers where the path remains in the
+ loop.
+
+2021-10-20 Siddhesh Poyarekar <siddhesh@gotplt.org>
+
+ * tree-object-size.c (unknown): Make into a function. Adjust
+ all uses.
+ (unknown_object_size): Simplify implementation.
+
+2021-10-20 Hongtao Liu <hongtao.liu@intel.com>
+ Kewen Lin <linkw@linux.ibm.com>
+
+ * doc/sourcebuild.texi (Effective-Target Keywords): Document
+ vect_slp_v2qi_store, vect_slp_v4qi_store, vect_slp_v8qi_store,
+ vect_slp_v16qi_store, vect_slp_v2hi_store,
+ vect_slp_v4hi_store, vect_slp_v2si_store, vect_slp_v4si_store.
+
2021-10-19 Jonathan Wakely <jwakely@redhat.com>
* doc/extend.texi (Basic PowerPC Built-in Functions): Fix typo.
projects / platform / upstream / gcc.git / blobdiff