+2018-02-08 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/s390/s390-opts.h (enum indirect_branch): Define.
+ * config/s390/s390-protos.h (s390_return_addr_from_memory)
+ (s390_indirect_branch_via_thunk)
+ (s390_indirect_branch_via_inline_thunk): Add function prototypes.
+ (enum s390_indirect_branch_type): Define.
+ * config/s390/s390.c (struct s390_frame_layout, struct
+ machine_function): Remove.
+ (indirect_branch_prez10thunk_mask, indirect_branch_z10thunk_mask)
+ (indirect_branch_table_label_no, indirect_branch_table_name):
+ Define variables.
+ (INDIRECT_BRANCH_NUM_OPTIONS): Define macro.
+ (enum s390_indirect_branch_option): Define.
+ (s390_return_addr_from_memory): New function.
+ (s390_handle_string_attribute): New function.
+ (s390_attribute_table): Add new attribute handler.
+ (s390_execute_label): Handle UNSPEC_EXECUTE_JUMP patterns.
+ (s390_indirect_branch_via_thunk): New function.
+ (s390_indirect_branch_via_inline_thunk): New function.
+ (s390_function_ok_for_sibcall): When jumping via thunk disallow
+ sibling call optimization for non z10 compiles.
+ (s390_emit_call): Force indirect branch target to be a single
+ register. Add r1 clobber for non-z10 compiles.
+ (s390_emit_epilogue): Emit return jump via return_use expander.
+ (s390_reorg): Handle JUMP_INSNs as execute targets.
+ (s390_option_override_internal): Perform validity checks for the
+ new command line options.
+ (s390_indirect_branch_attrvalue): New function.
+ (s390_indirect_branch_settings): New function.
+ (s390_set_current_function): Invoke s390_indirect_branch_settings.
+ (s390_output_indirect_thunk_function): New function.
+ (s390_code_end): Implement target hook.
+ (s390_case_values_threshold): Implement target hook.
+ (TARGET_ASM_CODE_END, TARGET_CASE_VALUES_THRESHOLD): Define target
+ macros.
+ * config/s390/s390.h (struct s390_frame_layout)
+ (struct machine_function): Move here from s390.c.
+ (TARGET_INDIRECT_BRANCH_NOBP_RET)
+ (TARGET_INDIRECT_BRANCH_NOBP_JUMP)
+ (TARGET_INDIRECT_BRANCH_NOBP_JUMP_THUNK)
+ (TARGET_INDIRECT_BRANCH_NOBP_JUMP_INLINE_THUNK)
+ (TARGET_INDIRECT_BRANCH_NOBP_CALL)
+ (TARGET_DEFAULT_INDIRECT_BRANCH_TABLE)
+ (TARGET_INDIRECT_BRANCH_THUNK_NAME_EXRL)
+ (TARGET_INDIRECT_BRANCH_THUNK_NAME_EX)
+ (TARGET_INDIRECT_BRANCH_TABLE): Define macros.
+ * config/s390/s390.md (UNSPEC_EXECUTE_JUMP)
+ (INDIRECT_BRANCH_THUNK_REGNUM): Define constants.
+ (mnemonic attribute): Add values which aren't recognized
+ automatically.
+ ("*cjump_long", "*icjump_long", "*basr", "*basr_r"): Disable
+ pattern for branch conversion. Fix mnemonic attribute.
+ ("*c<code>", "*sibcall_br", "*sibcall_value_br", "*return"): Emit
+ indirect branch via thunk if requested.
+ ("indirect_jump", "<code>"): Expand patterns for branch conversion.
+ ("*indirect_jump"): Disable for branch conversion using out of
+ line thunks.
+ ("indirect_jump_via_thunk<mode>_z10")
+ ("indirect_jump_via_thunk<mode>")
+ ("indirect_jump_via_inlinethunk<mode>_z10")
+ ("indirect_jump_via_inlinethunk<mode>", "*casesi_jump")
+ ("casesi_jump_via_thunk<mode>_z10", "casesi_jump_via_thunk<mode>")
+ ("casesi_jump_via_inlinethunk<mode>_z10")
+ ("casesi_jump_via_inlinethunk<mode>", "*basr_via_thunk<mode>_z10")
+ ("*basr_via_thunk<mode>", "*basr_r_via_thunk_z10")
+ ("*basr_r_via_thunk", "return<mode>_prez10"): New pattern.
+ ("*indirect2_jump"): Disable for branch conversion.
+ ("casesi_jump"): Turn into expander and expand patterns for branch
+ conversion.
+ ("return_use"): New expander.
+ ("*return"): Emit return via thunk and rename it to ...
+ ("*return<mode>"): ... this one.
+ * config/s390/s390.opt: Add new options and and enum for the
+ option values.
+
+2018-02-08 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * lra-constraints.c (match_reload): Unconditionally use
+ gen_lowpart_SUBREG, rather than selecting between that
+ and equivalent gen_rtx_SUBREG code.
+
+2018-02-08 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/84233
+ * tree-ssa-phiprop.c (propagate_with_phi): Use separate
+ changed flag instead of boguously re-using phi_inserted.
+
+2018-02-08 Martin Jambor <mjambor@suse.cz>
+
+ * hsa-gen.c (get_symbol_for_decl): Set program allocation for
+ static local variables.
+
+2018-02-08 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/84278
+ * tree-vect-stmts.c (vectorizable_store): When looking for
+ smaller vector types to perform grouped strided loads/stores
+ make sure the mode is supported by the target.
+ (vectorizable_load): Likewise.
+
+2018-02-08 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_components_for_bb):
+ Increase LDP/STP opportunities by adding adjacent callee-saves.
+
+2018-02-08 Wilco Dijkstra <wdijkstr@arm.com>
+
+ PR rtl-optimization/84068
+ PR rtl-optimization/83459
+ * haifa-sched.c (rank_for_schedule): Fix SCHED_PRESSURE_MODEL sorting.
+
+2018-02-08 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/84224
+ * gimple-ssa-warn-alloca.c (pass_walloca::execute): Remove assert.
+ * calls.c (gimple_alloca_call_p): Only return TRUE when we have
+ non-zero arguments.
+
+2018-02-07 Iain Sandoe <iain@codesourcery.com>
+
+ * config/rs6000/altivec.md (*restore_world): Remove LR use.
+ * config/rs6000/predicates.md (restore_world_operation): Adjust op
+ count, remove one USE.
+
+2018-02-07 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ * doc/install.texi (Configuration): Document the
+ --with-long-double-format={ibm,ieee} PowerPC configuration
+ options.
+
+ PR target/84154
+ * config/rs6000/rs6000.md (fix_trunc<SFDF:mode><QHI:mode>2):
+ Convert from define_expand to be define_insn_and_split. Rework
+ float/double/_Float128 conversions to QI/HI/SImode to work with
+ both ISA 2.07 (power8) or ISA 3.0 (power9). Fix regression where
+ conversions to QI/HImode types did a store and then a load to
+ truncate the value. For conversions to VSX registers, don't split
+ the insn, instead emit the code directly. Use the code iterator
+ any_fix to combine signed and unsigned conversions.
+ (fix<uns>_trunc<SFDF:mode>si2_p8): Likewise.
+ (fixuns_trunc<SFDF:mode><QHI:mode>2): Likewise.
+ (fix_trunc<IEEE128:mode><QHI:mode>2): Likewise.
+ (fix<uns>_trunc<SFDF:mode><QHI:mode>2): Likewise.
+ (fix_<mode>di2_hw): Likewise.
+ (fixuns_<mode>di2_hw): Likewise.
+ (fix_<mode>si2_hw): Likewise.
+ (fixuns_<mode>si2_hw): Likewise.
+ (fix<uns>_<IEEE128:mode><SDI:mode>2_hw): Likewise.
+ (fix<uns>_trunc<IEEE128:mode><QHI:mode>2): Likewise.
+ (fctiw<u>z_<mode>_smallint): Rename fctiw<u>z_<mode>_smallint to
+ fix<uns>_trunc<SFDF:mode>si2_p8.
+ (fix_trunc<SFDF:mode><QHI:mode>2_internal): Delete, no longer
+ used.
+ (fixuns_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
+ (fix<uns>_<mode>_mem): Likewise.
+ (fctiw<u>z_<mode>_mem): Likewise.
+ (fix<uns>_<mode>_mem): Likewise.
+ (fix<uns>_trunc<SFDF:mode><QHSI:mode>2_mem): On ISA 3.0, prevent
+ the register allocator from doing a direct move to the GPRs to do
+ a store, and instead use the ISA 3.0 store byte/half-word from
+ vector register instruction. For IEEE 128-bit floating point,
+ also optimize stores of 32-bit ints.
+ (fix<uns>_trunc<IEEE128:mode><QHSI:mode>2_mem): Likewise.
+
+2018-02-07 Alan Hayward <alan.hayward@arm.com>
+
+ * genextract.c (push_pathstr_operand): New function to support
+ [a-zA-Z].
+ (walk_rtx): Call push_pathstr_operand.
+ (print_path): Support [a-zA-Z].
+
+2018-02-07 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/84037
+ * tree-vectorizer.h (struct _loop_vec_info): Add ivexpr_map member.
+ (cse_and_gimplify_to_preheader): Declare.
+ (vect_get_place_in_interleaving_chain): Likewise.
+ * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
+ ivexpr_map.
+ (_loop_vec_info::~_loop_vec_info): Delete it.
+ (cse_and_gimplify_to_preheader): New function.
+ * tree-vect-slp.c (vect_get_place_in_interleaving_chain): Export.
+ * tree-vect-stmts.c (vectorizable_store): CSE base and steps.
+ (vectorizable_load): Likewise. For grouped stores always base
+ the IV on the first element.
+ * tree-vect-loop-manip.c (vect_loop_versioning): Unshare versioning
+ condition before gimplifying.
+
+2018-02-07 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-eh.c (operation_could_trap_helper_p): Ignore honor_trapv for
+ *DIV_EXPR and *MOD_EXPR.
+
+2018-02-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/84248
+ * config/i386/i386.c (ix86_option_override_internal): Mask out
+ the CF_SET bit when checking -fcf-protection.
+
+2018-02-07 Tom de Vries <tom@codesourcery.com>
+
+ PR libgomp/84217
+ * omp-expand.c (expand_oacc_collapse_init): Ensure diff_type is large
+ enough.
+
+2018-02-07 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/84204
+ * tree-chrec.c (chrec_fold_plus_1): Remove size limiting in
+ this place.
+
+ PR tree-optimization/84205
+ * graphite-isl-ast-to-gimple.c (binary_op_to_tree): Also
+ special-case isl_ast_op_zdiv_r.
+
+ PR tree-optimization/84223
+ * graphite-scop-detection.c (gather_bbs::before_dom_children):
+ Only add conditions from within the region.
+ (gather_bbs::after_dom_children): Adjust.
+
+2018-02-07 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/84209
+ * config/avr/avr.h (GENERAL_REGNO_P, GENERAL_REG_P): New macros.
+ * config/avr/avr.md: Only post-reload split REG-REG moves if
+ either register is REGERAL_REG_P.
+
+2018-02-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/84235
+ * tree-ssa-scopedtables.c
+ (avail_exprs_stack::simplify_binary_operation): Fir MINUS_EXPR, punt
+ if the subtraction is performed in floating point type where NaNs are
+ honored. For *DIV_EXPR, punt for ALL_FRACT_MODE_Ps where we can't
+ build 1. Formatting fix.
+
+2018-02-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/84146
+ * config/i386/i386.c (rest_of_insert_endbranch): Only skip
+ NOTE_INSN_CALL_ARG_LOCATION after a call, not anything else,
+ and skip it regardless of bb boundaries. Use CALL_P macro,
+ don't test INSN_P (insn) together with CALL_P or JUMP_P check
+ unnecessarily, formatting fix.
+
2018-02-06 Michael Collison <michael.collison@arm.com>
* config/arm/thumb2.md:
%1, %0<mask_scalar_operand4>|%0<mask_scalar_operand4>, %1,
%2<round_saeonly_scalar_mask_op4>, %3}"): ... this.
->>>>>>> .r257416
2018-02-02 Andrew Jenner <andrew@codesourcery.com>
* config/powerpcspe/powerpcspe.opt: Add Undocumented to irrelevant
projects / platform / upstream / gcc.git / blobdiff