+2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * optabs-query.c (can_vec_perm_var_p): Check whether lowering
+ to qimode could truncate the indices.
+ * optabs.c (expand_vec_perm_var): Likewise.
+
+2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * Makefile.in (OBJS): Add vec-perm-indices.o.
+ * vec-perm-indices.h: New file.
+ * vec-perm-indices.c: Likewise.
+ * target.h (vec_perm_indices): Replace with a forward class
+ declaration.
+ (auto_vec_perm_indices): Move to vec-perm-indices.h.
+ * optabs.h: Include vec-perm-indices.h.
+ (expand_vec_perm): Delete.
+ (selector_fits_mode_p, expand_vec_perm_var): Declare.
+ (expand_vec_perm_const): Declare.
+ * target.def (vec_perm_const_ok): Replace with...
+ (vec_perm_const): ...this new hook.
+ * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
+ (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
+ * doc/tm.texi: Regenerate.
+ * optabs.def (vec_perm_const): Delete.
+ * doc/md.texi (vec_perm_const): Likewise.
+ (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
+ * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
+ expand_vec_perm for constant permutation vectors. Assert that
+ the mode of variable permutation vectors is the integer equivalent
+ of the mode that is being permuted.
+ * optabs-query.h (selector_fits_mode_p): Declare.
+ * optabs-query.c: Include vec-perm-indices.h.
+ (selector_fits_mode_p): New function.
+ (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
+ is defined, instead of checking whether the vec_perm_const_optab
+ exists. Use targetm.vectorize.vec_perm_const instead of
+ targetm.vectorize.vec_perm_const_ok. Check whether the indices
+ fit in the vector mode before using a variable permute.
+ * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
+ vec_perm_indices instead of an rtx.
+ (expand_vec_perm): Replace with...
+ (expand_vec_perm_const): ...this new function. Take the selector
+ as a vec_perm_indices rather than an rtx. Also take the mode of
+ the selector. Update call to shift_amt_for_vec_perm_mask.
+ Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
+ Use vec_perm_indices::new_expanded_vector to expand the original
+ selector into bytes. Check whether the indices fit in the vector
+ mode before using a variable permute.
+ (expand_vec_perm_var): Make global.
+ (expand_mult_highpart): Use expand_vec_perm_const.
+ * fold-const.c: Includes vec-perm-indices.h.
+ * tree-ssa-forwprop.c: Likewise.
+ * tree-vect-data-refs.c: Likewise.
+ * tree-vect-generic.c: Likewise.
+ * tree-vect-loop.c: Likewise.
+ * tree-vect-slp.c: Likewise.
+ * tree-vect-stmts.c: Likewise.
+ * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
+ Delete.
+ * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
+ * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
+ (aarch64_vectorize_vec_perm_const_ok): Fuse into...
+ (aarch64_vectorize_vec_perm_const): ...this new function.
+ (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
+ (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
+ * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
+ * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
+ * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
+ (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
+ (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
+ into...
+ (arm_vectorize_vec_perm_const): ...this new function. Explicitly
+ check for NEON modes.
+ * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
+ * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
+ * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
+ (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
+ into...
+ (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
+ the old VEC_PERM_CONST conditions.
+ * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
+ * config/ia64/vect.md (vec_perm_const<mode>): Delete.
+ * config/ia64/ia64.c (ia64_expand_vec_perm_const)
+ (ia64_vectorize_vec_perm_const_ok): Merge into...
+ (ia64_vectorize_vec_perm_const): ...this new function.
+ * config/mips/loongson.md (vec_perm_const<mode>): Delete.
+ * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
+ * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
+ * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
+ * config/mips/mips.c (mips_expand_vec_perm_const)
+ (mips_vectorize_vec_perm_const_ok): Merge into...
+ (mips_vectorize_vec_perm_const): ...this new function.
+ * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
+ * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
+ * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
+ * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
+ * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
+ (rs6000_expand_vec_perm_const): Delete.
+ * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
+ Delete.
+ (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
+ (altivec_expand_vec_perm_const_le): Take each operand individually.
+ Operate on constant selectors rather than rtxes.
+ (altivec_expand_vec_perm_const): Likewise. Update call to
+ altivec_expand_vec_perm_const_le.
+ (rs6000_expand_vec_perm_const): Delete.
+ (rs6000_vectorize_vec_perm_const_ok): Delete.
+ (rs6000_vectorize_vec_perm_const): New function.
+ (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
+ an element count and rtx array.
+ (rs6000_expand_extract_even): Update call accordingly.
+ (rs6000_expand_interleave): Likewise.
+ * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
+ * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
+ * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
+ * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
+ (rs6000_expand_vec_perm_const): Delete.
+ * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
+ (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
+ (altivec_expand_vec_perm_const_le): Take each operand individually.
+ Operate on constant selectors rather than rtxes.
+ (altivec_expand_vec_perm_const): Likewise. Update call to
+ altivec_expand_vec_perm_const_le.
+ (rs6000_expand_vec_perm_const): Delete.
+ (rs6000_vectorize_vec_perm_const_ok): Delete.
+ (rs6000_vectorize_vec_perm_const): New function. Remove stray
+ reference to the SPE evmerge intructions.
+ (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
+ an element count and rtx array.
+ (rs6000_expand_extract_even): Update call accordingly.
+ (rs6000_expand_interleave): Likewise.
+ * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
+ * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
+ new function.
+ (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
+
+2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
+ vector mode and that that mode matches the mode of the data
+ being permuted.
+ (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
+ out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
+ directly using expand_vec_perm_1 when forcing selectors into
+ registers.
+ (expand_vec_perm_var): New function, split out from expand_vec_perm.
+
+2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * optabs-query.h (can_vec_perm_p): Delete.
+ (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
+ * optabs-query.c (can_vec_perm_p): Split into...
+ (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
+ (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
+ particular selector is valid.
+ * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
+ * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
+ (vect_grouped_load_supported): Likewise.
+ (vect_shift_permute_load_chain): Likewise.
+ * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
+ (vect_transform_slp_perm_load): Likewise.
+ * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
+ (vectorizable_bswap): Likewise.
+ (vect_gen_perm_mask_checked): Likewise.
+ * fold-const.c (fold_ternary_loc): Likewise. Don't take
+ implementations of variable permutation vectors into account
+ when deciding which selector to use.
+ * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
+ vec_perm_const_optab is supported; instead use can_vec_perm_const_p
+ with a false third argument.
+ * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
+ to test whether the constant selector is valid and can_vec_perm_var_p
+ to test whether a variable selector is valid.
+
+2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
+ * optabs-query.c (can_vec_perm_p): Likewise.
+ * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
+ instead of vec_perm_indices.
+ * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
+ (vect_gen_perm_mask_checked): Likewise,
+ * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
+ (vect_gen_perm_mask_checked): Likewise,
+
+2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * optabs-query.h (qimode_for_vec_perm): Declare.
+ * optabs-query.c (can_vec_perm_p): Split out qimode search to...
+ (qimode_for_vec_perm): ...this new function.
+ * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
+
+2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
+
+ * rtlanal.c (canonicalize_condition): Return 0 if final rtx
+ does not have a conditional at the top.
+
+2018-01-02 Richard Biener <rguenther@suse.de>
+
+ * ipa-inline.c (big_speedup_p): Fix expression.
+
+2018-01-02 Jan Hubicka <hubicka@ucw.cz>
+
+ PR target/81616
+ * config/i386/x86-tune-costs.h: Increase cost of integer load costs
+ for generic 4->6.
+
+2018-01-02 Jan Hubicka <hubicka@ucw.cz>
+
+ PR target/81616
+ Generic tuning.
+ * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
+ cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
+ and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
+ cond_taken_branch_cost 3->4.
+
+2018-01-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/83581
+ * tree-loop-distribution.c (pass_loop_distribution::execute): Return
+ TODO_cleanup_cfg if any changes have been made.
+
+ PR middle-end/83608
+ * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
+ convert_modes if target mode has the right side, but different mode
+ class.
+
+ PR middle-end/83609
+ * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
+ last argument when extracting from CONCAT. If either from_real or
+ from_imag is NULL, use expansion through memory. If result is not
+ a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
+ the parts directly to inner mode, if even that fails, use expansion
+ through memory.
+
+ PR middle-end/83623
+ * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
+ check for bswap in mode rather than HImode and use that in expand_unop
+ too.
+
+2017-12-31 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/83536
+ * config/i386/i386.c (ix86_attribute_table): Remove excess
+ initializer for "shared" attribute.
+
+2017-12-30 Tom de Vries <tom@codesourcery.com>
+
+ PR libgomp/83046
+ * omp-expand.c (expand_omp_target): If in_lto_p, mark offload_funcs with
+ DECL_PRESERVE_P.
+ * lto-streamer-out.c (prune_offload_funcs): New function. Remove
+ offload_funcs entries that no longer have a corresponding cgraph_node.
+ Mark the remaining ones as DECL_PRESERVE_P.
+ (output_lto): Call prune_offload_funcs.
+
+2017-12-30 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
+ vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>,
+ vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
+ vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
+ vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
+ vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1, vpdpbusd_<mode>,
+ vpdpbusd_<mode>_mask, vpdpbusd_<mode>_maskz, vpdpbusd_<mode>_maskz_1,
+ vpdpbusds_<mode>, vpdpbusds_<mode>_mask, vpdpbusds_<mode>_maskz,
+ vpdpbusds_<mode>_maskz_1, vpdpwssd_<mode>, vpdpwssd_<mode>_mask,
+ vpdpwssd_<mode>_maskz, vpdpwssd_<mode>_maskz_1, vpdpwssds_<mode>,
+ vpdpwssds_<mode>_mask, vpdpwssds_<mode>_maskz,
+ vpdpwssds_<mode>_maskz_1, vaesdec_<mode>, vaesdeclast_<mode>,
+ vaesenc_<mode>, vpclmulqdq_<mode>,
+ avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>): Formatting fixes.
+
+2017-12-28 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ * builtins.def: (_Float<N> and _Float<N>X BUILT_IN_CEIL): Add
+ _Float<N> and _Float<N>X variants for rounding built-in
+ functions.
+ (_Float<N> and _Float<N>X BUILT_IN_FLOOR): Likewise.
+ (_Float<N> and _Float<N>X BUILT_IN_NEARBYINT): Likewise.
+ (_Float<N> and _Float<N>X BUILT_IN_RINT): Likewise.
+ (_Float<N> and _Float<N>X BUILT_IN_ROUND): Likewise.
+ (_Float<N> and _Float<N>X BUILT_IN_TRUNC): Likewise.
+ * builtins.c (mathfn_built_in_2): Likewise.
+ * internal-fn.def (CEIL): Likewise.
+ (FLOOR): Likewise.
+ (NEARBYINT): Likewise.
+ (RINT): Likewise.
+ (ROUND): Likewise.
+ (TRUNC): Likewise.
+ * convert.c (convert_to_integer_1): Likewise.
+ * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
+ (integer_valued_real_call_p): Likewise.
+ * fold-const-call.c (fold_const_call_ss): Likewise.
+ * gencfn-macros.c (print_case_cfn): Change CFN and operator
+ printers to take a const char * suffix instead of a bool.
+ (print_define_operator_list): Likewise.
+ (fltall_suffixes): New list of suffixes, that include the
+ traditional suffixes as well as all of the _Float<N> and
+ _Float<N>X suffixes.
+ (main): For _Float<N> and _Float<N>X functions, emit both
+ <name>_FN and <name>_ALL variants. The <macro>_FN variant only
+ has the _Float<N> and _Float<N>X case names or operators. The
+ <name>_ALL variant has both the traditional and the
+ _Float<N>/_Float<N>X case names or operators.
+ * match.pd (COPYSIGN optimizations): Provide optimizations for
+ _Float<N> and _Float<N>X types where possible.
+ (MIN/MAX optimizations): Likewise.
+ (sqrt optimizations): Likewise.
+ (rounding optimizations): Likewise.
+
+2017-12-28 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * config/powerpcspe/powerpcspe.md (ieee_128bit_negative_zero): Use
+ gen_int_mode rather than GEN_INT.
+ * config/rs6000/rs6000.md (ieee_128bit_negative_zero): Likewise.
+
+2017-12-28 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * emit-rtl.c (gen_const_vec_series): Use valid_for_const_vector_p
+ instead of CONSTANT_P.
+ (gen_vec_series): Likewise.
+ * simplify-rtx.c (simplify_binary_operation_1): Likewise.
+
+2017-12-28 Andreas Schwab <schwab@linux-m68k.org>
+
+ * config/m68k/m68k.md (ashrdi3_const1, lshrdi3_const1): Add
+ CC_STATUS_INIT.
+
+2017-12-27 Kugan Vivekanandarajah <kuganv@linaro.org>
+
+ * config/aarch64/aarch64-simd.md (aarch64_ld1x2<VQ:mode>): New.
+ (aarch64_ld1x2<VDC:mode>): Likewise.
+ (aarch64_simd_ld1<mode>_x2): Likewise.
+ (aarch64_simd_ld1<mode>_x2): Likewise.
+ * config/aarch64/arm_neon.h (vld1_u8_x2): New.
+ (vld1_s8_x2): Likewise.
+ (vld1_u16_x2): Likewise.
+ (vld1_s16_x2): Likewise.
+ (vld1_u32_x2): Likewise.
+ (vld1_s32_x2): Likewise.
+ (vld1_u64_x2): Likewise.
+ (vld1_s64_x2): Likewise.
+ (vld1_f16_x2): Likewise.
+ (vld1_f32_x2): Likewise.
+ (vld1_f64_x2): Likewise.
+ (vld1_p8_x2): Likewise.
+ (vld1_p16_x2): Likewise.
+ (vld1_p64_x2): Likewise.
+ (vld1q_u8_x2): Likewise.
+ (vld1q_s8_x2): Likewise.
+ (vld1q_u16_x2): Likewise.
+ (vld1q_s16_x2): Likewise.
+ (vld1q_u32_x2): Likewise.
+ (vld1q_s32_x2): Likewise.
+ (vld1q_u64_x2): Likewise.
+ (vld1q_s64_x2): Likewise.
+ (vld1q_f16_x2): Likewise.
+ (vld1q_f32_x2): Likewise.
+ (vld1q_f64_x2): Likewise.
+ (vld1q_p8_x2): Likewise.
+ (vld1q_p16_x2): Likewise.
+ (vld1q_p64_x2): Likewise.
+
+2017-12-27 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/83552
+ * tree-ssa-strlen.c (fold_strstr_to_strncmp): Assign result
+ of get_string_lenth to a SSA_NAME if not a GIMPLE value.
+
+2017-12-27 Tom de Vries <tom@codesourcery.com>
+
+ * config/nvptx/nvptx.c (nvptx_option_override): Disable
+ -gstatement-frontiers.
+
+2017-12-26 Alexander Monakov <amonakov@ispras.ru>
+
+ PR rtl-optimization/83513
+ * sel-sched.c (sel_rank_for_schedule): Order by non-zero usefulness
+ before priority comparison.
+
+2017-12-25 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/83488
+ * config/i386/i386.opt (-mavx512vpopcntdq, -mmavx512bitalg): Move from
+ ix86_isa_flags2 to ix86_isa_flags.
+ * config/i386/i386-c.c (ix86_target_macros_internal): Test
+ OPTION_MASK_ISA_AVX512BITALG and OPTION_MASK_ISA_AVX512VPOPCNTDQ in
+ isa_flags rather than isa_flags2.
+ * config/i386/i386.c (ix86_target_string): Move -mavx512vpopcntdq
+ and -mavx512bitalg from isa2_opts to isa_opts.
+ (ix86_option_override_internal): Test OPTION_MASK_ISA_AVX512VPOPCNTDQ
+ in x_ix86_isa_flags_explicit rather than x_ix86_isa_flags2_explicit
+ and set it in x_ix86_isa_flags rather than x_ix86_isa_flags2.
+ Formatting fixes.
+ (def_builtin): Treat OPTION_MASK_ISA_AVX512BW or
+ OPTION_MASK_ISA_AVX512F ored with another option similarly to
+ OPTION_MASK_ISA_AVX512VL. Even for OPTION_MASK_ISA_AVX512VL don't
+ clear it if mask is just OPTION_MASK_ISA_AVX512VL itself.
+ (ix86_expand_builtin): Don't handle OPTION_MASK_ISA_GFNI and
+ OPTION_MASK_ISA_VPCLMULQDQ specially, instead handle
+ OPTION_MASK_ISA_AVX512BW and OPTION_MASK_ISA_AVX512F that way.
+ * config/i386/i386-builtin.def: Move AVX512VPOPCNTDQ and AVX512BITALG
+ builtins from bdesc_args2 to bdesc_args section.
+ (__builtin_ia32_compressstoreuqi512_mask,
+ __builtin_ia32_compressstoreuhi512_mask,
+ __builtin_ia32_compressstoreuqi256_mask,
+ __builtin_ia32_expandloadqi512_mask,
+ __builtin_ia32_expandloadqi512_maskz,
+ __builtin_ia32_expandloadhi512_mask,
+ __builtin_ia32_expandloadhi512_maskz,
+ __builtin_ia32_compressqi512_mask, __builtin_ia32_compresshi512_mask,
+ __builtin_ia32_compressqi256_mask, __builtin_ia32_expandqi512_mask,
+ __builtin_ia32_expandqi512_maskz, __builtin_ia32_expandhi512_mask,
+ __builtin_ia32_expandhi512_maskz, __builtin_ia32_expandqi256_mask,
+ __builtin_ia32_expandqi256_maskz, __builtin_ia32_vpshrd_v32hi_mask,
+ __builtin_ia32_vpshld_v32hi_mask, __builtin_ia32_vpshrdv_v32hi_mask,
+ __builtin_ia32_vpshrdv_v32hi_maskz, __builtin_ia32_vpshldv_v32hi_mask,
+ __builtin_ia32_vpshldv_v32hi_maskz,
+ __builtin_ia32_vpopcountb_v64qi_mask,
+ __builtin_ia32_vpopcountw_v32hi_mask,
+ __builtin_ia32_vpshufbitqmb512_mask,
+ __builtin_ia32_vpshufbitqmb256_mask): Add
+ " | OPTION_MASK_ISA_AVX512BW".
+ (__builtin_ia32_expandloadqi256_mask,
+ __builtin_ia32_expandloadqi256_maskz,
+ __builtin_ia32_vpopcountb_v32qi_mask): Add
+ " | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW".
+ (__builtin_ia32_expandloadhi256_mask,
+ __builtin_ia32_expandloadhi256_maskz,
+ __builtin_ia32_expandloadqi128_mask,
+ __builtin_ia32_expandloadqi128_maskz,
+ __builtin_ia32_expandloadhi128_mask,
+ __builtin_ia32_expandloadhi128_maskz,
+ __builtin_ia32_vpshrd_v16hi, __builtin_ia32_vpshrd_v16hi_mask,
+ __builtin_ia32_vpshrd_v8hi, __builtin_ia32_vpshrd_v8hi_mask,
+ __builtin_ia32_vpshrd_v8si, __builtin_ia32_vpshrd_v8si_mask,
+ __builtin_ia32_vpshrd_v4si, __builtin_ia32_vpshrd_v4si_mask,
+ __builtin_ia32_vpshrd_v4di, __builtin_ia32_vpshrd_v4di_mask,
+ __builtin_ia32_vpshrd_v2di, __builtin_ia32_vpshrd_v2di_mask,
+ __builtin_ia32_vpshld_v16hi, __builtin_ia32_vpshld_v16hi_mask,
+ __builtin_ia32_vpshld_v8hi, __builtin_ia32_vpshld_v8hi_mask,
+ __builtin_ia32_vpshld_v8si, __builtin_ia32_vpshld_v8si_mask,
+ __builtin_ia32_vpshld_v4si, __builtin_ia32_vpshld_v4si_mask,
+ __builtin_ia32_vpshld_v4di, __builtin_ia32_vpshld_v4di_mask,
+ __builtin_ia32_vpshld_v2di, __builtin_ia32_vpshld_v2di_mask,
+ __builtin_ia32_vpshrdv_v16hi, __builtin_ia32_vpshrdv_v16hi_mask,
+ __builtin_ia32_vpshrdv_v16hi_maskz, __builtin_ia32_vpshrdv_v8hi,
+ __builtin_ia32_vpshrdv_v8hi_mask, __builtin_ia32_vpshrdv_v8hi_maskz,
+ __builtin_ia32_vpshrdv_v8si, __builtin_ia32_vpshrdv_v8si_mask,
+ __builtin_ia32_vpshrdv_v8si_maskz, __builtin_ia32_vpshrdv_v4si,
+ __builtin_ia32_vpshrdv_v4si_mask, __builtin_ia32_vpshrdv_v4si_maskz,
+ __builtin_ia32_vpshrdv_v4di, __builtin_ia32_vpshrdv_v4di_mask,
+ __builtin_ia32_vpshrdv_v4di_maskz, __builtin_ia32_vpshrdv_v2di,
+ __builtin_ia32_vpshrdv_v2di_mask, __builtin_ia32_vpshrdv_v2di_maskz,
+ __builtin_ia32_vpshldv_v16hi, __builtin_ia32_vpshldv_v16hi_mask,
+ __builtin_ia32_vpshldv_v16hi_maskz, __builtin_ia32_vpshldv_v8hi,
+ __builtin_ia32_vpshldv_v8hi_mask, __builtin_ia32_vpshldv_v8hi_maskz,
+ __builtin_ia32_vpshldv_v8si, __builtin_ia32_vpshldv_v8si_mask,
+ __builtin_ia32_vpshldv_v8si_maskz, __builtin_ia32_vpshldv_v4si,
+ __builtin_ia32_vpshldv_v4si_mask, __builtin_ia32_vpshldv_v4si_maskz,
+ __builtin_ia32_vpshldv_v4di, __builtin_ia32_vpshldv_v4di_mask,
+ __builtin_ia32_vpshldv_v4di_maskz, __builtin_ia32_vpshldv_v2di,
+ __builtin_ia32_vpshldv_v2di_mask, __builtin_ia32_vpshldv_v2di_maskz,
+ __builtin_ia32_vpopcountb_v32qi, __builtin_ia32_vpopcountb_v16qi,
+ __builtin_ia32_vpopcountb_v16qi_mask, __builtin_ia32_vpopcountw_v16hi,
+ __builtin_ia32_vpopcountw_v16hi_mask, __builtin_ia32_vpopcountw_v8hi,
+ __builtin_ia32_vpopcountw_v8hi_mask): Add
+ " | OPTION_MASK_ISA_AVX512VL".
+ * config/i386/avx512vbmi2intrin.h (_mm512_shrdi_epi16,
+ _mm512_shrdi_epi32, _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
+ _mm512_shrdi_epi64, _mm512_mask_shrdi_epi64, _mm512_maskz_shrdi_epi64,
+ _mm512_shldi_epi16, _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
+ _mm512_maskz_shldi_epi32, _mm512_shldi_epi64, _mm512_mask_shldi_epi64,
+ _mm512_maskz_shldi_epi64, _mm512_shrdv_epi16, _mm512_shrdv_epi32,
+ _mm512_mask_shrdv_epi32, _mm512_maskz_shrdv_epi32, _mm512_shrdv_epi64,
+ _mm512_mask_shrdv_epi64, _mm512_maskz_shrdv_epi64, _mm512_shldv_epi16,
+ _mm512_shldv_epi32, _mm512_mask_shldv_epi32, _mm512_maskz_shldv_epi32,
+ _mm512_shldv_epi64, _mm512_mask_shldv_epi64,
+ _mm512_maskz_shldv_epi64): Don't require avx512bw for these intrinsics.
+ * config/i386/avx512bitalgintrin.h (_mm_bitshuffle_epi64_mask,
+ _mm_mask_bitshuffle_epi64_mask): Likewise.
+ * common/config/i386/i386-common.c
+ (OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET,
+ OPTION_MASK_ISA_AVX512BITALG_SET): Or in OPTION_MASK_ISA_AVX512F_SET.
+ (OPTION_MASK_ISA_AVX512F_UNSET): Or in
+ OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET and
+ OPTION_MASK_ISA_AVX512BITALG_UNSET.
+ (OPTION_MASK_ISA2_AVX512F_UNSET,
+ OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET): Define.
+ (ix86_handle_option): For -mno-general-regs-only, clear from
+ ix86_isa_flags2 OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET rather than
+ just OPTION_MASK_ISA_MPX. For -mno-sse{,2,3,4,4.1,4.2,avx,avx2} and
+ -mno-ssse3 clear OPTION_MASK_ISA2_AVX512F_UNSET bits from
+ ix86_isa_flags2. For -mno-avx512f likewise, instead of masking
+ individually listed ISAs. For -m{,no-}avx512{vpopcntdq,bitalg} adjust
+ for moving from ix86_isa_flags2 to ix86_isa_flags.
+
+2017-12-23 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/83553
+ * fold-const.c (struct contains_label_data): New type.
+ (contains_label_1): Return non-NULL even for CASE_LABEL_EXPR, unless
+ inside of a SWITCH_BODY seen during the walk.
+ (contains_label_p): Use walk_tree instead of
+ walk_tree_without_duplicates, prepare data for contains_label_1 and
+ provide own pset.
+
2017-12-22 Jakub Jelinek <jakub@redhat.com>
PR debug/83547
* combine.c (move_deaths): If reg_stat points to a too new insn in
last_death, do not use it: find the proper insn instead.
+2017-12-12 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
+
+ PR target/82190
+ * config/rs6000/rs6000-string.c (expand_block_compare,
+ expand_strn_compare): Fix set_mem_size() calls.
+
2017-12-12 Jeff Law <law@redhat.com>
PR tree-optimization/83298
projects / platform / upstream / gcc.git / blobdiff