rs6000.md (div<mode>3): Fix comment.
[platform/upstream/gcc.git] / gcc / ChangeLog
index 5d85946..944352d 100644 (file)
@@ -1,3 +1,343 @@
+2014-09-21  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.md (div<mode>3): Fix comment.  Use a different
+       insn for divides by integer powers of two.
+       (div<mode>3_sra, *div<mode>3_sra_dot, *div<mode>3_sra_dot2): New.
+       (mod<mode>3): Fix formatting.
+       (three anonymous define_insn and two define_split): Delete.
+
+2014-09-21  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.md (ashr<mode>3, *ashr<mode>3, *ashrsi3_64,
+       *ashr<mode>3_dot, *ashr<mode>3_dot2): Clobber CA_REGNO.
+       (floatdisf2_internal2): Ditto.
+       (ashrdi3_no_power): Ditto.  Fix formatting.
+
+2014-09-21  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.md (ctz<mode>2, ffs<mode>2, popcount<mode>2,
+       popcntb<mode>2, popcntd<mode>2, parity<mode>2, parity<mode>2_cmpb):
+       Tidy.
+
+2014-09-21  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.md (strlensi): Don't use subsi3 with a
+       constant, use addsi3 directly.
+       (three anonymous define_insn, two define_split): Delete.
+       (sub<mode>3): Move.  Do not allow constant second operand.
+       Generate different insn for constant first operand.
+       (*subf<mode>3, *subf<mode>3_dot, *subf<mode>3_dot2): New.
+       (subf<mode>3_imm): New.
+       (ctz<mode>2, ffs<mode>2): Clobber CA_REGNO where required.
+       (*plus_ltu<mode>): Only handle registers.
+       (*plus_ltu<mode>_1): New.  Handle integer third operand.
+       (*plus_gtu<mode>): Only handle registers.
+       (*plus_gtu<mode>_1): New.  Handle integer third operand.
+
+2014-09-21  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.md (iorxor): New code_iterator.
+       (iorxor): New code_attr.
+       (IORXOR): New code_attr.
+       (*and<mode>3, *and<mode>3_dot, *and<mode>3_dot2): Delete.
+       (ior<mode>3, xor<mode>3): Delete.
+       (<iorxor><mode>3): New.
+       (splitter for "big" integer ior, xor): New.
+       (*bool<mode>3): Move.  Also handle AND.
+       (*bool<mode>3_dot, *bool<mode>3_dot2): Also handle AND.
+       (splitter for "big" integer ior, xor): Delete.
+
+2014-09-21  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.md (*neg<mode>2_internal): Delete.
+       (two anonymous define_insn and two define_split): Delete.
+       (*neg<mode>2, *neg<mode>2_dot, *neg<mode>2_dot2): New.
+
+2014-09-21  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.md (*one_cmpl<mode>2): Generate "not" insn.
+       (two anonymous define_insn and two define_split): Delete.
+       (*one_cmpl<mode>2_dot, *one_cmpl<mode>2_dot2): New.
+
+2014-09-21  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.c (rs6000_rtx_costs) <NE>: New.
+
+2014-09-21  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/predicates.md (ca_operand): Allow subregs.
+       (input_operand): Do not allow ca_operand.
+       * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): For the
+       carry bit, allow SImode and Pmode.
+       (rs6000_init_hard_regno_mode_ok): Make the carry bit class NO_REGS.
+
+2014-09-21  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.c (ix86_expand_call): Generate MS->SYSV extra
+       clobbered registers using clobber_reg.  Remove UNSPEC decoration.
+       * config/i386/i386.md (unspec) <UNSPEC_MS_TO_SYSV_CALL>: Remove.
+       (*call_rex64_ms_sysv): Remove.
+       (*call_value_rex64_ms_sysv): Ditto.
+       * config/i386/predicates.md (call_rex64_ms_sysv_operation): Remove.
+
+2014-09-20  Joern Rennecke  <joern.rennecke@embecosm.com>
+
+       * config/epiphany/epiphany.md (sub_f_add_imm): Change constraint of
+       operand 3 to "CnL".
+
+2014-09-20  Andreas Schwab  <schwab@suse.de>
+
+       * config/ia64/ia64.md: Remove constraints from define_split
+       patterns.
+
+2014-09-19  Jan Hubicka  <hubicka@ucw.cz>
+
+       * ipa-utils.h (ipa_polymorphic_call_context): Turn into class; add ctors.
+       (possible_polymorphic_call_targets, dump_possible_polymorphic_call_targets,
+       possible_polymorphic_call_target_p, possible_polymorphic_call_target_p): Simplify.
+       (get_dynamic_type): Remove.
+       * ipa-devirt.c (ipa_dummy_polymorphic_call_context): Remove.
+       (clear_speculation): Bring to ipa-deivrt.h
+       (get_class_context): Rename to ...
+       (ipa_polymorphic_call_context::restrict_to_inner_class): ... this one.
+       (contains_type_p): Update.
+       (get_dynamic_type): Rename to ...
+       ipa_polymorphic_call_context::get_dynamic_type(): ... this one.
+       (possible_polymorphic_call_targets): UPdate.
+       * tree-ssa-pre.c (eliminate_dom_walker::before_dom_children): Update.
+       * ipa-prop.c (ipa_analyze_call_uses): Update.
+
+2014-09-19  Jan Hubicka  <hubicka@ucw.cz>
+
+       * ipa-visibility.c (varpool_node::externally_visible_p): Do not
+       privatize dynamic TLS variables.
+
+2014-09-19  Jan Hubicka  <hubicka@ucw.cz>
+
+       * diagnostic.c (warning_n): New function.
+       * diagnostic-core.h (warning_n): Declare.
+       * ipa-devirt.c (ipa_devirt): Handle singulars correctly;
+       output dynamic counts when available.
+
+2014-09-19  Jan Hubicka  <hubicka@ucw.cz>
+
+       PR tree-optimization/63255
+       * ipa.c (symbol_table::remove_unreachable_nodes): Fix ordering
+       issue in setting body_removed flag.
+
+2014-09-19  Jan Hubicka  <hubicka@ucw.cz>
+
+       PR c++/61825
+       * c-family/c-common.c (handle_alias_ifunc_attribute): Check
+       that visibility change is possible
+       (handle_weakref_attribute): Likewise.
+       * cgraph.h (symtab_node): Add method get_create and
+       field refuse_visibility_changes.
+       (symtab_node::get_create): New method.
+       * fold-const.c (tree_single_nonzero_warnv_p): Use get_create.
+       * varasm.c (mark_weak): Verify that visibility change is
+       possible.
+
+2014-09-19  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+       * config/rs6000/predicates.md (fusion_gpr_mem_load): Move testing
+       for base_reg_operand to be common between LO_SUM and PLUS.
+       (fusion_gpr_mem_combo): New predicate to match a fused address
+       that combines the addis and memory offset address.
+
+       * config/rs6000/rs6000-protos.h (fusion_gpr_load_p): Change
+       calling signature.
+       (emit_fusion_gpr_load): Likewise.
+
+       * config/rs6000/rs6000.c (fusion_gpr_load_p): Change calling
+       signature to pass each argument separately, rather than
+       using an operands array.  Rewrite the insns found by peephole2 to
+       be a single insn, rather than hoping the insns will still be
+       together when the peephole pass is done.  Drop being called via a
+       normal peephole.
+       (emit_fusion_gpr_load): Change calling signature to be called from
+       the fusion_gpr_load_<mode> insns with a combined memory address
+       instead of the peephole pass passing the addis and offset
+       separately.
+
+       * config/rs6000/rs6000.md (UNSPEC_FUSION_GPR): New unspec for GPR
+       fusion.
+       (power8 fusion peephole): Drop support for doing power8 via a
+       normal peephole that was created by the peephole2 pass.
+       (power8 fusion peephole2): Create a new insn with the fused
+       address, so that the fused operation is kept together after
+       register allocation is done.
+       (fusion_gpr_load_<mode>): Likewise.
+
+2014-09-19  Jan Hubicka  <hubicka@ucw.cz>
+
+       PR lto/63286
+       * tree.c (need_assembler_name_p): Do not mangle variadic types.
+
+2014-09-19  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * recog.c (scratch_operand): Do not simply allow all hard registers:
+       only allow those that are allocatable.
+
+2014-09-19  Felix Yang  <felix.yang@huawei.com>
+
+       * cfgrtl.c ira.c ira-color.c ira-conflicts ira-lives.c: Update
+       comments and fix spacing to conform to coding style.
+
+2014-09-19  James Greenhalgh  <james.greenhalgh@arm.com>
+
+       * genrecog.c (validate_pattern): Allow empty constraints in
+       a match_scratch.
+
+2014-09-19  Aldy Hernandez  <aldyh@redhat.com>
+
+       * dwarf2out.c (decl_ultimate_origin): Update comment.
+       * tree.c (block_ultimate_origin): Same.
+
+2014-09-19  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
+
+       * config/rs6000/rs6000.c (rs6000_special_adjust_field_align_p):
+       Update GCC version name to GCC 5.
+       (rs6000_function_arg_boundary): Likewise.
+       (rs6000_function_arg): Likewise.
+
+2014-09-19  James Greenhalgh  <james.greenhalgh@arm.com>
+
+       * config/sh/sh.md: Fix use of constraints in define_split.
+
+2014-09-19  Markus Trippelsdorf  <markus@trippelsdorf.de>
+
+       PR ipa/61998
+       * ipa-devirt.c (ipa_devirt): Bail out if odr_types_ptr is NULL.
+
+2014-09-19  James Greenhalgh  <james.greenhalgh@arm.com>
+
+       * doc/md.texi (Modifiers): Consistently use "read/write"
+       nomenclature rather than "input/output".
+       * genrecog.c (constraints_supported_in_insn_p): New.
+       (validate_pattern): If needed, also check constraints on
+       MATCH_SCRATCH operands.
+       * genoutput.c (validate_insn_alternatives): Catch earlyclobber
+       operands with no '=' or '+' modifier.
+
+2014-09-19  James Greenhalgh  <james.greenhalgh@arm.com>
+
+       * config/aarch64/aarch64.md (stack_protect_test_<mode>): Mark
+       scratch register as written.
+
+2014-09-19  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
+
+       * config/s390/s390.c (s390_emit_epilogue): Remove bogus
+       assignment.
+
+2014-09-19  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
+
+       * config/s390/s390.md ("trunctdsd2", "extendsdtd2"): New
+       expanders.
+
+2014-09-19  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
+
+       PR target/62662
+       * config/s390/s390.c (s390_emit_epilogue): When doing the return
+       address load optimization force s390_optimize_prologue to leave it
+       that way.  Only do the optimization if we already decided to push
+       r14 into a stack slot.
+
+2014-09-19  Marat Zakirov  <m.zakirov@samsung.com>
+
+       * asan.c (build_check_stmt): Alignment arg was added.
+       (asan_expand_check_ifn): Optimization for alignment >= 8.
+
+2014-09-19  Olivier Hainque  <hainque@adacore.com>
+
+       * config/i386/vxworksae.h: Remove obsolete definitions.
+       (STACK_CHECK_PROTECT): Define.
+       * config/i386/vx-common.h: Remove.  Merge contents within
+       config/i386/vxworks.h.
+       * config.gcc (i?86-vxworks*): Use i386/vxworks.h instead of
+       i386/vx-common.h.
+
+2014-09-19  Olivier Hainque  <hainque@adacore.com>
+
+       * config.gcc (powerpc-wrs-vxworksmils): New configuration.
+       * config/rs6000/t-vxworksmils: New file.
+       * config/rs6000/vxworksmils.h: New file.
+
+2014-09-19  Olivier Hainque  <hainque@adacore.com>
+
+       * varasm.c (default_section_type_flags): Flag .persistent.bss
+       sections as SECTION_BSS.
+
+2014-09-19  Nick Clifton  <nickc@redhat.com>
+
+       * config/rl78/rl78.c (rl78_expand_epilogue): Generate a USE of the
+       pop'ed registers so that DCE does not eliminate them.
+
+2014-09-18  Jan Hubicka  <hubicka@ucw.cz>
+
+       PR lto/63298
+       * ipa-devirt.c (odr_subtypes_equivalent_p): Fix thinko in a condition.
+
+2014-09-18  Joseph Myers  <joseph@codesourcery.com>
+
+       * system.h (LIBGCC2_TF_CEXT): Poison.
+       * config/i386/cygming.h (LIBGCC2_TF_CEXT): Remove.
+       * config/i386/darwin.h (LIBGCC2_TF_CEXT): Likewise.
+       * config/i386/dragonfly.h (LIBGCC2_TF_CEXT): Likewise.
+       * config/i386/freebsd.h (LIBGCC2_TF_CEXT): Likewise.
+       * config/i386/gnu-user-common.h (LIBGCC2_TF_CEXT): Likewise.
+       * config/i386/openbsdelf.h (LIBGCC2_TF_CEXT): Likewise.
+       * config/i386/sol2.h (LIBGCC2_TF_CEXT): Likewise.
+       * config/ia64/ia64.h (LIBGCC2_TF_CEXT): Likewise.
+       * config/ia64/linux.h (LIBGCC2_TF_CEXT): Likewise.
+
+2014-09-19  Kito Cheng  <kito@0xlab.org>
+
+       * except.h: Fix header guard.
+       * addresses.h: Add missing header guard.
+       * cfghooks.h: Likewise.
+       * collect-utils.h: Likewise.
+       * collect2-aix.h: Likewise.
+       * conditions.h: Likewise.
+       * cselib.h: Likewise.
+       * dwarf2asm.h: Likewise.
+       * graphds.h: Likewise.
+       * graphite-scop-detection.h: Likewise.
+       * gsyms.h: Likewise.
+       * hw-doloop.h: Likewise.
+       * incpath.h: Likewise.
+       * ipa-inline.h: Likewise.
+       * ipa-ref.h: Likewise.
+       * ira-int.h: Likewise.
+       * ira.h: Likewise.
+       * lra-int.h: Likewise.
+       * lra.h: Likewise.
+       * lto-section-names.h: Likewise.
+       * read-md.h: Likewise.
+       * reload.h: Likewise.
+       * rtl-error.h: Likewise.
+       * sdbout.h: Likewise.
+       * targhooks.h: Likewise.
+       * tree-affine.h: Likewise.
+       * xcoff.h: Likewise.
+       * xcoffout.h: Likewise.
+
+2014-09-18  Vladimir Makarov  <vmakarov@redhat.com>
+
+       PR debug/63285
+       * haifa-sched.c (schedule_block): Advance cycle at the end of BB
+       if advance != 0.
+
+2014-09-18  Vladimir Makarov  <vmakarov@redhat.com>
+
+       PR target/61360
+       * lra.c (lra): Call recog_init.
+
+2014-09-18  Jakub Jelinek  <jakub@redhat.com>
+
+       PR c++/62017
+       * asan.c (transform_statements): Don't instrument clobber statements.
+
 2014-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        * config/arm/neon.md (*movmisalign<mode>_neon_load): Change type