+2019-01-22 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/88965
+ * config/rs6000/rs6000.c: Include tree-vrp.h and tree-ssanames.h.
+ (rs6000_gimple_fold_builtin): If MEM_REF address doesn't satisfy
+ is_gimple_mem_ref_addr predicate, force it into a SSA_NAME first.
+
+ PR middle-end/88968
+ * gimplify.c (gimplify_omp_atomic): Handle bitfield atomics with
+ non-integral DECL_BIT_FIELD_REPRESENTATIVEs.
+
+ PR target/87064
+ * config/rs6000/vsx.md (*vsx_reduc_<VEC_reduc_name>_v2df_scalar):
+ Disable for little endian.
+
+2019-01-22 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/88469
+ * config/arm/arm.c (arm_needs_double_word_align): Check
+ DECL_BIT_FIELD_TYPE.
+
+2019-01-22 Hongtao Liu <hongtao.liu@intel.com>
+ H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/88909
+ * config/i386/i386-builtin.def: Add mask2 to all builtin
+ initializations. Merge ARGS2 and SPECIAL_ARGS2 into ARGS and
+ SPECIAL_ARGS.
+ * config/i386/i386.c (BDESC): Add mask2 to the definition.
+ (BDESC_FIRST): Likewise.
+ (define_builtin): Add an argument for mask2. Updated to handle
+ both ix86_isa_flags and ix86_isa_flags2.
+ (define_builtin_const): Likewise.
+ (define_builtin_pure): Likewise.
+ (define_builtin2): Deleted.
+ (define_builtin_const2): Likewise.
+ (builtin_description): Add a member, mask2.
+ (bdesc_*): Add mask2 to builtin initializations.
+ (ix86_init_mmx_sse_builtins): Update calls to def_builtin,
+ def_builtin_const and def_builtin_pure. Remove SPECIAL_ARGS2
+ support.
+ (ix86_get_builtin_func_type): Remove SPECIAL_ARGS2 support.
+
+2019-01-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/88954
+ * config/i386/i386.c (ix86_force_load_from_GOT_p): Also check
+ noplt attribute.
+
+2019-01-22 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/88469
+ * config/arm/arm.c (arm_needs_doubleword_align): Return 2 if a record's
+ alignment is dominated by a bitfield with 64-bit aligned base type.
+ (arm_function_arg): Emit a warning if the alignment has changed since
+ earlier GCC releases.
+ (arm_function_arg_boundary): Likewise.
+ (arm_setup_incoming_varargs): Likewise.
+
+2019-01-22 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/88862
+ * graphite-scop-detection.c
+ (scop_detection::graphite_can_represent_scev): Reject ADDR_EXPR.
+
+2019-01-22 Andrew Stubbs <ams@codesourcery.com>
+
+ * doc/extend.tex (AMD GCN Function Attributes): New section.
+ * doc/install.texi (amdgcn-unknown-amdhsa): New instructions.
+ * doc/invoke.texi (AMD GCN Options): New section.
+ * doc/md.texi (Constraints for Particular Machines): Add AMD GCN.
+
+2019-01-22 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/sparc/sparc.c (parc_delegitimize_address): Recognize the GOT
+ register and decoded HIGH/LO_SUM combinations for labels in PIC mode.
+
+2019-01-22 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/88044
+ * tree-ssa-loop-niter.c (number_of_iterations_cond): If condition
+ is false in the first iteration, but !every_iteration, return false
+ instead of true with niter->niter zero.
+
+ PR rtl-optimization/88904
+ * cfgcleanup.c (thread_jump): Verify cond2 doesn't mention
+ any nonequal registers before processing BB_END (b).
+
+ PR target/88905
+ * optabs.c (add_equal_note): Add op0_mode argument, use it instead of
+ GET_MODE (op0).
+ (expand_binop_directly, expand_doubleword_clz,
+ expand_doubleword_popcount, expand_ctz, expand_ffs,
+ expand_unop_direct, maybe_emit_unop_insn): Adjust callers.
+
+ PR rtl-optimization/49429
+ PR target/49454
+ PR rtl-optimization/86334
+ PR target/88906
+ * expr.c (emit_block_move_hints): Move marking of MEM_EXPRs
+ addressable from here...
+ (emit_block_op_via_libcall): ... to here.
+
+2019-01-22 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-loop.c (vect_analyze_loop_operations): Use
+ auto_vec for cost vector to fix memleak.
+ (vectorize_fold_left_reduction): Properly gather SLP defs.
+ (vectorizable_comparison): Do not swap operands to properly
+ gather SLP defs.
+
+2019-01-22 Alan Modra <amodra@gmail.com>
+
+ PR target/88614
+ * config/rs6000/predicates.md (unspec_tls): Ensure GOT reg
+ stays a reg. Allow a const_int.
+ * config/rs6000/rs6000-protos.h (rs6000_output_tlsargs): Declare.
+ * config/rs6000/rs6000.h (IS_V4_FP_ARGS): Define.
+ (IS_NOMARK_TLSGETADDR): Define.
+ * config/rs6000/rs6000.c (edit_tls_call_insn): Delete.
+ (rs6000_output_tlsargs): New function.
+ (rs6000_legitimize_tls_address): Don't say a !TARGET_TLS_MARKERS
+ __tls_get_addr call takes an arg.
+ (rs6000_call_sysv): Generate sysv4 secure plt call pattern here..
+ * config/rs6000/rs6000.md (call_nonlocal_sysv): ..rather than here,
+ delete split..
+ (call_value_nonlocal_sysv): ..or here, delete split.
+ (tls_gdld_nomark): Delete.
+ (call_value_indirect_nonlocal_sysv): Use unspec_tls as operand2
+ predicate. Call rs6000_output_tlsargs. Adjust length to suit.
+ (call_value_nonlocal_sysv): Likewise.
+ (call_value_nonlocal_sysv_secure): Likewise.
+ (call_value_nonlocal_aix): Likewise.
+ (call_value_indirect_aix): Likewise.
+ (call_value_indirect_elfv2): Likewise.
+ (call_value_local32, call_value_local64): Disable for no-mark tls.
+ (call_value_local_aix): Likewise.
+
+2019-01-21 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/88938
+ * config/i386/i386.c (ix86_expand_builtin) [case IX86_BUILTIN_BEXTRI32,
+ case IX86_BUILTIN_BEXTRI64]: Sanitize operands.
+
+2019-01-21 Michael Ploujnikov <michael.ploujnikov@oracle.com>
+
+ * hash-map-tests.c (test_map_of_strings_to_int): Show how to use
+ string contents as hash_map keys.
+
+2019-01-21 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ PR c/88928
+ * c-warn.c (check_alignment_of_packed_member): Add a boolean parameter
+ for rvalue context. Handle rvalues correctly. Use min_align_of_type
+ instead of TYPE_ALIGN.
+ (check_address_or_pointer_of_packed_member): Handle rvalues coorrectly.
+ Use min_align_of_type instead of TYPE_ALIGN_UNIT. Check for NULL
+ pointer from TYPE_STUB_DECL.
+
+2019-01-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/88934
+ * tree-vect-slp.c (vect_mask_constant_operand_p): Always look
+ at the possibly non-constant operand.
+ (vect_get_constant_vectors): Adjust.
+
+2019-01-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/71659
+ * config/i386/adxintrin.h: Just check _IMMINTRIN_H_INCLUDED.
+ * config/i386/clflushoptintrin.h: Check _IMMINTRIN_H_INCLUDED
+ instead of _X86INTRIN_H_INCLUDED.
+ * onfig/i386/clwbintrin.h: Likewise.
+ * config/i386/pkuintrin.h: Likewise.
+ * config/i386/prfchwintrin.h: Likewise.
+ * config/i386/rdseedintrin.h: Likewise.
+ * config/i386/wbnoinvdintrin.h: Likewise.
+ * config/i386/xsavecintrin.h: Likewise.
+ * config/i386/xsavesintrin.h: Likewise.
+ * config/i386/fxsrintrin.h: Enable _IMMINTRIN_H_INCLUDED check.
+ * config/i386/xsaveintrin.h: Likewise.
+ * config/i386/xsaveoptintrin.h: Likewise.
+ * config/i386/x86intrin.h: Move "#include" <rdseedintrin.h>,
+ <prfchwintrin.h>, <fxsrintrin.h>, <xsaveintrin.h>,
+ <xsaveoptintrin.h>, <adxintrin.h>, <clwbintrin.h>,
+ <clflushoptintrin.h>, <xsavesintrin.h>, <xsavecintrin.h>,
+ <wbnoinvdintrin.h> and <pkuintrin.h> to ...
+ * config/i386/immintrin.h: Here.
+
+2019-01-20 Martin Jambor <mjambor@suse.cz>
+
+ PR ipa/87615
+ * ipa-prop.h (struct ipa_func_body_info): Replaced field aa_walked
+ with aa_walk_budget.
+ * cgraph.h (ipa_polymorphic_call_context::get_dynamic_type): Add
+ aa_walk_budget_p parameter.
+ * ipa-fnsummary.c (unmodified_parm_1): New parameter fbi. Limit AA
+ walk. Updated all callers.
+ (unmodified_parm): New parameter fbi, pass it to unmodified_parm_1.
+ (eliminated_by_inlining_prob): New parameter fbi, pass it on to
+ unmodified_parm.
+ (will_be_nonconstant_expr_predicate): New parameter fbi, removed
+ parameter info. Extract info from fbi. Pass fbi to recursive calls
+ and to unmodified_parm.
+ (phi_result_unknown_predicate): New parameter fbi, removed parameter
+ info, updated call to will_be_nonconstant_expr_predicate.
+ (param_change_prob): New parameter fbi, limit AA walking.
+ (analyze_function_body): Initialize aa_walk_budget in fbi. Update
+ calls to various above functions.
+ * ipa-polymorphic-call.c (get_dynamic_type): Add aa_walk_budget_p
+ parameter. Use it to limit AA walking.
+ * ipa-prop.c (detect_type_change_from_memory_writes): New parameter
+ fbi, limit AA walk.
+ (detect_type_change): New parameter fbi, pass it on to
+ detect_type_change_from_memory_writes.
+ (detect_type_change_ssa): Likewise.
+ (aa_overwalked): Removed.
+ (parm_preserved_before_stmt_p): Assume fbi is never NULL, stream line
+ accordingly, adjust to the neew AA limiting scheme.
+ (parm_ref_data_preserved_p): Likewise.
+ (ipa_compute_jump_functions_for_edge): Adjust call to
+ get_dynamic_type.
+ (ipa_analyze_call_uses): Likewise.
+ (ipa_analyze_virtual_call_uses): Pass fbi to detect_type_change_ssa.
+ (ipa_analyze_node): Initialize aa_walk_budget.
+ (ipcp_transform_function): Likewise.
+ * tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt): Update call
+ to get_dynamic_type.
+
+2019-01-19 Jakub Jelinek <jakub@redhat.com>
+
+ * config/aarch64/aarch64.c (aarch64_stack_protect_guard): Move
+ outside of #if CHECKING_P code.
+
+2019-01-19 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gimple-loop-versioning.cc (loop_versioning::dump_inner_likelihood):
+ New function, split out from...
+ (loop_versioning::analyze_stride): ...here.
+ (loop_versioning::find_per_loop_multiplication): Use gassign.
+ (loop_versioning::analyze_term_using_scevs): Return a success code.
+ (loop_versioning::analyze_arbitrary_term): New function.
+ (loop_versioning::analyze_address_fragment): Use
+ analyze_arbitrary_term if all else fails.
+
+2019-01-18 Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR target/88892
+ * config/rs6000/rs6000.md (*movsi_from_df): Allow only register
+ operands.
+
+2019-01-18 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/88903
+ * tree-vect-stmts.c (vectorizable_shift): Verify we see all
+ scalar stmts a SLP shift amount is composed of when detecting
+ shifts by scalars.
+
+2019-01-18 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/88799
+ * config/arm/arm-cpus.in (mp): New feature.
+ (sec): New feature.
+ (fgroup ARMv7ve): Add mp and sec features.
+ (arch armv7-a): Add options to allow mp and sec extensions.
+ (cpu generic-armv7-a): Add options to allow mp and sec extensions.
+ (cpu cortex-a5, cpu cortex-7, cpu cortex-a9): Add mp and sec
+ extenstions to the base architecture.
+ (cpu cortex-a8): Add sec extension to the base architecture.
+ (cpu marvell-pj4): Add mp and sec extensions to the base architecture.
+ * config/arm/t-aprofile (MULTILIB_MATCHES): Map all armv7-a arch
+ variants down to the base v7-a varaint.
+ * config/arm/t-multilib (v7_a_arch_variants): New variable.
+ * doc/invoke.texi (ARM Options): Add +mp and +sec to the list
+ of permitted extensions for -march=armv7-a and for
+ -mcpu=generic-armv7-a.
+
+2019-01-18 Martin Liska <mliska@suse.cz>
+
+ * params.def: Fix comment.
+ * tree-profile.c (gimple_init_gcov_profiler): Bump function
+ name.
+ (gimple_gen_ic_func_profiler): Likewise.
+
+2019-01-18 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ * config/aarch64/aarch64-opts.h (enum stack_protector_guard): New
+ * config/aarch64/aarch64.c (aarch64_override_options_internal): Handle
+ and put in error checks for stack protector guard options.
+ (aarch64_stack_protect_guard): New.
+ (TARGET_STACK_PROTECT_GUARD): Define.
+ * config/aarch64/aarch64.md (UNSPEC_SSP_SYSREG): New.
+ (reg_stack_protect_address<mode>): New.
+ (stack_protect_set): Adjust for SSP_GLOBAL.
+ (stack_protect_test): Likewise.
+ * config/aarch64/aarch64.opt (-mstack-protector-guard-reg): New.
+ (-mstack-protector-guard): Likewise.
+ (-mstack-protector-guard-offset): Likewise.
+
+2019-01-18 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/86214
+ * tree-inline.h (struct copy_body_data): Add
+ add_clobbers_to_eh_landing_pads member.
+ * tree-inline.c (add_clobbers_to_eh_landing_pad): New function.
+ (copy_edges_for_bb): Call it if EH edge destination is <
+ id->add_clobbers_to_eh_landing_pads. Fix a comment typo.
+ (expand_call_inline): Set id->add_clobbers_to_eh_landing_pads
+ if flag_stack_reuse != SR_NONE and clear it afterwards.
+
+2019-01-18 Christophe Lyon <christophe.lyon@linaro.org>
+
+ PR target/85596
+ * doc/install.texi (with-multilib-list): Document for aarch64.
+
+2019-01-18 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/88734
+ * config/arm/arm_neon.h: Fix #pragma GCC target syntax - replace
+ (("..."))) with ("...").
+
+2019-01-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * doc/extend.texi (Built-in Functions for Memory Model Aware
+ Atomic Operations): Document atomic fetch and nand.
+
+2019-01-18 Martin Liska <mliska@suse.cz>
+ Richard Biener <rguenther@suse.de>
+
+ PR middle-end/88587
+ * cgraph.h (create_version_clone_with_body): Add new argument
+ with attributes.
+ * cgraphclones.c (cgraph_node::create_version_clone): Add
+ DECL_ATTRIBUTES to a newly created decl. And call
+ valid_attribute_p so that proper cl_target_optimization_node
+ is set for the newly created declaration.
+ * multiple_target.c (create_target_clone): Set DECL_ATTRIBUTES
+ for declaration.
+ (expand_target_clones): Do not call valid_attribute_p, it must
+ be already done.
+ * tree-inline.c (copy_decl_for_dup_finish): Reset mode for
+ vector types.
+
+2019-01-17 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/88734
+ * config/aarch64/arm_neon.h: Fix #pragma GCC target syntax - replace
+ (("..."))) with ("..."). Use arch=armv8.2-a+sha3 instead of
+ arch=armv8.2-a+crypto for vsha512hq_u64 etc. intrinsics.
+
+2019-01-17 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/88273
+ * gimple-ssa-warn-restrict.c (builtin_memref::extend_offset_range):
+ Handle anti-ranges the same as no range at all.
+
+2018-01-17 Steve Ellcey <sellcey@cavium.com>
+
+ * config/aarch64/aarch64.c (cgraph.h): New include.
+ (intl.h): New include.
+ (supported_simd_type): New function.
+ (currently_supported_simd_type): Ditto.
+ (aarch64_simd_clone_compute_vecsize_and_simdlen): Ditto.
+ (aarch64_simd_clone_adjust): Ditto.
+ (aarch64_simd_clone_usable): Ditto.
+ (TARGET_SIMD_CLONE_COMPUTE_VECSIZE_AND_SIMDLEN): New macro.
+ (TARGET_SIMD_CLONE_ADJUST): Ditto.
+ (TARGET_SIMD_CLONE_USABLE): Ditto.
+ * config/i386/i386.c (ix86_simd_clone_adjust): Add definition check.
+ * omp-simd-clone.c (expand_simd_clones): Add targetm.simd_clone.adjust
+ call.
+
+2019-01-17 Martin Sebor <msebor@redhat.com>
+
+ PR tree-optimization/88800
+ * gimple-fold.c (gimple_fold_builtin_memory_op): Avoid checking
+ NO_WARNING bit here. Avoid folding out-of-bounds calls.
+ * gimple-ssa-warn-restrict.c (maybe_diag_offset_bounds): Remove
+ redundant argument. Add new argument and issue diagnostics under
+ its control. Detect out-of-bounds access even with warnings
+ disabled.
+ (check_bounds_or_overlap): Change return type. Add argument.
+ (wrestrict_dom_walker::check_call): Adjust.
+ * gimple-ssa-warn-restrict.h (check_bounds_or_overlap): Add argument.
+ * tree-ssa-strlen.c (handle_builtin_strcpy): Adjust to change in
+ check_bounds_or_overlap's return value.
+ (handle_builtin_stxncpy): Same.
+ (handle_builtin_strcat): Same.
+
+2019-01-17 Andrew Stubbs <ams@codesourcery.com>
+ Kwok Cheung Yeung <kcy@codesourcery.com>
+ Julian Brown <julian@codesourcery.com>
+ Tom de Vries <tom@codesourcery.com>
+
+ * doc/sourcebuild.texi: Document dg-add-options sqrt_insn.
+
+2019-01-17 Andrew Stubbs <ams@codesourcery.com>
+
+ * doc/sourcebuild.texi: Document dg-require-effective-target
+ llvm_binutils and offload_gcn.
+
+2019-01-17 Andrew Stubbs <ams@codesourcery.com>
+ Kwok Cheung Yeung <kcy@codesourcery.com>
+ Julian Brown <julian@codesourcery.com>
+ Tom de Vries <tom@codesourcery.com>
+
+ * doc/sourcebuild.texi: Document dg-required-effective-target
+ exceptions.
+
+2019-01-17 Andrew Stubbs <ams@codesourcery.com>
+ Kwok Cheung Yeung <kcy@codesourcery.com>
+ Julian Brown <julian@codesourcery.com>
+ Tom de Vries <tom@codesourcery.com>
+ Jan Hubicka <hubicka@ucw.cz>
+ Martin Jambor <mjambor@suse.cz>
+
+ * config.gcc: Add amdgcn*-*-amdhsa configuration.
+ * configure.ac: Check for dlopen.
+ * configure: Regenerate.
+
+2019-01-17 Andrew Stubbs <ams@codesourcery.com>
+ Kwok Cheung Yeung <kcy@codesourcery.com>
+ Julian Brown <julian@codesourcery.com>
+ Tom de Vries <tom@codesourcery.com>
+ Jan Hubicka <hubicka@ucw.cz>
+ Martin Jambor <mjambor@suse.cz>
+
+ * common/config/gcn/gcn-common.c: New file.
+ * config/gcn/driver-gcn.c: New file.
+ * config/gcn/gcn-builtins.def: New file.
+ * config/gcn/gcn-hsa.h: New file.
+ * config/gcn/gcn-modes.def: New file.
+ * config/gcn/gcn-opts.h: New file.
+ * config/gcn/gcn-passes.def: New file.
+ * config/gcn/gcn-protos.h: New file.
+ * config/gcn/gcn-run.c: New file.
+ * config/gcn/gcn-tree.c: New file.
+ * config/gcn/gcn.c: New file.
+ * config/gcn/gcn.h: New file.
+ * config/gcn/gcn.opt: New file.
+ * config/gcn/t-gcn-hsa: New file.
+
+2019-01-17 Andrew Stubbs <ams@codesourcery.com>
+ Kwok Cheung Yeung <kcy@codesourcery.com>
+ Julian Brown <julian@codesourcery.com>
+ Tom de Vries <tom@codesourcery.com>
+ Jan Hubicka <hubicka@ucw.cz>
+ Martin Jambor <mjambor@suse.cz>
+
+ * config/gcn/constraints.md: New file.
+ * config/gcn/gcn-valu.md: New file.
+ * config/gcn/gcn.md: New file.
+ * config/gcn/predicates.md: New file.
+
+2019-01-17 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gimple-ssa-isolate-paths.c (stmt_uses_name_in_undefined_way): Replace
+ flag_non_call_exceptions with cfun->can_throw_non_call_exceptions.
+ (stmt_uses_0_or_null_in_undefined_way): Likewise.
+ * tree-ssa-alias.c (same_addr_size_stores_p): Likewise.
+
+2019-01-17 Tamar Christina <tamar.christina@arm.com>
+
+ PR target/88851
+ * config/aarch64/aarch64.md (STACK_CLASH_SVE_CFA_REGNUM): New.
+ * config/aarch64/aarch64.c (aarch64_allocate_and_probe_stack_space): Use
+ it and document registers.
+
+2019-01-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64.c (ares_tunings): Define.
+ * config/aarch64/aarch64-cores.def (ares): Use the above.
+
+2019-01-17 Wei Xiao <wei3.xiao@intel.com>
+
+ PR target/88794
+ Revert:
+ 2018-11-06 Wei Xiao <wei3.xiao@intel.com>
+
+ * config/i386/avx512fintrin.h: Update VFIXUPIMM* intrinsics.
+ (_mm512_fixupimm_round_pd): Update parameters and builtin.
+ (_mm512_maskz_fixupimm_round_pd): Ditto.
+ (_mm512_fixupimm_round_ps): Ditto.
+ (_mm512_maskz_fixupimm_round_ps): Ditto.
+ (_mm_fixupimm_round_sd): Ditto.
+ (_mm_maskz_fixupimm_round_sd): Ditto.
+ (_mm_fixupimm_round_ss): Ditto.
+ (_mm_maskz_fixupimm_round_ss): Ditto.
+ (_mm512_fixupimm_pd): Ditto.
+ (_mm512_maskz_fixupimm_pd): Ditto.
+ (_mm512_fixupimm_ps): Ditto.
+ (_mm512_maskz_fixupimm_ps): Ditto.
+ (_mm_fixupimm_sd): Ditto.
+ (_mm_maskz_fixupimm_sd): Ditto.
+ (_mm_fixupimm_ss): Ditto.
+ (_mm_maskz_fixupimm_ss): Ditto.
+ (_mm512_mask_fixupimm_round_pd): Update builtin.
+ (_mm512_mask_fixupimm_round_ps): Ditto.
+ (_mm_mask_fixupimm_round_sd): Ditto.
+ (_mm_mask_fixupimm_round_ss): Ditto.
+ (_mm512_mask_fixupimm_pd): Ditto.
+ (_mm512_mask_fixupimm_ps): Ditto.
+ (_mm_mask_fixupimm_sd): Ditto.
+ (_mm_mask_fixupimm_ss): Ditto.
+ * config/i386/avx512vlintrin.h:
+ (_mm256_fixupimm_pd): Update parameters and builtin.
+ (_mm256_maskz_fixupimm_pd): Ditto.
+ (_mm256_fixupimm_ps): Ditto.
+ (_mm256_maskz_fixupimm_ps): Ditto.
+ (_mm_fixupimm_pd): Ditto.
+ (_mm_maskz_fixupimm_pd): Ditto.
+ (_mm_fixupimm_ps): Ditto.
+ (_mm_maskz_fixupimm_ps): Ditto.
+ (_mm256_mask_fixupimm_pd): Update builtin.
+ (_mm256_mask_fixupimm_ps): Ditto.
+ (_mm_mask_fixupimm_pd): Ditto.
+ (_mm_mask_fixupimm_ps): Ditto.
+ * config/i386/i386-builtin-types.def: Add new types and remove useless ones.
+ * config/i386/i386-builtin.def: Update builtin definitions.
+ * config/i386/i386.c: Handle new builtin types and remove useless ones.
+ * config/i386/sse.md: Update VFIXUPIMM* patterns.
+ (<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
+ (<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
+ (<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Update.
+ (avx512f_sfixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
+ (avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
+ (avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Update.
+ * config/i386/subst.md:
+ (round_saeonly_sd_mask_operand4): Add new subst_attr.
+ (round_saeonly_sd_mask_op4): Ditto.
+ (round_saeonly_expand_operand5): Ditto.
+ (round_saeonly_expand): Update.
+
+2019-01-17 Wei Xiao <wei3.xiao@intel.com>
+
+ PR target/88794
+ Revert:
+ 2018-11-12 Wei Xiao <wei3.xiao@intel.com>
+
+ * config/i386/sse.md: Combine VFIXUPIMM* patterns
+ (<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
+ (<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
+ (<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Remove.
+ (avx512f_sfixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
+ (avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
+ (avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Remove.
+
+2019-01-17 Wei Xiao <wei3.xiao@intel.com>
+
+ PR target/88794
+ Revert:
+ 2018-12-15 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/88489
+ * config/i386/sse.md (UNSPEC_SFIXUPIMM): New unspec enumerator.
+ (avx512f_sfixupimm<mode><mask_name><round_saeonly_name>): Use it
+ instead of UNSPEC_FIXUPIMM.
+
+2019-01-17 Richard Biener <rguenther@suse.de>
+
+ PR lto/86736
+ * dwarf2out.c (want_pubnames): Never generate pubnames sections
+ and friends for the LTO part of debug info.
+
+2019-01-17 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/86214
+ * cfgexpand.c (add_stack_var_conflict): Don't add any conflicts
+ if x == y.
+
+ PR rtl-optimization/88870
+ * dce.c (deletable_insn_p): Never delete const/pure calls that can
+ throw if we can't alter the cfg or delete dead exceptions.
+ (mark_insn): Don't call find_call_stack_args for such calls.
+
+2019-01-17 Kewen Lin <linkw@gcc.gnu.org>
+
+ * doc/extend.texi: Add four new prototypes for vec_ld and seven new
+ prototypes for vec_st.
+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add entries
+ for scalar address type variants of altivec_vec_ld/altivec_vec_st,
+ mainly on signed/unsigned long long and double.
+
+2019-01-16 David Malcolm <dmalcolm@redhat.com>
+
+ PR target/88861
+ * combine.c (delete_noop_moves): Convert to "bool" return,
+ returning true if any edges are eliminated.
+ (combine_instructions): Also return true if delete_noop_moves
+ returns true.
+
+2019-01-16 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
+ correct max nunits for endian swap.
+ (aarch64_expand_fcmla_builtin): Correct subreg code.
+ * config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>,
+ aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>): Correct
+ lane endianness.
+
+2019-01-16 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/alpha/alpha.c (alpha_gimplify_va_arg):
+ Handle split indirect COMPLEX_TYPE arguments.
+
+2019-01-16 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/86891
+ * config/aarch64/aarch64-modes.def: Add comment about how the carry
+ bit is set by add and compare.
+ (CC_ADC): New CC_MODE.
+ * config/aarch64/aarch64.c (aarch64_select_cc_mode): Use variables
+ to cache the code and mode of X. Adjust the shape of a CC_Cmode
+ comparison. Add detection for CC_ADCmode.
+ (aarch64_get_condition_code_1): Update code support for CC_Cmode. Add
+ CC_ADCmode.
+ * config/aarch64/aarch64.md (uaddv<mode>4): Use LTU with CCmode.
+ (uaddvti4): Comparison result is in CC_ADCmode and the condition is GEU.
+ (add<mode>3_compareC_cconly_imm): Delete. Merge into...
+ (add<mode>3_compareC_cconly): ... this. Restructure the comparison
+ to eliminate the need for zero-extending the operands.
+ (add<mode>3_compareC_imm): Delete. Merge into ...
+ (add<mode>3_compareC): ... this. Restructure the comparison to
+ eliminate the need for zero-extending the operands.
+ (add<mode>3_carryin): Use LTU for the overflow detection.
+ (add<mode>3_carryinC): Use CC_ADCmode for the result of the carry out.
+ Reexpress comparison for overflow.
+ (add<mode>3_carryinC_zero): Update for change to add<mode>3_carryinC.
+ (add<mode>3_carryinC): Likewise.
+ (add<mode>3_carryinV): Use LTU for carry between partials.
+ * config/aarch64/predicates.md (aarch64_carry_operation): Update
+ handling of CC_Cmode and add CC_ADCmode.
+ (aarch64_borrow_operation): Likewise.
+
+2019-01-16 Tamar Christina <tamar.christina@arm.com>
+
+ * config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): Remove patternmode.
+ * config/arm/arm.c (neon_vcmla_lane_prepare_operands): Likewise.
+ * config/arm/neon.md (neon_vcmla_lane<rot><mode>, neon_vcmla_laneq<rot><mode>,
+ neon_vcmlaq_lane<rot><mode>): Remove endianness conversion.
+
+2019-01-16 Martin Liska <mliska@suse.cz>
+
+ * Makefile.in: Set TOOL_INCLUDE_DIR and NATIVE_SYSTEM_HEADER_DIR
+ for GCC driver.
+ * config/gnu-user.h (TARGET_F951_OPTIONS): Add 'finclude%s/' as
+ a new argument.
+ * gcc.c (add_sysrooted_hdrs_prefix): New function.
+ (path_prefix_reset): Move up in the source file.
+ (find_fortran_preinclude_file): Make complex search for the
+ fortran header files.
+
+2019-01-15 Nikhil Benesch <nikhil.benesch@gmail.com>
+
+ * godump.c (go_output_typedef): When outputting a typedef, refer
+ to the underlying type by its name and not its structure.
+
+2019-01-15 David Malcolm <dmalcolm@redhat.com>
+
+ PR c++/88795
+ * tree.c (build_function_type): Assert that arg_types is not
+ error_mark_node.
+
+2019-01-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR inline-asm/52813
+ * doc/extend.texi: Document that listing the stack pointer in the
+ clobber list of an asm is a deprecated feature.
+ * common.opt (Wdeprecated): Moved from c-family/c.opt.
+ * cfgexpand.c (asm_clobber_reg_is_valid): Issue a -Wdeprecated
+ warning instead of an error for clobbers of the stack pointer.
+ Add a note explaining why.
+
+2019-01-15 Richard Biener <rguenther@suse.de>
+
+ PR debug/88046
+ * dwarf2out.c (gen_member_die): Do not generate inheritance
+ DIEs late.
+
+2019-01-15 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/88855
+ * tree-if-conv.c (combine_blocks): Collect
+ SSA_NAME_OCCURS_IN_ABNORMAL_PHI from propagated out virtuals.
+
+2019-01-15 Tom de Vries <tdevries@suse.de>
+
+ PR target/80547
+ * config/nvptx/nvptx.c (nvptx_goacc_reduction_init): Handle
+ lhs == NULL_TREE for gang-level reduction.
+
+2019-01-15 Richard Biener <rguenther@suse.de>
+ Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+
+ PR ipa/88788
+ * ipa-pure-const.c (malloc_candidate_p_1): Add parameter visited and
+ return true if SSA_NAME is already marked in visited bitmap.
+ (malloc_candidate_p): Pass visited to malloc_candidate_p_1.
+
2019-01-15 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/88775
projects / platform / upstream / gcc.git / blobdiff