[SH] Fix clrs, sets, pref insn arch memberships.

[external/binutils.git] / gas / testsuite / gas / sh / arch / sh2a.s

diff --git a/gas/testsuite/gas/sh/arch/sh2a.s b/gas/testsuite/gas/sh/arch/sh2a.s
index 04e10f0..370dbd4 100644 (file)
--- a/gas/testsuite/gas/sh/arch/sh2a.s
+++ b/gas/testsuite/gas/sh/arch/sh2a.s
@@ -1,12 +1,11 @@
 ! Generated file. DO NOT EDIT.
 !
-! This file was generated by gas/testsuite/gas/sh/arch/arch.exp .
+! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
 ! This file should contain every instruction valid on
 ! architecture sh2a but no more.
-! If the tests are failing because the expected results
-! have changed then run 'make check' and copy the new file
-! from <objdir>/gas/testsuite/sh2a.s
-! to   <srcdir>/gas/testsuite/gas/sh/arch/sh2a.s .
+! If the tests are failing because the expected results have changed then run
+!    'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl'
+! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files.
 ! Make sure there are no unexpected or missing instructions.
 
        .section .text
@@ -34,7 +33,6 @@ sh2a:
        bf.s .+8                  ;!/* 10001111i8p1.... bf.s <bdisp8>       */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up}
        bf/s .+8                  ;!/* 10001111i8p1.... bf/s <bdisp8>       */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up}
        clrmac                    ;!/* 0000000000101000 clrmac              */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up}
-       clrs                      ;!/* 0000000001001000 clrs                */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up}
        clrt                      ;!/* 0000000000001000 clrt                */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up}
        cmp/eq #4,R0              ;!/* 10001000i8*1.... cmp/eq #<imm>,R0    */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up}
        cmp/eq r5,r4              ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up}
@@ -134,14 +132,13 @@ sh2a:
        or #4,R0                  ;!/* 11001011i8*1.... or #<imm>,R0        */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up}
        or r5,r4                  ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N>  */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up}
        or.b #4,@(R0,GBR)         ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up}
-       pref @r4                  ;!/* 0000nnnn10000011 pref @<REG_N>       */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up}
+       pref @r4                  ;!/* 0000nnnn10000011 pref @<REG_N>       */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up}
        rotcl r4                  ;!/* 0100nnnn00100100 rotcl <REG_N>       */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up}
        rotcr r4                  ;!/* 0100nnnn00100101 rotcr <REG_N>       */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up}
        rotl r4                   ;!/* 0100nnnn00000100 rotl <REG_N>        */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up}
        rotr r4                   ;!/* 0100nnnn00000101 rotr <REG_N>        */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up}
        rte                       ;!/* 0000000000101011 rte                 */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
        rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
-       sets                      ;!/* 0000000001011000 sets                */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up}
        sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
        shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
        shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}