* elf64-ppc.c (dec_dynrel_count): Don't error when elf_gc_sweep_symbol

[external/binutils.git] / gas / testsuite / gas / mips / set-arch.s

diff --git a/gas/testsuite/gas/mips/set-arch.s b/gas/testsuite/gas/mips/set-arch.s
index 01a6c83..7f1f0c2 100644 (file)
--- a/gas/testsuite/gas/mips/set-arch.s
+++ b/gas/testsuite/gas/mips/set-arch.s
@@ -200,11 +200,17 @@ text_label:
        wait    0                       # disassembles without code
        wait    0x56789
 
-       # Instructions in previous ISAs or CPUs which are now slightly
-       # different.
+       # For a while break for the mips32 ISA interpreted a single argument
+       # as a 20-bit code, placing it in the opcode differently to
+       # traditional ISAs.  This turned out to cause problems, so it has
+       # been removed.  This test is to assure consistent interpretation.
        break
        break   0                       # disassembles without code
-       break   0x12345
+       break   0x345
+       break   0x48,0x345              # this still specifies a 20-bit code
+
+       # Instructions in previous ISAs or CPUs which are now slightly
+       # different.
        sdbbp
        sdbbp   0                       # disassembles without code
        sdbbp   0x56789