This patch fixes a bug in the AArch64 assembler where an incorrect structural load...

[external/binutils.git] / gas / testsuite / gas / aarch64 / diagnostic.l

diff --git a/gas/testsuite/gas/aarch64/diagnostic.l b/gas/testsuite/gas/aarch64/diagnostic.l
index cca8881..b5f304a 100644 (file)
--- a/gas/testsuite/gas/aarch64/diagnostic.l
+++ b/gas/testsuite/gas/aarch64/diagnostic.l
@@ -14,7 +14,7 @@
 [^:]*:16: Error: immediate value out of range 0 to 31 at operand 2 -- `ccmp x0,-1,10,le'
 [^:]*:17: Error: extraneous register at operand 2 -- `tlbi alle3is,x0'
 [^:]*:18: Error: missing register at operand 2 -- `tlbi vaale1is'
-[^:]*:19: Error: unexpected characters following instruction at operand 1 -- `tlbi vaale1is x0'
+[^:]*:19: Error: comma expected between operands at operand 2 -- `tlbi vaale1is x0'
 [^:]*:20: Error: immediate value out of range 0 to 1 at operand 1 -- `msr spsel,3'
 [^:]*:21: Error: immediate value out of range 1 to 64 at operand 3 -- `fcvtzu x15,d31,#66'
 [^:]*:22: Error: immediate value out of range 1 to 32 at operand 3 -- `scvtf s0,w0,33'
@@ -28,10 +28,10 @@
 [^:]*:30: Error: invalid post-increment amount at operand 2 -- `st2 \{v0.4s,v1.4s\},\[sp\],#24'
 [^:]*:31: Error: invalid shift amount at operand 2 -- `ldr q0,\[x0,w0,uxtw#5\]'
 [^:]*:32: Error: invalid number of registers in the list; 2 registers are expected at operand 1 -- `st2 \{v0.4s,v1.4s,v2.4s,v3.4s\},\[sp\],#64'
-[^:]*:33: Error: shift amount expected to be 0 or 12 at operand 3 -- `adds x1,sp,2134,lsl#4'
-[^:]*:34: Error: shift amount should be a multiple of 16 at operand 2 -- `movz w0,2134,lsl#8'
+[^:]*:33: Error: shift amount must be 0 or 12 at operand 3 -- `adds x1,sp,2134,lsl#4'
+[^:]*:34: Error: shift amount must be a multiple of 16 at operand 2 -- `movz w0,2134,lsl#8'
 [^:]*:35: Error: shift amount out of range 0 to 16 at operand 2 -- `movz w0,2134,lsl#32'
-[^:]*:36: Error: shift amount should be a multiple of 16 at operand 2 -- `movz x0,2134,lsl#47'
+[^:]*:36: Error: shift amount must be a multiple of 16 at operand 2 -- `movz x0,2134,lsl#47'
 [^:]*:37: Error: immediate value out of range 1 to 17 at operand 4 -- `sbfiz w0,w7,15,18'
 [^:]*:38: Error: immediate value out of range 1 to 32 at operand 4 -- `sbfiz w0,w7,15,0'
 [^:]*:39: Error: invalid shift amount at operand 3 -- `shll v1.4s,v2.4h,#15'
@@ -42,48 +42,144 @@
 [^:]*:44: Error: immediate value out of range -128 to 255 at operand 2 -- `movi v1.4h,-129'
 [^:]*:45: Error: invalid shift operator at operand 2 -- `movi v1.4h,255,msl#8'
 [^:]*:46: Error: invalid value for immediate at operand 2 -- `movi d0,256'
-[^:]*:47: Error: immediate value should be a multiple of 8 at operand 2 -- `movi v1.4h,255,lsl#7'
+[^:]*:47: Error: immediate value must be a multiple of 8 at operand 2 -- `movi v1.4h,255,lsl#7'
 [^:]*:48: Error: shift amount out of range 0 to 8 at operand 2 -- `movi v1.4h,255,lsl#16'
-[^:]*:49: Error: shift amount expected to be 0 or 16 at operand 2 -- `movi v2.2s,255,msl#0'
-[^:]*:50: Error: shift amount expected to be 0 or 16 at operand 2 -- `movi v2.2s,255,msl#15'
+[^:]*:49: Error: shift amount must be 0 or 16 at operand 2 -- `movi v2.2s,255,msl#0'
+[^:]*:50: Error: shift amount must be 0 or 16 at operand 2 -- `movi v2.2s,255,msl#15'
 [^:]*:51: Error: invalid floating-point constant at operand 2 -- `fmov v1.2s,1.01'
 [^:]*:52: Error: invalid floating-point constant at operand 2 -- `fmov v1.2d,1.01'
 [^:]*:53: Error: invalid floating-point constant at operand 2 -- `fmov s3,1.01'
 [^:]*:54: Error: invalid floating-point constant at operand 2 -- `fmov d3,1.01'
 [^:]*:55: Error: immediate zero expected at operand 2 -- `fcmp d0,#1.0'
-[^:]*:56: Error: operand 2 should be a floating-point register -- `fcmp d0,x0'
+[^:]*:56: Error: operand 2 must be a floating-point register -- `fcmp d0,x0'
 [^:]*:57: Error: immediate zero expected at operand 3 -- `cmgt v0.4s,v2.4s,#1'
 [^:]*:58: Error: unexpected characters following instruction at operand 2 -- `fmov d3,1.00,lsl#3'
-[^:]*:59: Error: writeback value should be an immediate constant at operand 2 -- `st2 {v0.4s,v1.4s},\[sp\],sp'
-[^:]*:60: Error: writeback value should be an immediate constant at operand 2 -- `st2 {v0.4s,v1.4s},\[sp\],zr'
+[^:]*:59: Error: integer 64-bit register expected at operand 2 -- `st2 {v0.4s,v1.4s},\[sp\],sp'
+[^:]*:60: Error: writeback value must be an immediate constant at operand 2 -- `st2 {v0.4s,v1.4s},\[sp\],zr'
 [^:]*:61: Error: invalid shift for the register offset addressing mode at operand 2 -- `ldr q0,\[x0,w0,lsr#4\]'
 [^:]*:62: Error: only 'LSL' shift is permitted at operand 3 -- `adds x1,sp,2134,uxtw#12'
 [^:]*:63: Error: shift amount out of range 0 to 63 at operand 2 -- `movz x0,2134,lsl#64'
-[^:]*:64: Error: operand 1 should be an integer register -- `adds sp,sp,2134,lsl#12'
+[^:]*:64: Error: operand 1 must be an integer register -- `adds sp,sp,2134,lsl#12'
 [^:]*:65: Error: the optional immediate offset can only be 0 at operand 2 -- `ldxrb w2,\[x0,#1\]'
 [^:]*:66: Error: invalid addressing mode at operand 2 -- `ldrb w0,x1,x2,sxtx'
 [^:]*:67: Error: invalid shift amount at operand 2 -- `prfm PLDL3KEEP,\[x9,x15,sxtx#2\]'
 [^:]*:68: Error: C0 - C15 expected at operand 3 -- `sysl x7,#1,C16,C30,#1'
-[^:]*:69: Error: operand 4 should be a 4-bit opcode field named for historical reasons C0 - C15 -- `sysl x7,#1,C15,C77,#1'
-[^:]*:70: Error: extending shift is not permitted at operand 3 -- `add x0,xzr,x7,uxtx#5'
-[^:]*:71: Error: bad expression at operand 2 -- `mov x0,##5'
-[^:]*:72: Error: unknown mnemonic `bad' -- `bad expression'
-[^:]*:73: Error: unknown mnemonic `mockup' -- `mockup-op'
-[^:]*:74: Error: comma expected between operands at operand 2 -- `orr x0. x0,#0xff,lsl#1'
-[^:]*:75: Error: the specified relocation type is not allowed for MOVK at operand 2 -- `movk x1,#:abs_g1_s:s12'
-[^:]*:76: Error: can't mix relocation modifier with explicit shift at operand 2 -- `movz x1,#:abs_g1_s:s12,lsl#16'
-[^:]*:77: Error: register offset not allowed in pre-indexed addressing mode at operand 2 -- `prfm pldl3strm,\[sp,w0,sxtw#3\]!'
-[^:]*:78: Error: immediate value out of range 0 to 31 at operand 1 -- `prfm 0x2f,LABEL1'
-[^:]*:79: Error: immediate value out of range 0 to 15 at operand 1 -- `dmb #16'
-[^:]*:80: Error: immediate value out of range 0 to 31 at operand 2 -- `tbz w0,#40,0x17c'
-[^:]*:81: Error: invalid number of registers in the list; 2 registers are expected at operand 1 -- `st2 \{v4.2d,v5.2d,v6.2d\},\[x3\]'
-[^:]*:82: Error: invalid register list at operand 1 -- `ld2 \{v1.4h,v0.4h\},\[x1\]'
-[^:]*:83: Error: the specified option is not accepted in ISB at operand 1 -- `isb osh'
-[^:]*:84: Error: invalid address at operand 2 -- `st2 \{v4.2d,v5.2d,v6.2d\},\\\[x3\\\]'
-[^:]*:85: Error: immediate value should be a multiple of 4 at operand 3 -- `ldnp w7,w15,\[x3,#3\]'
-[^:]*:86: Error: unexpected address writeback at operand 3 -- `stnp x7,x15,\[x3,#32\]!'
-[^:]*:87: Error: immediate offset out of range -256 to 252 at operand 3 -- `ldnp w7,w15,\[x3,#256\]'
-[^:]*:88: Error: shift is not permitted at operand 2 -- `movi v1.2d,4294967295,lsl#0'
-[^:]*:89: Error: shift amount expected to be 0 at operand 2 -- `movi v1.8b,97,lsl#8'
-[^:]*:90: Error: unknown or missing system register name at operand 1 -- `msr dummy,x1'
-[^:]*:91: Error: invalid floating-point constant at operand 2 -- `fmov s0,0x42000000'
+[^:]*:69: Error: C0 - C15 expected at operand 4 -- `sysl x7,#1,C15,C77,#1'
+[^:]*:70: Error: operand 3 must be a 4-bit opcode field named for historical reasons C0 - C15 -- `sysl x7,#1,x15,C1,#1'
+[^:]*:71: Error: extending shift is not permitted at operand 3 -- `add x0,xzr,x7,uxtx#5'
+[^:]*:72: Error: bad expression at operand 2 -- `mov x0,##5'
+[^:]*:73: Error: unknown mnemonic `bad' -- `bad expression'
+[^:]*:74: Error: unknown mnemonic `mockup' -- `mockup-op'
+[^:]*:75: Error: comma expected between operands at operand 2 -- `orr x0. x0,#0xff,lsl#1'
+[^:]*:76: Error: the specified relocation type is not allowed for MOVK at operand 2 -- `movk x1,#:abs_g1_s:s12'
+[^:]*:77: Error: can't mix relocation modifier with explicit shift at operand 2 -- `movz x1,#:abs_g1_s:s12,lsl#16'
+[^:]*:78: Error: register offset not allowed in pre-indexed addressing mode at operand 2 -- `prfm pldl3strm,\[sp,w0,sxtw#3\]!'
+[^:]*:79: Error: immediate value out of range 0 to 31 at operand 1 -- `prfm 0x2f,LABEL1'
+[^:]*:80: Error: immediate value out of range 0 to 15 at operand 1 -- `dmb #16'
+[^:]*:81: Error: immediate value out of range 0 to 31 at operand 2 -- `tbz w0,#40,0x17c'
+[^:]*:82: Error: invalid number of registers in the list; 2 registers are expected at operand 1 -- `st2 \{v4.2d,v5.2d,v6.2d\},\[x3\]'
+[^:]*:83: Error: invalid register list at operand 1 -- `ld2 \{v1.4h,v0.4h\},\[x1\]'
+[^:]*:84: Error: the specified option is not accepted in ISB at operand 1 -- `isb osh'
+[^:]*:85: Error: invalid address at operand 2 -- `st2 \{v4.2d,v5.2d,v6.2d\},\\\[x3\\\]'
+[^:]*:86: Error: immediate value must be a multiple of 4 at operand 3 -- `ldnp w7,w15,\[x3,#3\]'
+[^:]*:87: Error: unexpected address writeback at operand 3 -- `stnp x7,x15,\[x3,#32\]!'
+[^:]*:88: Error: immediate offset out of range -256 to 252 at operand 3 -- `ldnp w7,w15,\[x3,#256\]'
+[^:]*:89: Error: shift is not permitted at operand 2 -- `movi v1.2d,4294967295,lsl#0'
+[^:]*:90: Error: shift amount must be 0 at operand 2 -- `movi v1.8b,97,lsl#8'
+[^:]*:91: Error: unknown or missing system register name at operand 1 -- `msr dummy,x1'
+[^:]*:92: Error: invalid floating-point constant at operand 2 -- `fmov s0,0x42000000'
+[^:]*:93: Error: immediate value must be a multiple of 8 at operand 3 -- `ldp x0,x1,\[x2,#4\]'
+[^:]*:94: Error: immediate value must be a multiple of 8 at operand 3 -- `ldp x0,x1,\[x2,#4\]!'
+[^:]*:95: Error: immediate value must be a multiple of 8 at operand 3 -- `ldp x0,x1,\[x2\],#4'
+[^:]*:96: Error: immediate value must be a multiple of 4 at operand 3 -- `stp w0,w1,\[x2,#3\]'
+[^:]*:97: Error: immediate value must be a multiple of 4 at operand 3 -- `stp w0,w1,\[x2,#2\]!'
+[^:]*:98: Error: immediate value must be a multiple of 4 at operand 3 -- `stp w0,w1,\[x2\],#1'
+[^:]*:99: Error: operand 3 must be one of the standard conditions, excluding AL and NV. -- `cinc w0,w1,al'
+[^:]*:100: Error: operand 3 must be one of the standard conditions, excluding AL and NV. -- `cinc w0,w1,nv'
+[^:]*:101: Error: operand 2 must be one of the standard conditions, excluding AL and NV. -- `cset w0,al'
+[^:]*:102: Error: operand 2 must be one of the standard conditions, excluding AL and NV. -- `cset w0,nv'
+[^:]*:106: Error: operand 1 must be an integer register -- `ret kk'
+[^:]*:107: Error: immediate operand required at operand 1 -- `clrex x0'
+[^:]*:108: Error: immediate operand required at operand 1 -- `clrex w0'
+[^:]*:109: Error: constant expression required at operand 1 -- `clrex kk'
+[^:]*:110: Error: operand 5 must be an integer register -- `sys #0,c0,c0,#0,kk'
+[^:]*:111: Error: unexpected comma before the omitted optional operand at operand 5 -- `sys #0,c0,c0,#0,'
+[^:]*:113: Error: selected processor does not support `casp w0,w1,w2,w3,\[x4\]'
+[^:]*:116: Warning: unpredictable load of register pair -- `ldp x0,x0,\[sp\]'
+[^:]*:117: Warning: unpredictable load of register pair -- `ldp d0,d0,\[sp\]'
+[^:]*:118: Warning: unpredictable load of register pair -- `ldp x0,x0,\[sp\],#16'
+[^:]*:119: Warning: unpredictable load of register pair -- `ldnp x0,x0,\[sp\]'
+[^:]*:122: Warning: unpredictable transfer with writeback -- `ldr x0,\[x0,#8\]!'
+[^:]*:123: Warning: unpredictable transfer with writeback -- `str x0,\[x0,#8\]!'
+[^:]*:124: Warning: unpredictable transfer with writeback -- `str x1,\[x1\],#8'
+[^:]*:125: Warning: unpredictable transfer with writeback -- `stp x0,x1,\[x0,#16\]!'
+[^:]*:126: Warning: unpredictable transfer with writeback -- `ldp x0,x1,\[x1\],#16'
+[^:]*:127: Error: this relocation modifier is not allowed on this instruction at operand 2 -- `adr x2,:got:s1'
+[^:]*:128: Error: this relocation modifier is not allowed on this instruction at operand 2 -- `ldr x0,\[x0,:got:s1\]'
+[^:]*:131: Error: 64-bit integer or SP register expected at operand 2 -- `ldr x1,\[wsp,#8\]!'
+[^:]*:132: Error: 64-bit integer or SP register expected at operand 3 -- `ldp x6,x29,\[w7,#8\]!'
+[^:]*:133: Error: 64-bit integer or SP register expected at operand 2 -- `str x30,\[w11,#8\]!'
+[^:]*:134: Error: 64-bit integer or SP register expected at operand 3 -- `stp x8,x27,\[wsp,#8\]!'
+[^:]*:214: Error: register element index out of range 0 to 1 at operand 2 -- `dup v0\.2d,v1\.2d\[-1\]'
+[^:]*:217: Error: register element index out of range 0 to 1 at operand 2 -- `dup v0\.2d,v1\.2d\[2\]'
+[^:]*:218: Error: register element index out of range 0 to 1 at operand 2 -- `dup v0\.2d,v1\.2d\[64\]'
+[^:]*:220: Error: register element index out of range 0 to 3 at operand 2 -- `dup v0\.4s,v1\.4s\[-1\]'
+[^:]*:223: Error: register element index out of range 0 to 3 at operand 2 -- `dup v0\.4s,v1\.4s\[4\]'
+[^:]*:224: Error: register element index out of range 0 to 3 at operand 2 -- `dup v0\.4s,v1\.4s\[65\]'
+[^:]*:226: Error: register element index out of range 0 to 7 at operand 2 -- `dup v0\.8h,v1\.8h\[-1\]'
+[^:]*:229: Error: register element index out of range 0 to 7 at operand 2 -- `dup v0\.8h,v1\.8h\[8\]'
+[^:]*:230: Error: register element index out of range 0 to 7 at operand 2 -- `dup v0\.8h,v1\.8h\[66\]'
+[^:]*:232: Error: register element index out of range 0 to 15 at operand 2 -- `dup v0\.16b,v1\.16b\[-1\]'
+[^:]*:235: Error: register element index out of range 0 to 15 at operand 2 -- `dup v0\.16b,v1\.16b\[16\]'
+[^:]*:236: Error: register element index out of range 0 to 15 at operand 2 -- `dup v0\.16b,v1\.16b\[67\]'
+[^:]*:238: Error: register element index out of range 0 to 1 at operand 1 -- `ld2 {v0\.d,v1\.d}\[-1\],\[x0\]'
+[^:]*:241: Error: register element index out of range 0 to 1 at operand 1 -- `ld2 {v0\.d,v1\.d}\[2\],\[x0\]'
+[^:]*:242: Error: register element index out of range 0 to 1 at operand 1 -- `ld2 {v0\.d,v1\.d}\[64\],\[x0\]'
+[^:]*:244: Error: register element index out of range 0 to 3 at operand 1 -- `ld2 {v0\.s,v1\.s}\[-1\],\[x0\]'
+[^:]*:247: Error: register element index out of range 0 to 3 at operand 1 -- `ld2 {v0\.s,v1\.s}\[4\],\[x0\]'
+[^:]*:248: Error: register element index out of range 0 to 3 at operand 1 -- `ld2 {v0\.s,v1\.s}\[65\],\[x0\]'
+[^:]*:250: Error: register element index out of range 0 to 7 at operand 1 -- `ld2 {v0\.h,v1\.h}\[-1\],\[x0\]'
+[^:]*:253: Error: register element index out of range 0 to 7 at operand 1 -- `ld2 {v0\.h,v1\.h}\[8\],\[x0\]'
+[^:]*:254: Error: register element index out of range 0 to 7 at operand 1 -- `ld2 {v0\.h,v1\.h}\[66\],\[x0\]'
+[^:]*:256: Error: register element index out of range 0 to 15 at operand 1 -- `ld2 {v0\.b,v1\.b}\[-1\],\[x0\]'
+[^:]*:259: Error: register element index out of range 0 to 15 at operand 1 -- `ld2 {v0\.b,v1\.b}\[16\],\[x0\]'
+[^:]*:260: Error: register element index out of range 0 to 15 at operand 1 -- `ld2 {v0\.b,v1\.b}\[67\],\[x0\]'
+[^:]*:267: Error: integer 64-bit register expected at operand 2 -- `st2 {v0.4s,v1.4s},\[sp\],xzr'
+[^:]*:268: Error: integer or zero register expected at operand 2 -- `str x1,\[x2,sp\]'
+[^:]*:271: Error: relocation not allowed at operand 3 -- `ldnp x1,x2,\[x3,#:lo12:foo\]'
+[^:]*:272: Error: invalid addressing mode at operand 2 -- `ld1 {v0\.4s},\[x3,#:lo12:foo\]'
+[^:]*:273: Error: the optional immediate offset can only be 0 at operand 2 -- `stuminl x0,\[x3,#:lo12:foo\]'
+[^:]*:274: Error: relocation not allowed at operand 2 -- `prfum pldl1keep,\[x3,#:lo12:foo\]'
+[^:]*:276: Error: invalid addressing mode at operand 2 -- `ldr x0,\[x3\],x4'
+[^:]*:277: Error: invalid addressing mode at operand 3 -- `ldnp x1,x2,\[x3\],x4'
+[^:]*:279: Error: invalid addressing mode at operand 2 -- `stuminl x0,\[x3\],x4'
+[^:]*:280: Error: invalid addressing mode at operand 2 -- `prfum pldl1keep,\[x3\],x4'
+[^:]*:282: Error: '\]' expected at operand 2 -- `ldr x0,\[x1,#1,mul vl\]'
+[^:]*:283: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul vl\]'
+[^:]*:284: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul#1\]'
+[^:]*:285: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul#4\]'
+[^:]*:287: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,x0,mul\]'
+[^:]*:288: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,x0,mul#1\]'
+[^:]*:289: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,w0,mul\]'
+[^:]*:290: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,w0,mul#2\]'
+[^:]*:292: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,1,mul#1'
+[^:]*:293: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,2,mul#255'
+[^:]*:294: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,3,mul#256'
+[^:]*:295: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xff,mul#1'
+[^:]*:296: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xfe,mul#255'
+[^:]*:297: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xfc,mul#256'
+[^:]*:299: Warning: ignoring redefinition of register alias 'ip0'
+[^:]*:300: Warning: ignoring redefinition of register alias 'ip1'
+[^:]*:301: Warning: ignoring redefinition of register alias 'lr'
+[^:]*:302: Warning: ignoring redefinition of register alias 'fp'
+[^:]*:304: Warning: unpredictable: identical transfer and status registers --`stlxrb w26,w26,\[x0\]'
+[^:]*:305: Warning: unpredictable: identical transfer and status registers --`stlxrh w26,w26,\[x1\]'
+[^:]*:306: Warning: unpredictable: identical transfer and status registers --`stlxr w26,w26,\[x2\]'
+[^:]*:307: Warning: unpredictable: identical transfer and status registers --`stlxrb w26,w27,\[x26\]'
+[^:]*:308: Warning: unpredictable: identical transfer and status registers --`stlxrh w26,w27,\[x26\]'
+[^:]*:309: Warning: unpredictable: identical transfer and status registers --`stlxr w26,w27,\[x26\]'
+[^:]*:310: Warning: unpredictable: identical transfer and status registers --`stlxr w26,x27,\[x26\]'
+[^:]*:311: Warning: unpredictable: identical transfer and status registers --`stlxr w26,x26,\[x3\]'
+[^:]*:312: Warning: unpredictable: identical transfer and status registers --`ldxp x26,x26,\[x5\]'
+[^:]*:313: Warning: unpredictable: identical transfer and status registers --`ldxp x26,x1,\[x26\]'
+[^:]*:314: Error: expected element type rather than vector type at operand 1 -- `st4 {v0\.16b-v3\.16b}\[4\],\[x0\]'