/* tc-m32r.h -- Header file for tc-m32r.c.
- Copyright (C) 1996, 1997, 1998, 2000 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2007, 2009 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2, or (at your option)
+ the Free Software Foundation; either version 3, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ the Free Software Foundation, 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA. */
#define TC_M32R
-#ifndef BFD_ASSEMBLER
-/* leading space so will compile with cc */
- #error M32R support requires BFD_ASSEMBLER
-#endif
-
-#define LISTING_HEADER "M32R GAS "
+#define LISTING_HEADER \
+ (target_big_endian ? "M32R GAS" : "M32R GAS Little Endian")
/* The target BFD architecture. */
#define TARGET_ARCH bfd_arch_m32r
-#define TARGET_FORMAT "elf32-m32r"
+/* The endianness of the target format may change based on command
+ line arguments. */
+#define TARGET_FORMAT m32r_target_format()
+extern const char *m32r_target_format (void);
+/* Default to big endian. */
+#ifndef TARGET_BYTES_BIG_ENDIAN
#define TARGET_BYTES_BIG_ENDIAN 1
+#endif
-/* call md_pcrel_from_section, not md_pcrel_from */
-long md_pcrel_from_section PARAMS ((struct fix *, segT));
-#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section(FIXP, SEC)
+/* Call md_pcrel_from_section, not md_pcrel_from. */
+long md_pcrel_from_section (struct fix *, segT);
+#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section(FIX, SEC)
/* Permit temporary numeric labels. */
#define LOCAL_LABELS_FB 1
-#define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs */
+#define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs. */
/* We don't need to handle .word strangely. */
#define WORKING_DOT_WORD
/* For 8 vs 16 vs 32 bit branch selection. */
extern const struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table
-#if 0
-extern void m32r_prepare_relax_scan ();
-#define md_prepare_relax_scan(fragP, address, aim, this_state, this_type) \
-m32r_prepare_relax_scan (fragP, address, aim, this_state, this_type)
-#else
-extern long m32r_relax_frag PARAMS ((fragS *, long));
-#define md_relax_frag(fragP, stretch) \
-m32r_relax_frag (fragP, stretch)
-#endif
+
+extern long m32r_relax_frag (segT, fragS *, long);
+#define md_relax_frag(segment, fragP, stretch) \
+ m32r_relax_frag (segment, fragP, stretch)
+
/* Account for nop if 32 bit insn falls on odd halfword boundary. */
-#define TC_CGEN_MAX_RELAX(insn, len) (6)
+#define TC_CGEN_MAX_RELAX(insn, len) 6
/* Fill in rs_align_code fragments. */
-extern void m32r_handle_align PARAMS ((fragS *));
+extern void m32r_handle_align (fragS *);
#define HANDLE_ALIGN(f) m32r_handle_align (f)
#define MAX_MEM_FOR_RS_ALIGN_CODE (1 + 2 + 4)
-#define MD_APPLY_FIX3
-#define md_apply_fix3 gas_cgen_md_apply_fix3
+/* Values passed to md_apply_fix don't include the symbol value. */
+#define MD_APPLY_SYM_VALUE(FIX) 0
-#define obj_fix_adjustable(fixP) m32r_fix_adjustable(fixP)
+#define md_apply_fix gas_cgen_md_apply_fix
+
+#define tc_fix_adjustable(FIX) m32r_fix_adjustable (FIX)
+bfd_boolean m32r_fix_adjustable (struct fix *);
/* After creating a fixup for an instruction operand, we need to check for
HI16 relocs and queue them up for later sorting. */
#define TC_HANDLES_FX_DONE
-#define tc_gen_reloc gas_cgen_tc_gen_reloc
+extern int pic_code;
+
+extern bfd_boolean m32r_fix_adjustable (struct fix *);
-#define tc_frob_file() m32r_frob_file ()
-extern void m32r_frob_file PARAMS ((void));
+/* This arranges for gas/write.c to not apply a relocation if
+ obj_fix_adjustable() says it is not adjustable. */
+#define TC_FIX_ADJUSTABLE(fixP) obj_fix_adjustable (fixP)
+
+#define tc_frob_file_before_fix() m32r_frob_file ()
+extern void m32r_frob_file (void);
+
+/* No shared lib support, so we don't need to ensure externally
+ visible symbols can be overridden.
+#define EXTERN_FORCE_RELOC 0 */
/* When relaxing, we need to emit various relocs we otherwise wouldn't. */
#define TC_FORCE_RELOCATION(fix) m32r_force_relocation (fix)
-extern int m32r_force_relocation ();
+extern int m32r_force_relocation (struct fix *);
/* Ensure insns at labels are aligned to 32 bit boundaries. */
-int m32r_fill_insn PARAMS ((int));
+int m32r_fill_insn (int);
#define md_after_pass_hook() m32r_fill_insn (1)
-#define TC_START_LABEL(ch, ptr) (ch == ':' && m32r_fill_insn (0))
-
-/* Add extra M32R sections. */
-#define ELF_TC_SPECIAL_SECTIONS \
- { ".sdata", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE }, \
- { ".sbss", SHT_NOBITS, SHF_ALLOC + SHF_WRITE },
+#define TC_START_LABEL(ch, s, ptr) (ch == ':' && m32r_fill_insn (0))
#define md_cleanup m32r_elf_section_change_hook
#define md_elf_section_change_hook m32r_elf_section_change_hook
-extern void m32r_elf_section_change_hook ();
+extern void m32r_elf_section_change_hook (void);
+
+#define md_flush_pending_output() m32r_flush_pending_output ()
+extern void m32r_flush_pending_output (void);
+
+#define elf_tc_final_processing m32r_elf_final_processing
+extern void m32r_elf_final_processing (void);
+
+#define md_parse_name(name, exprP, mode, nextcharP) \
+ m32r_parse_name ((name), (exprP), (mode), (nextcharP))
+extern int m32r_parse_name (char const *, expressionS *, enum expr_mode, char *);
+
+/* This is used to construct expressions out of @GOTOFF, @PLT and @GOT
+ symbols. The relocation type is stored in X_md. */
+#define O_PIC_reloc O_md1
+
+#define TC_CGEN_PARSE_FIX_EXP(opinfo, exp) \
+ m32r_cgen_parse_fix_exp(opinfo, exp)
+extern int m32r_cgen_parse_fix_exp (int, expressionS *);
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