+2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
+
+ * doc/Makefile.am: Add html target.
+ * doc/Makefile.in: Regenerate.
+ * po/Make-in: Add html target.
+
+2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/config/tc-i386.c (output_insn): Support Intel Merom New
+ Instructions.
+
+ * gas/config/tc-i386.h (CpuMNI): New.
+ (CpuUnknownFlags): Add CpuMNI.
+
+2006-02-24 David S. Miller <davem@sunset.davemloft.net>
+
+ * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
+ (hpriv_reg_table): New table for hyperprivileged registers.
+ (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
+ register encoding.
+
+2006-02-24 DJ Delorie <dj@redhat.com>
+
+ * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
+ (tc_gen_reloc): Don't define.
+ * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
+ (OPTION_LINKRELAX): New.
+ (md_longopts): Add it.
+ (m32c_relax): New.
+ (md_parse_options): Set it.
+ (md_assemble): Emit relaxation relocs as needed.
+ (md_convert_frag): Emit relaxation relocs as needed.
+ (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
+ (m32c_apply_fix): New.
+ (tc_gen_reloc): New.
+ (m32c_force_relocation): Force out jump relocs when relaxing.
+ (m32c_fix_adjustable): Return false if relaxing.
+
+2006-02-24 Paul Brook <paul@codesourcery.com>
+
+ * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
+ arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
+ (struct asm_barrier_opt): Define.
+ (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
+ (parse_psr): Accept V7M psr names.
+ (parse_barrier): New function.
+ (enum operand_parse_code): Add OP_oBARRIER.
+ (parse_operands): Implement OP_oBARRIER.
+ (do_barrier): New function.
+ (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
+ (do_t_cpsi): Add V7M restrictions.
+ (do_t_mrs, do_t_msr): Validate V7M variants.
+ (md_assemble): Check for NULL variants.
+ (v7m_psrs, barrier_opt_names): New tables.
+ (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
+ (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
+ (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
+ (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
+ (struct cpu_arch_ver_table): Define.
+ (cpu_arch_ver): New.
+ (aeabi_set_public_attributes): Use cpu_arch_ver. Set
+ Tag_CPU_arch_profile.
+ * doc/c-arm.texi: Document new cpu and arch options.
+
+2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
+
+2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-ia64.c: Update copyright years.
+
+2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-ia64.c (specify_resource): Add the rule 17 from
+ SDM 2.2.
+
+2005-02-22 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (do_pld): Remove incorrect write to
+ inst.instruction.
+ (encode_thumb32_addr_mode): Use correct operand.
+
+2006-02-21 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
+
+2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
+ Anil Paranjape <anilp1@kpitcummins.com>
+ Shilin Shakti <shilins@kpitcummins.com>
+
+ * Makefile.am: Add xc16x related entry.
+ * Makefile.in: Regenerate.
+ * configure.in: Added xc16x related entry.
+ * configure: Regenerate.
+ * config/tc-xc16x.h: New file
+ * config/tc-xc16x.c: New file
+ * doc/c-xc16x.texi: New file for xc16x
+ * doc/all.texi: Entry for xc16x
+ * doc/Makefile.texi: Added c-xc16x.texi
+ * NEWS: Announce the support for the new target.
+
+2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
+
+ * configure.tgt: set emulation for mips-*-netbsd*
+
+2006-02-14 Jakub Jelinek <jakub@redhat.com>
+
+ * config.in: Rebuilt.
+
+2006-02-13 Bob Wilson <bob.wilson@acm.org>
+
+ * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
+ from 1, not 0, in error messages.
+ (md_assemble): Simplify special-case check for ENTRY instructions.
+ (tinsn_has_invalid_symbolic_operands): Do not include opcode and
+ operand in error message.
+
+2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
+
+ * configure.tgt (arm-*-linux-gnueabi*): Change to
+ arm-*-linux-*eabi*.
+
+2006-02-10 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-crx.c (check_range): Ensure that the sign bit of a
+ 32-bit value is propagated into the upper bits of a 64-bit long.
+
+ * config/tc-arc.c (init_opcode_tables): Fix cast.
+ (arc_extoper, md_operand): Likewise.
+
+2006-02-09 David Heine <dlheine@tensilica.com>
+
+ * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
+ each relaxation step.
+
+2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
+
+ * configure.in (CHECK_DECLS): Add vsnprintf.
+ * configure: Regenerate.
+ * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
+ include/declare here, but...
+ * as.h: Move code detecting VARARGS idiom to the top.
+ (errno.h, stdarg.h, varargs.h, va_list): ...here.
+ (vsnprintf): Declare if not already declared.
+
2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
* as.c (close_output_file): New.