+2019-10-12 Nick Clifton <nickc@redhat.com>
+
+ Release 2.33.1
+ * configure: Regenerate.
+ * po/gas.pot: Regenerate.
+
+2019-10-04 Jan Beulich <jbeulich@suse.com>
+
+ PR gas/25012
+ * config/tc-i386.c (process_operands): Adjust handling of
+ PUSH/POP of segment registers.
+ * testsuite/gas/i386/x86-64-opcode.s: Add PUSHq/POPq case with
+ %fs/%gs operands. Add PUSHF/POPF case without suffix.
+ * testsuite/gas/i386/x86-64-opcode.d: Adjust expectations.
+
+2019-09-30 Phil Blundell <pb@pbcl.net>
+
+ Release 2.33
+ * configure, Makefile.in, doc/Makefile.in, po/gas.pot: Regenerate.
+
+2019-09-25 Alan Modra <amodra@gmail.com>
+
+ Apply from master
+ 2019-09-21 Alan Modra <amodra@gmail.com>
+ * config/tc-i386.c (md_parse_option): Fix warning on vexwig assignment.
+
+2019-09-19 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * NEWS: Add SVE2 and TME entries.
+
+2019-09-16 Phil Blundell <pb@pbcl.net>
+
+ * Makefile.in, doc/Makefile.in, configure: Regenerated.
+
+2019-09-09 Phil Blundell <pb@pbcl.net>
+
+ binutils 2.33 branch created.
+
+2019-09-05 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_elf_suffix): Display the relocation
+ operator on GOT reloc warnings/errors.
+
+2019-08-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ * config/tc-arm.c (parse_neon_mov): Add check to accept vector
+ register to both the arguments in VMOV instruction.
+ * testsuite/gas/arm/mve-vmov-1.d: Modify.
+ * testsuite/gas/arm/mve-vmov-1.s: Likewise.
+ * testsuite/gas/arm/mve-vorr.d: Likewise.
+
+2019-08-23 Nick Clifton <nickc@redhat.com>
+
+ * po/sv.po: Updated Swedish translation.
+
+2019-08-22 Dennis Zhang <dennis.zhang@arm.com>
+
+ * config/tc-arm.c: New entries for Cortex-M35P, Cortex-A77,
+ and Cortex-A76AE.
+ * doc/c-arm.texi: Document new processors.
+ * testsuite/gas/arm/cpu-cortex-a76ae.d: New test.
+ * testsuite/gas/arm/cpu-cortex-a77.d: New test.
+ * testsuite/gas/arm/cpu-cortex-m35p.d: New test.
+
+2019-08-22 Bosco García <jbgg.gnu@gmail.com>
+ Nick Clifton <nickc@redhat.com>
+
+ * atof-generic.c (atof_generic): Do not ignore leading zeros if
+ they appear after a decimal point.
+ * testsuite/gas/all/float.s: Extend test to include a number with
+ a leading decimal point followed by several zeroes.
+ * testsuite/gas/i386/fp.s: Likewise.
+ * testsuite/gas/i386/fp.d: Update expected output.
+
+2019-08-22 Barnaby Wilks <barnaby.wilks@arm.com>
+
+ * config/tc-aarch64.c: Add float16 directive and add "Hh" to
+ acceptable float characters.
+ * doc/c-aarch64.texi: Documentation for float16 directive.
+ * testsuite/gas/aarch64/float16-be.d: New test.
+ * testsuite/gas/aarch64/float16-le.d: New test.
+ * testsuite/gas/aarch64/float16.s: New test.
+ * NEWS: Add NEWS entry.
+
+2019-08-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * testsuite/gas/aarch64/sysreg-4.d: Update expected disassembly for
+ tfsre0_el1, tfsr_el1, tfsr_el2, tfsr_el3, tfsr_el12 system registers.
+
+2019-08-20 Dennis Zhang <dennis.zhang@arm.com>
+
+ * NEWS: Mention the Arm and AArch64 new processors.
+ * config/tc-aarch64.c: New entries for Cortex-A34, Cortex-A65,
+ Cortex-A77, cortex-A65AE, and Cortex-A76AE.
+ * doc/c-aarch64.texi: Document new CPUs.
+ * testsuite/gas/aarch64/cpu-cortex-a34.d: New test.
+ * testsuite/gas/aarch64/cpu-cortex-a65.d: New test.
+ * testsuite/gas/aarch64/cpu-cortex-a65ae.d: New test.
+ * testsuite/gas/aarch64/cpu-cortex-a76ae.d: New test.
+ * testsuite/gas/aarch64/cpu-cortex-a77.d: New test.
+ * testsuite/gas/aarch64/nop-asm.s: New test.
+
+2019-08-19 Faraz Shahbazker <fshahbazker@wavecomp.com>
+
+ * config/tc-mips.c (fix_bad_misaligned_address): New function.
+ (fix_validate_branch): Call fix_bad_misaligned address_to
+ calculate the target address.
+ (md_apply_fix): Likewise.
+ (md_convert_frag): Update misaligned address calculation to
+ disregard ISA mode bit.
+
+2019-08-19 Faraz Shahbazker <fshahbazker@wavecomp.com>
+
+ * config/tc-mips.c (mips_move_labels): Retain ISA mode bit
+ when moving labels in text segments.
+ (mips_align): Indicate text mode when aligning labels in
+ text segments.
+ * gas/testsuite/gas/mips/insn-isa-mode.d: New test.
+ * gas/testsuite/gas/mips/insn-isa-mode.s: New test source.
+ * gas/testsuite/gas/mips/mips.exp: Run the new test.
+
+2019-08-19 Barnaby Wilks <Barnaby.Wilks@arm.com>
+
+ * config/tc-arm.c (md_atof): Add precision check. Formatting.
+
+2019-08-15 Nick Clifton <nickc@redhat.com>
+
+ * po/sv.po: Updated Swedish translation.
+
+2019-08-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ * config/tc-arm.c (enum operand_parse_code): Add the entry OP_I48_I64.
+ (po_imm1_or_imm2_or_fail): Marco to check the immediate is either of
+ 48 or 64.
+ (parse_operands): Add case OP_I48_I64.
+ (do_mve_scalar_shift1): Add function to encode the MVE shift
+ instructions with 4 arguments.
+ * testsuite/gas/arm/mve-shift-bad.l: Modify.
+ * testsuite/gas/arm/mve-shift-bad.s: Likewise.
+ * testsuite/gas/arm/mve-shift.d: Likewise.
+ * testsuite/gas/arm/mve-shift.s: Likewise.
+
+2019-08-12 Barnaby Wilks <barnaby.wilks@arm.com>
+
+ * config/tc-arm.c (enum fp_16bit_format): Add enum to represent the 2 float16 encodings.
+ (md_atof): Set precision for float16 type.
+ (arm_is_largest_exponent_ok): Check for whether to encode with the IEEE or alternative
+ format.
+ (set_fp16_format): Parse a float16_format directive.
+ (arm_parse_fp16_opt): Parse the fp16-format command line option.
+ (aeabi_set_public_attributes): For ELF encode the FP16 format EABI attribute.
+ * config/tc-arm.h (TC_LARGEST_EXPONENT_IS_NORMAL): Macro that expands to
+ arm_is_largest_exponent_ok.
+ (arm_is_largest_exponent_ok): Add prototype for arm_is_largest_exponent_ok function.
+ * doc/c-arm.texi: Add documentation for .float16, .float16_format and -mfp16-format=
+ * testsuite/gas/arm/float16-bad.d: New test.
+ * testsuite/gas/arm/float16-bad.l: New test.
+ * testsuite/gas/arm/float16-bad.s: New test.
+ * testsuite/gas/arm/float16-be.d: New test.
+ * testsuite/gas/arm/float16-format-bad.d: New test.
+ * testsuite/gas/arm/float16-format-bad.l: New test.
+ * testsuite/gas/arm/float16-format-bad.s: New test.
+ * testsuite/gas/arm/float16-format-opt-bad.d: New test.
+ * testsuite/gas/arm/float16-format-opt-bad.l: New test.
+ * testsuite/gas/arm/float16-le.d: New test.
+ * testsuite/gas/arm/float16.s: New test.
+ * testsuite/gas/arm/float16-eabi-alternative-format.d: New test.
+ * testsuite/gas/arm/float16-eabi-ieee-format.d: New test.
+ * testsuite/gas/arm/float16-eabi-no-format.d: New test.
+ * testsuite/gas/arm/float16-eabi.s: New test.
+
+2019-08-12 Barnaby Wilks <barnaby.wilks@arm.com>
+
+ * config/atof-ieee.c (H_PRECISION): Macro for precision of float16
+ type.
+ (atof_ieee): Set precision and exponent bits for encoding float16
+ types.
+ (gen_to_words): NaN and Infinity encoding for float16.
+ (ieee_md_atof): Set precision for encoding float16 type.
+
+2019-08-12 Alan Modra <amodra@gmail.com>
+
+ PR 24851
+ * config/tc-epiphany.c (md_estimate_size_before_relax): Clear
+ extra opcode bytes when changing from a 2-byte to a 4-byte insn.
+
+2019-08-09 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/ilp32/x86-64-simd-intel.d,
+ testsuite/gas/i386/ilp32/x86-64-simd-suffix.d,
+ testsuite/gas/i386/ilp32/x86-64-simd.d: Redirect to parent dir
+ output expectations.
+ * testsuite/gas/i386/x86-64-simd-intel.d,
+ testsuite/gas/i386/x86-64-simd-suffix.d,
+ testsuite/gas/i386/x86-64-simd.d: Don't hard-code hex addresses
+ and symbol-relative offsets.
+
+2019-08-08 Nick Clifton <nickc@redhat.com>
+
+ PR 24887
+ * testsuite/gas/i386/property-1.d: Adjust for new output format
+ from readelf.
+ * testsuite/gas/i386/property-2.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-1.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-2.d: Likewise.
+
+2019-08-08 Yoshinori Sato <ysato@users.sourceforge.jp>
+
+ * testsuite/gas/h8300/h8300.exp: Fix movfpe and movtpe tests.
+ * testsuite/gas/h8300/misc.s: Likewise.
+ * testsuite/gas/h8300/misch.s: Likewise.
+ * testsuite/gas/h8300/miscs.s: Likewise.
+
+2019-08-05 Barnaby Wilks <barnaby.wilks@arm.com>
+
+ * config/tc-arm.c (do_mve_vqdmlah): Use N_S_32 macro.
+ (do_neon_qrdmlah): Use N_S_32 macro.
+ * testsuite/gas/arm/mve-vqdmlah-bad.d: New test.
+ * testsuite/gas/arm/mve-vqdmlah-bad.l: New test.
+ * testsuite/gas/arm/mve-vqdmlah-bad.s: New test.
+ * testsuite/gas/arm/mve-vqdmlah.d: Remove unsigned instruction tests.
+ * testsuite/gas/arm/mve-vqdmlah.s: Remove unsigned instruction tests.
+ * testsuite/gas/arm/mve-vqdmlash-bad.d: New test.
+ * testsuite/gas/arm/mve-vqdmlash-bad.l: New test.
+ * testsuite/gas/arm/mve-vqdmlash-bad.s: New test.
+ * testsuite/gas/arm/mve-vqdmlash.d: Remove unsigned instruction tests.
+ * testsuite/gas/arm/mve-vqdmlash.s: Remove unsigned instruction tests.
+
+2019-07-30 Mel Chen <mel.chen@sifive.com>
+
+ * testsuite/gas/riscv/alias-csr.s: Add testcase for CSR-access
+ alias instructions.
+ * testsuite/gas/riscv/no-aliases-csr.d: Run testcase alias-csr.s with
+ -Mno-aliases.
+
+ * testsuite/gas/riscv/alias-csr.d: Run testcase alias-csr.s.
+ * testsuite/gas/riscv/priv-reg.d: Update.
+
+2019-07-24 Nick Clifton <nickc@redhat.com>
+
+ * po/sv.po: Updated Swedish translation.
+
+2019-07-24 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * testsuite/gas/arc/nps400-6.d: Update test.
+
+2019-07-24 Alan Modra <amodra@gmail.com>
+
+ * config/obj-elf.c (obj_elf_section, obj_elf_type): Set has_gnu_osabi.
+ * testsuite/gas/elf/section12a.d: Update xfails.
+ * testsuite/gas/elf/section12b.d: Likewise.
+
+2019-07-24 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/elf/section12a.d: xfail visium and cloudabi.
+ * testsuite/gas/elf/section12b.d: Likewise.
+ * testsuite/gas/elf/section13.d: Likewise.
+
+2019-07-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * testsuite/gas/aarch64/sysreg-4.s: Test gmid_el1 read.
+ * testsuite/gas/aarch64/sysreg-4.d: Update expected output.
+ * testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
+
+2019-07-23 Alan Modra <amodra@gmail.com>
+
+ * config/obj-elf.c (obj_elf_change_section): Don't emit a fatal
+ error for non-SHF_ALLOC SHF_GNU_MBIND here.
+ (obj_elf_parse_section_letters): Return SHF_GNU_MBIND in new
+ gnu_attr param.
+ (obj_elf_section): Adjust obj_elf_parse_section_letters call.
+ Formatting. Set SHF_GNU_MBIND and elf_osabi from gnu_attr.
+ Emit normal error for non-SHF_ALLOC SHF_GNU_MBIND and wrong osabi.
+ (obj_elf_type): Set elf_osabi for ifunc.
+ * testsuite/gas/elf/section12a.d: xfail msp430 and hpux.
+ * testsuite/gas/elf/section12b.d: Likewise.
+ * testsuite/gas/elf/section13.d: Likewise.
+ * testsuite/gas/elf/section13.l: Adjust expected error.
+
+2019-07-23 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/elf/section12a.d: Don't skip for rx.
+
+2019-07-22 Barnaby Wilks <barnaby.wilks@arm.com>
+
+ * config/tc-arm.c (do_mve_vqdmladh): Remove check for UNPREDICTABLE.
+ * testsuite/gas/arm/mve-vqdmladh-bad.l: Remove tests.
+ * testsuite/gas/arm/mve-vqdmladh-bad.s: Remove tests.
+ * testsuite/gas/arm/mve-vqdmladh.d: New tests.
+ * testsuite/gas/arm/mve-vqdmladh.s: New tests.
+ * testsuite/gas/arm/mve-vqdmlsdh-bad.l: Remove tests.
+ * testsuite/gas/arm/mve-vqdmlsdh-bad.s: Remove tests.
+ * testsuite/gas/arm/mve-vqdmlsdh.d: New tests.
+ * testsuite/gas/arm/mve-vqdmlsdh.s: New tests.
+
+2019-07-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/i386/noextreg.d: Pass -O0 to assembler.
+
+2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * testsuite/gas/bpf/alu.d: Use %r6 instead of %ctx.
+ * testsuite/gas/bpf/lddw-be.d: Likewise.
+ * testsuite/gas/bpf/lddw.d: Likewise.
+ * testsuite/gas/bpf/alu-be.d: Likewise.
+ * testsuite/gas/bpf/alu32.d: Likewise.
+
+2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-bpf.c (pe_lcomm_internal): Adapted from tc-i386.c.
+ (pe_lcomm): Likewise.
+ (md_pseudo_table): Use pe_lcomm to implement .lcomm.
+
+2019-07-19 Richard Sandiford <richard.sandiford@arm.com>
+
+ * doc/c-aarch64.texi: Remame the +bitperm extension to +sve2-bitperm.
+ * config/tc-aarch64.c (aarch64_features): Likewise.
+ * testsuite/gas/aarch64/illegal-sve2-aes.d: Update accordingly.
+ * testsuite/gas/aarch64/illegal-sve2-sha3.d: Likewise.
+ * testsuite/gas/aarch64/illegal-sve2-sm4.d: Likewise.
+ * testsuite/gas/aarch64/illegal-sve2.d: Likewise.
+ * testsuite/gas/aarch64/sve2.d: Likewise.
+
+2019-07-19 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_elf_suffix): Map "tls@pcrel", "got@tlsgd@pcrel",
+ "got@tlsld@pcrel", "got@tprel@pcrel", and "got@dtprel@pcrel".
+ (fixup_size, md_assemble): Handle pcrel tls relocs.
+ (ppc_force_relocation, ppc_fix_adjustable): Likewise.
+ (md_apply_fix, tc_gen_reloc): Likewise.
+
+2019-07-17 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-bpf.c: Make .lcomm to get a third argument with the
+ alignment.
+
+2019-07-17 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-bpf.c (md_pseudo_table): .half, .word and .dword.
+
+ * testsuite/gas/bpf/data.s: New file.
+ * testsuite/gas/bpf/data.d: Likewise.
+ * testsuite/gas/bpf/data-be.d: Likewise.
+ * testsuite/gas/bpf/bpf.exp: Run data and data-be.
+ * doc/c-bpf.texi (BPF Directives): New section.
+
+2019-07-17 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (check_hle, md_assemble, check_VecOperands,
+ match_template, check_string, build_modrm_byte): Replace
+ operand_type_check(..., anymem) by Operand_Mem ones.
+ (process_operands): Also copy i.flags[] when copying other
+ operand properties.
+
+2019-07-16 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (match_template): Adjust regmem reference.
+ Adjust comment and update regmem when swapping operands.
+ (build_modrm_byte): Drop clearing of regmem and stale part of
+ comment. Correct comment. Adjust regmem reference.
+
+2019-07-16 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (type_names): Replace SReg entries.
+ (pi, check_byte_reg, build_modrm_byte, i386_att_operand,
+ parse_real_register): Switch to using sreg field.
+ (process_operands): Likewise. Extend handling of PUSH/POP of
+ segment registers. Drop dead setting of REX_B.
+ * config/tc-i386-intel.c (i386_intel_simplify_register,
+ i386_intel_operand): Switch to using sreg field.
+ * testsuite/gas/i386/x86-64-opcode.s: Add PUSH/POP of %fs/%gs.
+ * testsuite/gas/i386/x86-64-opcode.d: Adjust expectations.
+ * testsuite/gas/i386/ilp32/x86-64-opcode.d: Use parent dir
+ expectations.
+
+2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * testsuite/gas/bpf/mem.s: ldabs instructions do not take a `src'
+ register as an argument.
+ * testsuite/gas/bpf/mem.d: Updated accordingly.
+ * testsuite/gas/bpf/mem-be.d: Likewise.
+ * doc/c-bpf.texi (BPF Opcodes): Update to reflect the correct
+ explicit arguments to ldabs and ldind instructions.
+
+2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * testsuite/gas/bpf/mem.s: Do not use explicit arguments for
+ ldabs and ldind instructions.
+ * testsuite/gas/bpf/mem.d: Updated accordingly.
+ * testsuite/gas/bpf/mem-be.d: Likewise.
+
+2019-07-09 Alan Modra <amodra@gmail.com>
+
+ * config/obj-elf.c (elf_frob_symbol): Remove mips hacks.
+ * config/tc-mips.h (tc_frob_symbol): Define.
+ (mips_frob_symbol): Declare.
+ * config/tc-mips.c (s_mips_globl): Don't set BSF_OBJECT for irix.
+ (mips_frob_symbol): Fudge symbols for irix here.
+ * testsuite/gas/elf/type-2.e: Allow random target symbols.
+
+2019-07-05 Kito Cheng <kito.cheng@sifive.com>
+
+ * doc/c-riscv.texi (Instruction Formats): Add r4 type.
+ * testsuite/gas/riscv/insn.d: Add testcase for r4 type.
+ * testsuite/gas/riscv/insn.s: Ditto.
+
+ * doc/c-riscv.texi (Instruction Formats): Add b and j type.
+ * testsuite/gas/riscv/insn.d: Add test case for b and j type.
+ * testsuite/gas/riscv/insn.s: Ditto.
+
+ * testsuite/gas/riscv/insn.s: Correct instruction type for load
+ and store.
+
+ * testsuite/gas/riscv/insn.d: Using regular expression to match
+ address.
+
+ * doc/c-riscv.texi (Instruction Formats): Fix encoding table for SB
+ type and fix typo.
+
+2019-07-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (md_parse_option): Don't blindly accept all
+ -Q options.
+ (md_show_usage): Correctly name the ignored -Q option flavors.
+
+2019-07-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/obj-elf.c (obj_elf_type): Check for conflicts between
+ old and new types.
+ * config/tc-hppa.h (md_elf_symbol_type_change): New.
+ * doc/as.texi: Mention warning behavior for the ELF flavor of
+ .type.
+ * testsuite/gas/elf/type-2.e, testsuite/gas/elf/type-2.l,
+ testsuite/gas/elf/type-2.s: New.
+ * testsuite/gas/elf/elf.exp: Run new test.
+
+2019-07-03 Nick Clifton <nickc@redhat.com>
+
+ * testsuite/gas/aarch64/codealign.d: Update to work with a
+ toolchain configured to generate build notes.
+ * testsuite/gas/aarch64/codealign_1.d: Likewise.
+ * testsuite/gas/aarch64/dwarf.d: Likewise.
+ * testsuite/gas/aarch64/mapmisc.d: Likewise.
+ * testsuite/gas/aarch64/mapping.d: Likewise.
+ * testsuite/gas/aarch64/mapping2.d: Likewise.
+ * testsuite/gas/aarch64/mapping3.d: Likewise.
+ * testsuite/gas/aarch64/mapping4.d: Likewise.
+ * testsuite/gas/aarch64/mapping_5.d: Likewise.
+ * testsuite/gas/aarch64/mapping_6.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_1.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_10.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_11.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_12.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_13.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_14.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_15.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_16.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_17.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_18.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_19.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_2.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_20.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_21.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_22.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_23.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_24.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_25.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_26.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_27.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_3.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_4.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_5.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_6.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_7.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_8.d: Likewise.
+ * testsuite/gas/aarch64/sve-movprfx_9.d: Likewise.
+ * testsuite/gas/aarch64/symbol-variant_pcs-1.d: Likewise.
+ * testsuite/gas/aarch64/symbol-variant_pcs-2.d: Likewise.
+ * testsuite/gas/aarch64/symbol-variant_pcs-3.d: Likewise.
+ * testsuite/gas/all/assign.d: Likewise.
+ * testsuite/gas/all/none.d: Likewise.
+ * testsuite/gas/all/weakref1.d: Likewise.
+ * testsuite/gas/arm/got_prel.d: Likewise.
+ * testsuite/gas/arm/local_function.d: Likewise.
+ * testsuite/gas/arm/mapdir.d: Likewise.
+ * testsuite/gas/arm/mapmisc.d: Likewise.
+ * testsuite/gas/arm/mapping2.d: Likewise.
+ * testsuite/gas/arm/mapping3.d: Likewise.
+ * testsuite/gas/arm/mapping4.d: Likewise.
+ * testsuite/gas/arm/mapsecs.d: Likewise.
+ * testsuite/gas/arm/mapshort-eabi.d: Likewise.
+ * testsuite/gas/arm/thumbrel.d: Likewise.
+ * testsuite/gas/arm/unwind.d: Likewise.
+ * testsuite/gas/cfi/cfi-label.d: Likewise.
+ * testsuite/gas/elf/elf.exp: Likewise.
+ * testsuite/gas/i386/bss.d: Likewise.
+ * testsuite/gas/i386/ifunc-3.d: Likewise.
+ * testsuite/gas/i386/ilp32/mixed-mode-reloc64.d: Likewise.
+ * testsuite/gas/i386/ilp32/quad.d: Likewise.
+ * testsuite/gas/i386/ilp32/reloc64.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-size-1.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-size-3.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-size-5.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-unwind.d: Likewise.
+ * testsuite/gas/i386/mixed-mode-reloc32.d: Likewise.
+ * testsuite/gas/i386/mixed-mode-reloc64.d: Likewise.
+ * testsuite/gas/i386/nop-6.d: Likewise.
+ * testsuite/gas/i386/property-1.d: Likewise.
+ * testsuite/gas/i386/property-2.d: Likewise.
+ * testsuite/gas/i386/relax.d: Likewise.
+ * testsuite/gas/i386/reloc64.d: Likewise.
+ * testsuite/gas/i386/size-1.d: Likewise.
+ * testsuite/gas/i386/size-3.d: Likewise.
+ * testsuite/gas/i386/x86-64-nop-6.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-1.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-2.d: Likewise.
+ * testsuite/gas/i386/x86-64-size-1.d: Likewise.
+ * testsuite/gas/i386/x86-64-size-3.d: Likewise.
+ * testsuite/gas/i386/x86-64-size-5.d: Likewise.
+ * testsuite/gas/i386/x86-64-unwind.d: Likewise.
+ * testsuite/gas/macros/irp.d: Likewise.
+ * testsuite/gas/macros/repeat.d: Likewise.
+ * testsuite/gas/macros/rept.d: Likewise.
+ * testsuite/gas/macros/test2.d: Likewise.
+ * testsuite/gas/macros/test3.d: Likewise.
+ * testsuite/gas/macros/vararg.d: Likewise.
+ * testsuite/gas/ppc/astest2.d: Likewise.
+ * testsuite/gas/ppc/astest2_64.d: Likewise.
+ * testsuite/gas/ppc/astest64.d: Likewise.
+ * testsuite/gas/ppc/power4.d: Likewise.
+ * testsuite/gas/ppc/test1elf64.d: Likewise.
+
+2019-07-02 Barnaby Wilks <barnaby.wilks@arm.com>
+
+ * config/tc-aarch64.c (parse_operands): Add error check.
+ * testsuite/gas/aarch64/diagnostic.l: New test.
+ * testsuite/gas/aarch64/diagnostic.s: New test.
+ * testsuite/gas/aarch64/illegal.l: New tests.
+ * testsuite/gas/aarch64/illegal.s: New tests.
+
+2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
+
+ * testsuite/gas/aarch64/sve-movprfx_27.s,
+ * testsuite/gas/aarch64/sve-movprfx_27.d: New test.
+
+2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
+
+ * testsuite/gas/aarch64/sve-movprfx_26.s: Also test FCVTZS, FCVTZU,
+ SCVTF, UCVTF, LSR and ASR.
+ * testsuite/gas/aarch64/sve-movprfx_26.d: Update accordingly.
+ * testsuite/gas/aarch64/sve-movprfx_26.l: Likewise.
+
+2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
+
+ * testsuite/gas/aarch64/sve-movprfx_25.s: Allow CPY Z1.D.P1/M,X1
+ to be prefixed by MOVPRFX.
+ * testsuite/gas/aarch64/sve-movprfx_25.d: Update accordingly.
+ * testsuite/gas/aarch64/sve-movprfx_25.l: Likewise.
+
+2019-07-01 Nick Clifton <nickc@redhat.com>
+
+ PR 24748
+ * write.c (create_note_reloc): Add desc2_offset parameter. Change
+ name of offset parameter to note_offset. Only use desc2_offset
+ when placing addend into REL reloc's address space.
+ (maybe_generate_build_notes): Update parameters passed to
+ create_note_reloc.
+
+2019-07-01 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * testsuite/gas/aarch64/illegal-sve2-aes.d: Update tests.
+ * testsuite/gas/aarch64/illegal-sve2.l: Update tests.
+ * doc/c-aarch64.texi: Add special note of pmull{t,b}
+ instructions under the sve2-aes architecture extension.
+ * testsuite/gas/aarch64/illegal-sve2.s: Add small size
+ pmull{t,b} instructions.
+ * testsuite/gas/aarch64/sve2.d: Add small size pmull{t,b}
+ disassembly.
+ * testsuite/gas/aarch64/sve2.s: Add small size pmull{t,b}
+ instructions.
+
+2019-07-01 Nick Clifton <nickc@redhat.com>
+
+ PR 24738
+ * doc/c-i386.texi (i386-Directives): Add a description of the
+ Value directive.
+
+2019-07-01 Nick Clifton <nickc@redhat.com>
+
+ PR 24737
+ * doc/as.texi (Align): Add missing word to description of
+ pseudo-op.
+ (P2align): Likewise.
+
+2019-06-28 Nick Clifton <nickc@redhat.com>
+
+ PR 24735
+ * doc/as.texi (Zero): Fix spelling typo.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (vec_imm4): Delete.
+ (VEX_check_operands): Replace Vec_Imm4 check by CpuXOP with five
+ operands one. Clear Imm<N> by different means.
+ (build_modrm_byte): Adjust comment. Remove dead code. Add and
+ adjust assertions.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (output_insn): Adjust recognition of xFENCE
+ insns. Move PadLock special case of prefix emission to 3-byte
+ long base opcode handling.
+ (i386_index_check): Check for CpuPadLock instead of ImmExt.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_encoding): Handle AND / OR with
+ both operands being the same register.
+ * doc/c-i386.texi: Update -O2 documentation.
+ * testsuite/gas/i386/optimize-2.s,
+ testsuite/gas/i386/x86-64-optimize-3.s: Add cases of AND / OR
+ with both operands being the same register.
+ * testsuite/gas/i386/optimize-2.d,
+ testsuite/gas/i386/x86-64-optimize-3.d: Adjust expectations.
+ * testsuite/gas/i386/optimize-2b.d,
+ testsuite/gas/i386/x86-64-optimize-3b.d: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (commutative): New.
+ (build_vex_prefix): Handle commutative case.
+ (optimize_encoding): Set commutative flag when appropriate.
+ * doc/c-i386.texi: Update -O2 documentation.
+ * testsuite/gas/i386/ilp32/x86-64-sse2avx.d: Re-use parent dir
+ output.
+ * testsuite/gas/i386/x86-64-sse2avx.s: Add tests with high
+ numbered source operands.
+ * testsuite/gas/i386/x86-64-optimize-2.d,
+ testsuite/gas/i386/x86-64-optimize-2b.d,
+ testsuite/gas/i386/x86-64-optimize-3.d,
+ testsuite/gas/i386/x86-64-optimize-5.d,
+ testsuite/gas/i386/x86-64-optimize-6.d,
+ testsuite/gas/i386/x86-64-sse2avx.d: Adjust expectations.
+ * testsuite/gas/i386/x86-64-avx-swap-2.d,
+ testsuite/gas/i386/x86-64-avx-swap-2.s: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (is_evex_encoding): Don't check for SAE.
+ (check_VecOperands): Simplify static rounding / SAE checking.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_encoding): Make j unsigned. Handle
+ vpand{d,q}, vpandn{d,q}, vpor{d,q}, and vpxor{d,q}. Also check/
+ clear broadcast. Eliminate a loop.
+ * doc/c-i386.texi: Update -O1 documentation.
+ * testsuite/gas/i386/optimize-1.s,
+ testsuite/gas/i386/optimize-2.s,
+ testsuite/gas/i386/optimize-3.s,
+ testsuite/gas/i386/optimize-5.s,
+ testsuite/gas/i386/x86-64-optimize-2.s,
+ testsuite/gas/i386/x86-64-optimize-3.s,
+ testsuite/gas/i386/x86-64-optimize-4.s,
+ testsuite/gas/i386/x86-64-optimize-6.s: Add vpand{d,q},
+ vpandn{d,q}, vpor{d,q}, and vpxor{d,q} cases.
+ testsuite/gas/i386/optimize-1.d,
+ testsuite/gas/i386/optimize-1a.d,
+ testsuite/gas/i386/optimize-2.d,
+ testsuite/gas/i386/optimize-3.d,
+ testsuite/gas/i386/optimize-4.d,
+ testsuite/gas/i386/optimize-5.d,
+ testsuite/gas/i386/x86-64-optimize-2.d,
+ testsuite/gas/i386/x86-64-optimize-2a.d,
+ testsuite/gas/i386/x86-64-optimize-2b.d,
+ testsuite/gas/i386/x86-64-optimize-3.d,
+ testsuite/gas/i386/x86-64-optimize-4.d,
+ testsuite/gas/i386/x86-64-optimize-5.d,
+ testsuite/gas/i386/x86-64-optimize-6.d: Adjust expectations.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/avx512f_vpclmulqdq.s,
+ testsuite/gas/i386/avx512vl_vpclmulqdq.s,
+ testsuite/gas/i386/vpclmulqdq.s,
+ testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.s,
+ testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.s: Add pseudo ops.
+ * testsuite/gas/i386/x86-64-vpclmulqdq.s: Likewise. Don't use
+ high 16 [xy]mm registers.
+ * testsuite/gas/i386/avx512f_vpclmulqdq.d,
+ testsuite/gas/i386/avx512f_vpclmulqdq-intel.d,
+ testsuite/gas/i386/avx512vl_vpclmulqdq.d,
+ testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d,
+ testsuite/gas/i386/vpclmulqdq.d,
+ testsuite/gas/i386/vpclmulqdq-intel.d,
+ testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.d,
+ testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-intel.d,
+ testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.d,
+ testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-intel.d,
+ testsuite/gas/i386/x86-64-vpclmulqdq.d,
+ testsuite/gas/i386/x86-64-vpclmulqdq-intel.d: Adjust
+ expectations.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * tc-i386.c (output_disp, output_imm): Use encoding_length.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * tc-i386.c (encoding_length): New.
+ (output_insn): Use it.
+ * testsuite/gas/i386/oversized16.l,
+ testsuite/gas/i386/oversized16.s,
+ testsuite/gas/i386/oversized64.l,
+ testsuite/gas/i386/oversized64.s: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2019-06-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/24719
+ * testsuite/gas/i386/disassem.s: Add test for vgatherpf0dps
+ with invalid vector length.
+ * testsuite/gas/i386/x86-64-disassem.s: Likewise.
+ * testsuite/gas/i386/disassem.d: Updated.
+ * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
+2019-06-27 Barnaby Wilk s<barnaby.wilks@arm.com>
+
+ * config/tc-arm.c (do_smc): Add range check for immediate operand.
+ (do_t_smc): Add range check for immediate operand. Remove
+ obsolete immediate encoding.
+ (md_apply_fix): Fix range check. Remove obsolete immediate encoding.
+ * testsuite/gas/arm/arch6zk.d: Fix test.
+ * testsuite/gas/arm/arch6zk.s: Fix test.
+ * testsuite/gas/arm/smc-bad.d: New test.
+ * testsuite/gas/arm/smc-bad.l: New test.
+ * testsuite/gas/arm/smc-bad.s: New test.
+ * testsuite/gas/arm/thumb32.d: Fix test.
+ * testsuite/gas/arm/thumb32.s: Fix test.
+
+2019-06-27 Jan Beulich <jbeulich@suse.com>
+
+ config/tc-i386.c (md_assemble): Check for protected mode
+ incapable processor before encoding VEX and alike insns.
+ * testsuite/gas/i386/inval-16.s: For 80186 architecture.
+ * testsuite/gas/i386/inval-16.l: Adjust expectations.
+ * testsuite/gas/i386/avx-16bit.d,
+ testsuite/gas/i386/avx-16bit.s,
+ testsuite/gas/i386/avx512f-16bit.d,
+ testsuite/gas/i386/avx512f-16bit.s,
+ testsuite/gas/i386/bmi-16bit.d,
+ testsuite/gas/i386/bmi-16bit.s,
+ testsuite/gas/i386/bmi2-16bit.d,
+ testsuite/gas/i386/bmi2-16bit.s,
+ testsuite/gas/i386/lwp-16bit.d,
+ testsuite/gas/i386/lwp-16bit.s: New
+ testsuite/gas/i386/i386.exp: Run new tests.
+
+2019-06-26 Jim Wilson <jimw@sifive.com>
+
+ * testsuite/gas/xstormy16/allinsn.sh: Change first line to
+ #!/bin/bash and make it executable.
+ * testsuite/gas/xstormy16/gcc.sh: Likewise.
+
+2019-06-26 Lili Cui <lili.cui@intel.com>
+
+ * doc/c-i386.texi: Document x/y/z instruction sufffixes in AT&T
+ syntax and xmmword/ymmword/zmmword/fword/tbyte/oword ptr in
+ Intel syntax.
+
+2019-06-25 Faraz Shahbazker <fshahbazker@wavecomp.com>
+
+ * config/tc-mips.c (macro) <M_LI>: Re-order MTHC1 with
+ respect to MTC1 and use $0 for either part where possible.
+ * testsuite/gas/mips/li-d.s: Add test cases for non-zero
+ words in double precision constants.
+ * testsuite/gas/mips/li-d.d: Update reference output.
+ * testsuite/gas/mips/micromips@isa-override-1.d: Likewise.
+ * testsuite/gas/mips/mips32r2@isa-override-1.d: Likewise.
+ * testsuite/gas/mips/mips64r2@isa-override-1.d: Likewise.
+
+2019-06-25 Jan Beulich <jbeulich@suse.com>
+
+ * tc-i386.c (acc32, acc64): Delete.
+ (pi): Make first parameter pinter-to-const.
+ (type_names): Remove Acc. Add acc8, acc16, acc32, and acc64.
+ (pt): Use operand_type_equal().
+ (match_template): Replace use of acc32.
+ (process_suffix): Replace use of acc64.
+
+2019-06-25 Jan Beulich <jbeulich@suse.com>
+
+ * doc/c-i386.texi: Mark -mavxscalar= and -mvexwig as dangrous to
+ use.
+
+2019-06-25 Jan Beulich <jbeulich@suse.com>
+
+ * tc-i386.c (process_suffix): Use is_any_vex_encoding().
+
+2019-06-25 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/sse2-16bit.d,
+ testsuite/gas/i386/sse2-16bit.s: New.
+ testsuite/gas/i386/i386.exp: Run new test.
+
+2019-06-25 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_encoding): Also handle ANDQ with
+ immediatie fitting in 7 bits.
+ * testsuite/gas/i386/x86-64-optimize-1.s: Add ANDQ cases with
+ 7- and 8-bit immediates.
+ * testsuite/gas/i386/x86-64-optimize-1.d: Adjust expectations.
+
+2019-06-25 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/xmmword.s: Add cvtps2pi and cvttps2pi
+ tests.
+ * testsuite/gas/i386/xmmword.l: Adjust expectations.
+
+2019-06-25 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_handle_align): Add parentheses.
+
+2019-06-25 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.h (ppc_nop_select): Declare.
+ (NOP_OPCODE): Define.
+ * config/tc-ppc.c (ppc_elf_end, ppc_xcoff_end): Zero ppc_cpu.
+ (ppc_nop_encoding_for_rs_align_code): New enum.
+ (ppc_nop_select): New function.
+ (ppc_handle_align): Don't use ppc_cpu here. Get nop type from frag.
+ * testsuite/gas/ppc/groupnop.d,
+ * testsuite/gas/ppc/groupnop.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2019-06-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/24700
+ * testsuite/gas/i386/disassem.s: Add test for vbroadcasti32x8
+ with invalid vector length.
+ * testsuite/gas/i386/x86-64-disassem.s: Likewise.
+ * testsuite/gas/i386/disassem.d: Updated.
+ * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
+2019-06-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/24691
+ * testsuite/gas/i386/disassem.s: Add test for vshuff32x4 with
+ invalid vector length.
+ * testsuite/gas/i386/x86-64-disassem.s: Likewise.
+ * testsuite/gas/i386/disassem.d: Updated.
+ * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
+2019-06-14 Alan Modra <amodra@gmail.com>
+
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * doc/Makefile.in: Regenerate.
+
+2019-06-12 Peter Bergner <bergner@linux.ibm.com>
+
+ * testsuite/gas/ppc/power9.d: Delete ldmx tests.
+ * testsuite/gas/ppc/power9.s: Likewise.
+
+2019-06-06 Lili Cui <lili.cui@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .enqcmd.
+ (cpu_noarch): Add noenqcmd.
+ * doc/c-i386.texi: Document noenqcmd.
+
2019-06-05 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/24633
projects / external / binutils.git / blobdiff