FD_DEVICE_ID,
FD_GMEM_SIZE,
FD_GPU_ID,
+ FD_CHIP_ID,
+ FD_MAX_FREQ,
};
/* bo flags: */
#define DRM_FREEDRENO_GEM_CACHE_MASK 0x00f00000
#define DRM_FREEDRENO_GEM_GPUREADONLY 0x01000000
-/* bo access flags: */
+/* bo access flags: (keep aligned to MSM_PREP_x) */
#define DRM_FREEDRENO_PREP_READ 0x01
#define DRM_FREEDRENO_PREP_WRITE 0x02
-
+#define DRM_FREEDRENO_PREP_NOSYNC 0x04
/* device functions:
*/
struct fd_device * fd_device_new(int fd);
+struct fd_device * fd_device_new_dup(int fd);
struct fd_device * fd_device_ref(struct fd_device *dev);
void fd_device_del(struct fd_device *dev);
+int fd_device_fd(struct fd_device *dev);
/* pipe functions:
int fd_pipe_get_param(struct fd_pipe *pipe, enum fd_param_id param,
uint64_t *value);
int fd_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp);
+/* timeout in nanosec */
+int fd_pipe_wait_timeout(struct fd_pipe *pipe, uint32_t timestamp,
+ uint64_t timeout);
/* buffer-object functions:
uint32_t size, uint32_t flags);
struct fd_bo * fd_bo_from_fbdev(struct fd_pipe *pipe,
int fbfd, uint32_t size);
+struct fd_bo *fd_bo_from_handle(struct fd_device *dev,
+ uint32_t handle, uint32_t size);
struct fd_bo * fd_bo_from_name(struct fd_device *dev, uint32_t name);
+struct fd_bo * fd_bo_from_dmabuf(struct fd_device *dev, int fd);
struct fd_bo * fd_bo_ref(struct fd_bo *bo);
void fd_bo_del(struct fd_bo *bo);
int fd_bo_get_name(struct fd_bo *bo, uint32_t *name);
uint32_t fd_bo_handle(struct fd_bo *bo);
+int fd_bo_dmabuf(struct fd_bo *bo);
uint32_t fd_bo_size(struct fd_bo *bo);
void * fd_bo_map(struct fd_bo *bo);
int fd_bo_cpu_prep(struct fd_bo *bo, struct fd_pipe *pipe, uint32_t op);