Protected memory stack tests
[platform/upstream/VK-GL-CTS.git] / external / vulkancts / mustpass / master / vk-default.txt
index 2e440f4..8dff2b0 100644 (file)
@@ -22679,14 +22679,26 @@ dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_u
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.3d_to_2d_by_slices
 dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.2d_to_3d_by_layers
 dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.3d_to_2d_whole
@@ -72485,14 +72497,26 @@ dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.general_optimal_nearest
@@ -77142,14 +77166,26 @@ dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.3d_images.3d_to_2d_by_slices
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.3d_images.2d_to_3d_by_layers
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.3d_images.3d_to_2d_whole
@@ -82092,14 +82128,26 @@ dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_sten
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.general_optimal_nearest
@@ -93257,141 +93305,261 @@ dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_un
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.r4g4_unorm_pack8
 dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.r4g4b4a4_unorm_pack16
 dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.b4g4r4a4_unorm_pack16
@@ -95617,141 +95785,261 @@ dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_image.1d.optimal.single_layer.r4g4_unorm_pack8
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_image.1d.optimal.single_layer.r4g4b4a4_unorm_pack16
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_image.1d.optimal.single_layer.b4g4r4a4_unorm_pack16
@@ -103749,141 +104037,261 @@ dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.r4g4_unorm_pack8
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.r4g4b4a4_unorm_pack16
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.b4g4r4a4_unorm_pack16
@@ -106109,141 +106517,261 @@ dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.s
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.fill_and_update_buffer.suballocation.fill_buffer_whole
 dEQP-VK.api.fill_and_update_buffer.suballocation.update_buffer_whole
 dEQP-VK.api.fill_and_update_buffer.suballocation.fill_buffer_first_one
@@ -118281,6 +118809,4102 @@ dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfa
 dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -122377,6 +127001,4102 @@ dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfa
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -126473,6 +135193,4102 @@ dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.df
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.nocolor.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.nocolor.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.nocolor.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -134665,6 +147481,4102 @@ dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_
 dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -138761,6 +155673,4102 @@ dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -142857,6 +163865,4102 @@ dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_dc_sas_rsub_alpha_1mdc_1msc_sub-color_1msa_1msc_add_alpha_ca_da_min-color_1msc_da_sub_alpha_1mca_ca_sub-color_o_1mda_max_alpha_sa_dc_min
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_sas_1mda_rsub_alpha_1mda_1mcc_sub-color_1mda_1mca_min_alpha_o_cc_min-color_1mdc_da_min_alpha_1mda_da_min-color_sas_1msa_max_alpha_sas_o_min
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_ca_1mcc_rsub_alpha_sa_1msc_rsub-color_1mca_ca_rsub_alpha_1msc_da_rsub-color_1mcc_1mdc_sub_alpha_z_da_sub-color_sc_dc_add_alpha_1mdc_1msa_min
@@ -147360,6 +172464,156 @@ dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_eq
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -147510,6 +172764,156 @@ dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_eq
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -147660,6 +173064,156 @@ dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_e
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm.compare_ops.not_equal_equal_equal_greater
@@ -148260,6 +173814,156 @@ dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.compare_ops.not_equal_le
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -148410,6 +174114,156 @@ dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_le
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -148560,6 +174414,156 @@ dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_l
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.dynamic_offset.graphics.uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1.numdynamicbindings_1.numnondynamicbindings_0
 dEQP-VK.pipeline.dynamic_offset.graphics.uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1.numdynamicbindings_1.numnondynamicbindings_1
 dEQP-VK.pipeline.dynamic_offset.graphics.uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1.numdynamicbindings_2.numnondynamicbindings_0
@@ -216734,8 +242738,12 @@ dEQP-VK.pipeline.creation_feedback.graphics_tests.vertex_stage_tessellation_cont
 dEQP-VK.pipeline.creation_feedback.graphics_tests.vertex_stage_fragment_stage_no_cache
 dEQP-VK.pipeline.creation_feedback.graphics_tests.vertex_stage_geometry_stage_no_cache_fragment_stage_no_cache
 dEQP-VK.pipeline.creation_feedback.graphics_tests.vertex_stage_tessellation_control_stage_no_cache_tessellation_evaluation_stage_no_cache_fragment_stage_no_cache
+dEQP-VK.pipeline.creation_feedback.graphics_tests.vertex_stage_fragment_stage_delayed_destroy
+dEQP-VK.pipeline.creation_feedback.graphics_tests.vertex_stage_geometry_stage_delayed_destroy_fragment_stage_delayed_destroy
+dEQP-VK.pipeline.creation_feedback.graphics_tests.vertex_stage_tessellation_control_stage_delayed_destroy_tessellation_evaluation_stage_delayed_destroy_fragment_stage_delayed_destroy
 dEQP-VK.pipeline.creation_feedback.compute_tests.compute_stage
 dEQP-VK.pipeline.creation_feedback.compute_tests.compute_stage_no_cache
+dEQP-VK.pipeline.creation_feedback.compute_tests.compute_stage_delayed_destroy
 dEQP-VK.pipeline.depth_range_unrestricted.clear_value.d32_sfloat_compare_op_less_or_equal_clear_value_2_wc_1_viewport_min_0_max_1
 dEQP-VK.pipeline.depth_range_unrestricted.clear_value.d32_sfloat_compare_op_less_or_equal_clear_value_-3_wc_1_viewport_min_0_max_1
 dEQP-VK.pipeline.depth_range_unrestricted.clear_value.d32_sfloat_compare_op_less_or_equal_clear_value_6_wc_1_viewport_min_0_max_1
@@ -323559,6 +349567,13 @@ dEQP-VK.renderpass.suballocation.unused_clear_attachments.colorused_colorused_co
 dEQP-VK.renderpass.suballocation.unused_clear_attachments.colorused_colorused_colorunused_colorused_depthstencil_used
 dEQP-VK.renderpass.suballocation.unused_clear_attachments.colorused_colorused_colorused_colorunused_depthstencil_used
 dEQP-VK.renderpass.suballocation.unused_clear_attachments.colorused_colorused_colorused_colorused_depthstencil_used
+dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_1
+dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_3
+dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_7
+dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_15
+dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_31
+dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_63
+dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_127
 dEQP-VK.renderpass.dedicated_allocation.simple.color
 dEQP-VK.renderpass.dedicated_allocation.simple.depth
 dEQP-VK.renderpass.dedicated_allocation.simple.stencil
@@ -334774,6 +360789,13 @@ dEQP-VK.renderpass2.suballocation.unused_clear_attachments.colorused_colorused_c
 dEQP-VK.renderpass2.suballocation.unused_clear_attachments.colorused_colorused_colorunused_colorused_depthstencil_used
 dEQP-VK.renderpass2.suballocation.unused_clear_attachments.colorused_colorused_colorused_colorunused_depthstencil_used
 dEQP-VK.renderpass2.suballocation.unused_clear_attachments.colorused_colorused_colorused_colorused_depthstencil_used
+dEQP-VK.renderpass2.suballocation.attachment_sparse_filling.input_attachment_1
+dEQP-VK.renderpass2.suballocation.attachment_sparse_filling.input_attachment_3
+dEQP-VK.renderpass2.suballocation.attachment_sparse_filling.input_attachment_7
+dEQP-VK.renderpass2.suballocation.attachment_sparse_filling.input_attachment_15
+dEQP-VK.renderpass2.suballocation.attachment_sparse_filling.input_attachment_31
+dEQP-VK.renderpass2.suballocation.attachment_sparse_filling.input_attachment_63
+dEQP-VK.renderpass2.suballocation.attachment_sparse_filling.input_attachment_127
 dEQP-VK.renderpass2.dedicated_allocation.simple.color
 dEQP-VK.renderpass2.dedicated_allocation.simple.depth
 dEQP-VK.renderpass2.dedicated_allocation.simple.stencil
@@ -338719,6 +364741,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338757,6 +364817,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338795,6 +364893,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338860,6 +364996,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338898,6 +365072,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338936,6 +365148,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -339001,6 +365251,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -339039,6 +365327,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -339077,6 +365403,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -339142,6 +365506,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -339180,6 +365582,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -339218,6 +365658,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -339283,6 +365761,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -339321,6 +365837,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -339359,6 +365913,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -339424,6 +366016,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -339462,6 +366092,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -339500,6 +366168,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -339565,6 +366271,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -339603,6 +366347,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -339641,6 +366423,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -339706,6 +366526,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -339744,6 +366602,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -339782,6 +366678,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -339847,6 +366781,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -339885,6 +366857,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -339923,6 +366933,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -339988,6 +367036,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -340026,6 +367112,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -340064,6 +367188,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -340129,6 +367291,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -340167,6 +367367,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -340205,6 +367443,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -340270,6 +367546,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -340308,6 +367622,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -340346,6 +367698,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -340411,6 +367801,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -340449,6 +367877,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -340487,6 +367953,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -340552,6 +368056,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -340590,6 +368132,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -340628,6 +368208,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -340693,6 +368311,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -340731,6 +368387,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -340769,6 +368463,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -340834,6 +368566,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -340872,6 +368642,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -340910,6 +368718,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -340975,6 +368821,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -341013,6 +368897,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -341051,6 +368973,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -341116,6 +369076,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -341154,6 +369152,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -341192,6 +369228,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -341257,6 +369331,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -341295,6 +369407,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -341333,6 +369483,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -341398,6 +369586,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -341436,6 +369662,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -341474,6 +369738,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -341539,6 +369841,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -341577,6 +369917,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -341615,6 +369993,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -341680,6 +370096,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -341718,6 +370172,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -341756,6 +370248,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -341821,6 +370351,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -341859,6 +370427,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -341897,6 +370503,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -341962,6 +370606,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -342000,6 +370682,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -342038,6 +370758,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -342103,6 +370861,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -342141,6 +370937,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -342179,6 +371013,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -342244,6 +371116,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -342282,6 +371192,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -342320,6 +371268,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -342385,6 +371371,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -342423,6 +371447,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -342461,6 +371523,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -342526,6 +371626,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -342564,6 +371702,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -342602,6 +371778,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -342667,6 +371881,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -342705,6 +371957,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -342743,6 +372033,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -342808,6 +372136,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -342846,6 +372212,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -342884,6 +372288,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm.depth_average
@@ -342912,6 +372354,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.depth_zero
@@ -342921,6 +372372,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.depth_zero
@@ -342930,6 +372390,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm.depth_average
@@ -342958,6 +372427,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.depth_zero
@@ -342967,6 +372445,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.depth_zero
@@ -342976,6 +372463,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm.depth_average
@@ -343004,6 +372500,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.depth_zero
@@ -343013,6 +372518,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.depth_zero
@@ -343022,6 +372536,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm.depth_average
@@ -343050,6 +372573,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.depth_zero
@@ -343059,6 +372591,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.depth_zero
@@ -343068,6 +372609,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm.depth_average
@@ -343096,6 +372646,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.depth_zero
@@ -343105,6 +372664,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.depth_zero
@@ -343114,6 +372682,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm.depth_average
@@ -343142,6 +372719,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.depth_zero
@@ -343151,6 +372737,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.depth_zero
@@ -343160,6 +372755,27 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_max
+dEQP-VK.renderpass2.fragment_density_map.static_subsampled_1_2
+dEQP-VK.renderpass2.fragment_density_map.dynamic_subsampled_1_2
+dEQP-VK.renderpass2.fragment_density_map.static_nonsubsampled_1_2
+dEQP-VK.renderpass2.fragment_density_map.dynamic_nonsubsampled_1_2
+dEQP-VK.renderpass2.fragment_density_map.static_subsampled_2_1
+dEQP-VK.renderpass2.fragment_density_map.dynamic_subsampled_2_1
+dEQP-VK.renderpass2.fragment_density_map.static_nonsubsampled_2_1
+dEQP-VK.renderpass2.fragment_density_map.dynamic_nonsubsampled_2_1
+dEQP-VK.renderpass2.fragment_density_map.static_subsampled_2_2
+dEQP-VK.renderpass2.fragment_density_map.dynamic_subsampled_2_2
+dEQP-VK.renderpass2.fragment_density_map.static_nonsubsampled_2_2
+dEQP-VK.renderpass2.fragment_density_map.dynamic_nonsubsampled_2_2
 dEQP-VK.ubo.2_level_array.std140.float.vertex
 dEQP-VK.ubo.2_level_array.std140.float.fragment
 dEQP-VK.ubo.2_level_array.std140.float.both
@@ -361737,6 +391353,12 @@ dEQP-VK.query_pool.statistics_query.reset_before_copy.tes_evaluation_shader_invo
 dEQP-VK.query_pool.statistics_query.reset_before_copy.tes_evaluation_shader_invocations.64bits_tes_evaluation_shader_invocations
 dEQP-VK.query_pool.statistics_query.reset_before_copy.tes_evaluation_shader_invocations.64bits_tes_evaluation_shader_invocations_secondary
 dEQP-VK.query_pool.statistics_query.reset_before_copy.tes_evaluation_shader_invocations.64bits_tes_evaluation_shader_invocations_secondary_inherited
+dEQP-VK.query_pool.performance_query.enumerate_and_validate_graphic
+dEQP-VK.query_pool.performance_query.enumerate_and_validate_compute
+dEQP-VK.query_pool.performance_query.query_graphic
+dEQP-VK.query_pool.performance_query.query_compute
+dEQP-VK.query_pool.performance_query.multiple_pools_graphic
+dEQP-VK.query_pool.performance_query.multiple_pools_compute
 dEQP-VK.draw.concurrent.compute_and_triangle_list
 dEQP-VK.draw.simple_draw.simple_draw_triangle_list
 dEQP-VK.draw.simple_draw.simple_draw_triangle_strip
@@ -510837,6 +540459,12 @@ dEQP-VK.protected_memory.workgroupstorage.memsize_5
 dEQP-VK.protected_memory.workgroupstorage.memsize_60
 dEQP-VK.protected_memory.workgroupstorage.memsize_101
 dEQP-VK.protected_memory.workgroupstorage.memsize_503
+dEQP-VK.protected_memory.stack.stacksize_32
+dEQP-VK.protected_memory.stack.stacksize_64
+dEQP-VK.protected_memory.stack.stacksize_128
+dEQP-VK.protected_memory.stack.stacksize_256
+dEQP-VK.protected_memory.stack.stacksize_512
+dEQP-VK.protected_memory.stack.stacksize_1024
 dEQP-VK.device_group.sfr
 dEQP-VK.device_group.sfr_sys
 dEQP-VK.device_group.sfr_dedicated
@@ -523196,6 +552824,8 @@ dEQP-VK.graphicsfuzz.two-loops-with-break
 dEQP-VK.graphicsfuzz.two-nested-do-whiles
 dEQP-VK.graphicsfuzz.two-nested-for-loops-with-returns
 dEQP-VK.graphicsfuzz.two-nested-infinite-loops-discard
+dEQP-VK.graphicsfuzz.undefined-integer-in-function
+dEQP-VK.graphicsfuzz.uninit-element-cast-in-loop
 dEQP-VK.graphicsfuzz.uninitialized-var-decrement-and-add
 dEQP-VK.graphicsfuzz.undefined-assign-in-infinite-loop
 dEQP-VK.graphicsfuzz.unreachable-barrier-in-loops