spi: Make Spi write() work from SWIG with typemaps

[contrib/mraa.git] / examples / python / cycle-pwm3.py

diff --git a/examples/python/cycle-pwm3.py b/examples/python/cycle-pwm3.py
index c90351a..8f2b636 100644 (file)
--- a/examples/python/cycle-pwm3.py
+++ b/examples/python/cycle-pwm3.py
@@ -22,18 +22,17 @@
 # OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 # WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
-import pymaa as maa
+import mraa
 import time
 
-maa.init()
-x = maa.PWM(0,3)
-x.enable(1);
-x.period_us(20)
+x = mraa.Pwm(3)
+x.period_us(700)
+x.enable(True)
 value= 0.0
 
 while True:
     x.write(value)
-    time.sleep(0.2)
-    value = value +0.01
+    time.sleep(0.05)
+    value = value + 0.01
     if value >= 1:
         value = 0.0