+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017-2018 STMicroelectronics - All Rights Reserved
* Author(s): Philippe Cornu <philippe.cornu@st.com> for STMicroelectronics.
* Yannick Fertre <yannick.fertre@st.com> for STMicroelectronics.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#define LXCFBLNR_CFBLN GENMASK(10, 0) /* Color Frame Buffer Line Number */
#define BF1_PAXCA 0x600 /* Pixel Alpha x Constant Alpha */
+#define BF1_CA 0x400 /* Constant Alpha */
#define BF2_1PAXCA 0x007 /* 1 - (Pixel Alpha x Constant Alpha) */
+#define BF2_1CA 0x005 /* 1 - Constant Alpha */
enum stm32_ltdc_pix_fmt {
PF_ARGB8888 = 0,
pf = PF_RGB565;
break;
+ case VIDEO_BPP32:
+ pf = PF_ARGB8888;
+ break;
+
+ case VIDEO_BPP8:
+ pf = PF_L8;
+ break;
+
case VIDEO_BPP1:
case VIDEO_BPP2:
case VIDEO_BPP4:
- case VIDEO_BPP8:
- case VIDEO_BPP32:
default:
debug("%s: warning %dbpp not supported yet, %dbpp instead\n",
__func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
return (u32)pf;
}
+static bool has_alpha(u32 fmt)
+{
+ switch (fmt) {
+ case PF_ARGB8888:
+ case PF_ARGB1555:
+ case PF_ARGB4444:
+ case PF_AL44:
+ case PF_AL88:
+ return true;
+ case PF_RGB888:
+ case PF_RGB565:
+ case PF_L8:
+ default:
+ return false;
+ }
+}
+
static void stm32_ltdc_enable(struct stm32_ltdc_priv *priv)
{
/* Reload configuration immediately & enable LTDC */
val = (total_w << 16) | total_h;
clrsetbits_le32(regs + LTDC_TWCR, TWCR_TOTALH | TWCR_TOTALW, val);
+ setbits_le32(regs + LTDC_LIPCR, acc_act_h + 1);
+
/* Signal polarities */
val = 0;
debug("%s: timing->flags 0x%08x\n", __func__, timing->flags);
u32 line_length;
u32 bus_width;
u32 val, tmp, bpp;
+ u32 format;
x0 = priv->crop_x;
x1 = priv->crop_x + priv->crop_w - 1;
clrsetbits_le32(regs + LTDC_L1CFBLR, LXCFBLR_CFBLL | LXCFBLR_CFBP, val);
/* Pixel format */
- val = stm32_ltdc_get_pixel_format(priv->l2bpp);
- clrsetbits_le32(regs + LTDC_L1PFCR, LXPFCR_PF, val);
+ format = stm32_ltdc_get_pixel_format(priv->l2bpp);
+ clrsetbits_le32(regs + LTDC_L1PFCR, LXPFCR_PF, format);
/* Constant alpha value */
clrsetbits_le32(regs + LTDC_L1CACR, LXCACR_CONSTA, priv->alpha);
+ /* Specifies the blending factors : with or without pixel alpha */
+ /* Manage hw-specific capabilities */
+ val = has_alpha(format) ? BF1_PAXCA | BF2_1PAXCA : BF1_CA | BF2_1CA;
+
/* Blending factors */
- clrsetbits_le32(regs + LTDC_L1BFCR, LXBFCR_BF2 | LXBFCR_BF1,
- BF1_PAXCA | BF2_1PAXCA);
+ clrsetbits_le32(regs + LTDC_L1BFCR, LXBFCR_BF2 | LXBFCR_BF1, val);
/* Frame buffer line number */
clrsetbits_le32(regs + LTDC_L1CFBLNR, LXCFBLNR_CFBLN, priv->crop_h);