Merge branch 'master' of git://git.denx.de/u-boot-arm

[platform/kernel/u-boot.git] / drivers / video / mx3fb.c

diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c
index 1e1d507..0c925a0 100644 (file)
--- a/drivers/video/mx3fb.c
+++ b/drivers/video/mx3fb.c
@@ -22,8 +22,8 @@
  */
 #include <common.h>
 #include <lcd.h>
-#include <asm/arch/mx31.h>
-#include <asm/arch/mx31-regs.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
 #include <asm/errno.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -56,6 +56,37 @@ void lcd_panel_disable(void)
 
 #define msleep(a) udelay(a * 1000)
 
+#if defined(CONFIG_DISPLAY_VBEST_VGG322403)
+#define XRES           320
+#define YRES           240
+#define PANEL_TYPE     IPU_PANEL_TFT
+#define PIXEL_CLK      156000
+#define PIXEL_FMT      IPU_PIX_FMT_RGB666
+#define H_START_WIDTH  20              /* left_margin */
+#define H_SYNC_WIDTH   30              /* hsync_len */
+#define H_END_WIDTH    (38 + 30)       /* right_margin + hsync_len */
+#define V_START_WIDTH  7               /* upper_margin */
+#define V_SYNC_WIDTH   3               /* vsync_len */
+#define V_END_WIDTH    (26 + 3)        /* lower_margin + vsync_len */
+#define SIG_POL                (DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL)
+#define IF_CONF                0
+#define IF_CLK_DIV     0x175
+#elif defined(CONFIG_DISPLAY_COM57H5M10XRC)
+#define XRES           640
+#define YRES           480
+#define PANEL_TYPE     IPU_PANEL_TFT
+#define PIXEL_CLK      40000
+#define PIXEL_FMT      IPU_PIX_FMT_RGB666
+#define H_START_WIDTH  120             /* left_margin */
+#define H_SYNC_WIDTH   30              /* hsync_len */
+#define H_END_WIDTH    (10 + 30)       /* right_margin + hsync_len */
+#define V_START_WIDTH  35              /* upper_margin */
+#define V_SYNC_WIDTH   3               /* vsync_len */
+#define V_END_WIDTH    (7 + 3) /* lower_margin + vsync_len */
+#define SIG_POL                (DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL)
+#define IF_CONF                0
+#define IF_CLK_DIV     0x55
+#else
 #define XRES           240
 #define YRES           320
 #define PANEL_TYPE     IPU_PANEL_TFT
@@ -70,6 +101,7 @@ void lcd_panel_disable(void)
 #define SIG_POL                (DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL)
 #define IF_CONF                0
 #define IF_CLK_DIV     0x175
+#endif
 
 #define LCD_COLOR_IPU  LCD_COLOR16
 
@@ -160,7 +192,7 @@ enum ipu_panel {
 };
 
 /* IPU Common registers */
-/* IPU_CONF and its bits already defined in mx31-regs.h */
+/* IPU_CONF and its bits already defined in imx-regs.h */
 #define IPU_CHA_BUF0_RDY       (0x04 + IPU_BASE)
 #define IPU_CHA_BUF1_RDY       (0x08 + IPU_BASE)
 #define IPU_CHA_DB_MODE_SEL    (0x0C + IPU_BASE)
@@ -302,37 +334,6 @@ enum ipu_panel {
 
 #define IOMUX_MODE_L(pin, mode) IOMUX_MODE(((pin) + 0xc) ^ 3, mode)
 
-enum lcd_pin {
-       MX31_PIN_D3_SPL         = IOMUX_PIN(0xff,  19),
-       MX31_PIN_D3_CLS         = IOMUX_PIN(0xff,  20),
-       MX31_PIN_D3_REV         = IOMUX_PIN(0xff,  21),
-       MX31_PIN_CONTRAST       = IOMUX_PIN(0xff,  22),
-       MX31_PIN_VSYNC3         = IOMUX_PIN(0xff,  23),
-
-       MX31_PIN_DRDY0          = IOMUX_PIN(0xff,  33),
-       MX31_PIN_FPSHIFT        = IOMUX_PIN(0xff,  34),
-       MX31_PIN_HSYNC          = IOMUX_PIN(0xff,  35),
-
-       MX31_PIN_LD17           = IOMUX_PIN(0xff,  37),
-       MX31_PIN_LD16           = IOMUX_PIN(0xff,  38),
-       MX31_PIN_LD15           = IOMUX_PIN(0xff,  39),
-       MX31_PIN_LD14           = IOMUX_PIN(0xff,  40),
-       MX31_PIN_LD13           = IOMUX_PIN(0xff,  41),
-       MX31_PIN_LD12           = IOMUX_PIN(0xff,  42),
-       MX31_PIN_LD11           = IOMUX_PIN(0xff,  43),
-       MX31_PIN_LD10           = IOMUX_PIN(0xff,  44),
-       MX31_PIN_LD9            = IOMUX_PIN(0xff,  45),
-       MX31_PIN_LD8            = IOMUX_PIN(0xff,  46),
-       MX31_PIN_LD7            = IOMUX_PIN(0xff,  47),
-       MX31_PIN_LD6            = IOMUX_PIN(0xff,  48),
-       MX31_PIN_LD5            = IOMUX_PIN(0xff,  49),
-       MX31_PIN_LD4            = IOMUX_PIN(0xff,  50),
-       MX31_PIN_LD3            = IOMUX_PIN(0xff,  51),
-       MX31_PIN_LD2            = IOMUX_PIN(0xff,  52),
-       MX31_PIN_LD1            = IOMUX_PIN(0xff,  53),
-       MX31_PIN_LD0            = IOMUX_PIN(0xff,  54),
-};
-
 struct chan_param_mem_planar {
        /* Word 0 */
        u32     xv:10;