packaging: release out (3.8.3)

[profile/ivi/kernel-adaptation-intel-automotive.git] / drivers / video / exynos / exynos_dp_reg.c

diff --git a/drivers/video/exynos/exynos_dp_reg.c b/drivers/video/exynos/exynos_dp_reg.c
index fc19ef6..29d9d03 100644 (file)
--- a/drivers/video/exynos/exynos_dp_reg.c
+++ b/drivers/video/exynos/exynos_dp_reg.c
@@ -19,11 +19,11 @@
 #include "exynos_dp_core.h"
 #include "exynos_dp_reg.h"
 
-#define COMMON_INT_MASK_1 (0)
-#define COMMON_INT_MASK_2 (0)
-#define COMMON_INT_MASK_3 (0)
-#define COMMON_INT_MASK_4 (0)
-#define INT_STA_MASK (0)
+#define COMMON_INT_MASK_1      0
+#define COMMON_INT_MASK_2      0
+#define COMMON_INT_MASK_3      0
+#define COMMON_INT_MASK_4      (HOTPLUG_CHG | HPD_LOST | PLUG)
+#define INT_STA_MASK           INT_HPD
 
 void exynos_dp_enable_video_mute(struct exynos_dp_device *dp, bool enable)
 {
@@ -88,7 +88,7 @@ void exynos_dp_init_analog_param(struct exynos_dp_device *dp)
 void exynos_dp_init_interrupt(struct exynos_dp_device *dp)
 {
        /* Set interrupt pin assertion polarity as high */
-       writel(INT_POL, dp->reg_base + EXYNOS_DP_INT_CTL);
+       writel(INT_POL1 | INT_POL0, dp->reg_base + EXYNOS_DP_INT_CTL);
 
        /* Clear pending regisers */
        writel(0xff, dp->reg_base + EXYNOS_DP_COMMON_INT_STA_1);
@@ -324,7 +324,7 @@ void exynos_dp_init_analog_func(struct exynos_dp_device *dp)
        writel(reg, dp->reg_base + EXYNOS_DP_FUNC_EN_2);
 }
 
-void exynos_dp_init_hpd(struct exynos_dp_device *dp)
+void exynos_dp_clear_hotplug_interrupts(struct exynos_dp_device *dp)
 {
        u32 reg;
 
@@ -333,12 +333,38 @@ void exynos_dp_init_hpd(struct exynos_dp_device *dp)
 
        reg = INT_HPD;
        writel(reg, dp->reg_base + EXYNOS_DP_INT_STA);
+}
+
+void exynos_dp_init_hpd(struct exynos_dp_device *dp)
+{
+       u32 reg;
+
+       exynos_dp_clear_hotplug_interrupts(dp);
 
        reg = readl(dp->reg_base + EXYNOS_DP_SYS_CTL_3);
        reg &= ~(F_HPD | HPD_CTRL);
        writel(reg, dp->reg_base + EXYNOS_DP_SYS_CTL_3);
 }
 
+enum dp_irq_type exynos_dp_get_irq_type(struct exynos_dp_device *dp)
+{
+       u32 reg;
+
+       /* Parse hotplug interrupt status register */
+       reg = readl(dp->reg_base + EXYNOS_DP_COMMON_INT_STA_4);
+
+       if (reg & PLUG)
+               return DP_IRQ_TYPE_HP_CABLE_IN;
+
+       if (reg & HPD_LOST)
+               return DP_IRQ_TYPE_HP_CABLE_OUT;
+
+       if (reg & HOTPLUG_CHG)
+               return DP_IRQ_TYPE_HP_CHANGE;
+
+       return DP_IRQ_TYPE_UNKNOWN;
+}
+
 void exynos_dp_reset_aux(struct exynos_dp_device *dp)
 {
        u32 reg;
@@ -1032,24 +1058,20 @@ void exynos_dp_init_video(struct exynos_dp_device *dp)
        writel(reg, dp->reg_base + EXYNOS_DP_VIDEO_CTL_8);
 }
 
-void exynos_dp_set_video_color_format(struct exynos_dp_device *dp,
-                       u32 color_depth,
-                       u32 color_space,
-                       u32 dynamic_range,
-                       u32 ycbcr_coeff)
+void exynos_dp_set_video_color_format(struct exynos_dp_device *dp)
 {
        u32 reg;
 
        /* Configure the input color depth, color space, dynamic range */
-       reg = (dynamic_range << IN_D_RANGE_SHIFT) |
-               (color_depth << IN_BPC_SHIFT) |
-               (color_space << IN_COLOR_F_SHIFT);
+       reg = (dp->video_info->dynamic_range << IN_D_RANGE_SHIFT) |
+               (dp->video_info->color_depth << IN_BPC_SHIFT) |
+               (dp->video_info->color_space << IN_COLOR_F_SHIFT);
        writel(reg, dp->reg_base + EXYNOS_DP_VIDEO_CTL_2);
 
        /* Set Input Color YCbCr Coefficients to ITU601 or ITU709 */
        reg = readl(dp->reg_base + EXYNOS_DP_VIDEO_CTL_3);
        reg &= ~IN_YC_COEFFI_MASK;
-       if (ycbcr_coeff)
+       if (dp->video_info->ycbcr_coeff)
                reg |= IN_YC_COEFFI_ITU709;
        else
                reg |= IN_YC_COEFFI_ITU601;
@@ -1176,8 +1198,7 @@ int exynos_dp_is_video_stream_on(struct exynos_dp_device *dp)
        return 0;
 }
 
-void exynos_dp_config_video_slave_mode(struct exynos_dp_device *dp,
-                       struct video_info *video_info)
+void exynos_dp_config_video_slave_mode(struct exynos_dp_device *dp)
 {
        u32 reg;
 
@@ -1188,17 +1209,17 @@ void exynos_dp_config_video_slave_mode(struct exynos_dp_device *dp,
 
        reg = readl(dp->reg_base + EXYNOS_DP_VIDEO_CTL_10);
        reg &= ~INTERACE_SCAN_CFG;
-       reg |= (video_info->interlaced << 2);
+       reg |= (dp->video_info->interlaced << 2);
        writel(reg, dp->reg_base + EXYNOS_DP_VIDEO_CTL_10);
 
        reg = readl(dp->reg_base + EXYNOS_DP_VIDEO_CTL_10);
        reg &= ~VSYNC_POLARITY_CFG;
-       reg |= (video_info->v_sync_polarity << 1);
+       reg |= (dp->video_info->v_sync_polarity << 1);
        writel(reg, dp->reg_base + EXYNOS_DP_VIDEO_CTL_10);
 
        reg = readl(dp->reg_base + EXYNOS_DP_VIDEO_CTL_10);
        reg &= ~HSYNC_POLARITY_CFG;
-       reg |= (video_info->h_sync_polarity << 0);
+       reg |= (dp->video_info->h_sync_polarity << 0);
        writel(reg, dp->reg_base + EXYNOS_DP_VIDEO_CTL_10);
 
        reg = AUDIO_MODE_SPDIF_MODE | VIDEO_MODE_SLAVE_MODE;