+// SPDX-License-Identifier: GPL-2.0+
/*
* Driver for AT91/AT32 LCD Controller
*
* Copyright (C) 2007 Atmel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <atmel_lcd.h>
+#include <dm.h>
#include <fdtdec.h>
+#include <log.h>
+#include <part.h>
+#include <video.h>
+#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/gpio.h>
#include <asm/arch/clk.h>
#include <lcd.h>
#include <bmp_layout.h>
#include <atmel_lcdc.h>
+#include <linux/delay.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+ /* Maximum LCD size we support */
+ LCD_MAX_WIDTH = 1366,
+ LCD_MAX_HEIGHT = 768,
+ LCD_MAX_LOG2_BPP = VIDEO_BPP16,
+};
+
+struct atmel_fb_priv {
+ struct display_timing timing;
+};
/* configurable parameters */
#define ATMEL_LCDC_CVAL_DEFAULT 0xc8
#define lcdc_readl(mmio, reg) __raw_readl((mmio)+(reg))
#define lcdc_writel(mmio, reg, val) __raw_writel((val), (mmio)+(reg))
-ushort *configuration_get_cmap(void)
-{
- return (ushort *)(panel_info.mmio + ATMEL_LCDC_LUT(0));
-}
-
-#if defined(CONFIG_BMP_16BPP) && defined(CONFIG_ATMEL_LCD_BGR555)
-void fb_put_word(uchar **fb, uchar **from)
-{
- *(*fb)++ = (((*from)[0] & 0x1f) << 2) | ((*from)[1] & 0x03);
- *(*fb)++ = ((*from)[0] & 0xe0) | (((*from)[1] & 0x7c) >> 2);
- *from += 2;
-}
-#endif
-
-#ifdef CONFIG_LCD_LOGO
-#include <bmp_logo.h>
-void lcd_logo_set_cmap(void)
-{
- int i;
- uint lut_entry;
- ushort colreg;
- uint *cmap = (uint *)configuration_get_cmap();
-
- for (i = 0; i < BMP_LOGO_COLORS; ++i) {
- colreg = bmp_logo_palette[i];
-#ifdef CONFIG_ATMEL_LCD_BGR555
- lut_entry = ((colreg & 0x000F) << 11) |
- ((colreg & 0x00F0) << 2) |
- ((colreg & 0x0F00) >> 7);
-#else
- lut_entry = ((colreg & 0x000F) << 1) |
- ((colreg & 0x00F0) << 3) |
- ((colreg & 0x0F00) << 4);
-#endif
- *(cmap + BMP_LOGO_OFFSET) = lut_entry;
- cmap++;
- }
-}
-#endif
-
-void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
-{
-#if defined(CONFIG_ATMEL_LCD_BGR555)
- lcdc_writel(panel_info.mmio, ATMEL_LCDC_LUT(regno),
- (red >> 3) | ((green & 0xf8) << 2) | ((blue & 0xf8) << 7));
-#else
- lcdc_writel(panel_info.mmio, ATMEL_LCDC_LUT(regno),
- (blue >> 3) | ((green & 0xfc) << 3) | ((red & 0xf8) << 8));
-#endif
-}
-
-void lcd_set_cmap(struct bmp_image *bmp, unsigned colors)
-{
- int i;
-
- for (i = 0; i < colors; ++i) {
- struct bmp_color_table_entry cte = bmp->color_table[i];
- lcd_setcolreg(i, cte.red, cte.green, cte.blue);
- }
-}
-
static void atmel_fb_init(ulong addr, struct display_timing *timing, int bpix,
bool tft, bool cont_pol_low, ulong lcdbase)
{
value << ATMEL_LCDC_CLKVAL_OFFSET);
/* Initialize control register 2 */
-#ifdef CONFIG_AVR32
- value = ATMEL_LCDC_MEMOR_BIG | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE;
-#else
value = ATMEL_LCDC_MEMOR_LITTLE | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE;
-#endif
if (tft)
value |= ATMEL_LCDC_DISTYPE_TFT;
(ATMEL_LCDC_GUARD_TIME << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
}
-void lcd_ctrl_init(void *lcdbase)
+static int atmel_fb_lcd_probe(struct udevice *dev)
{
- struct display_timing timing;
+ struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
+ struct video_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct atmel_fb_priv *priv = dev_get_priv(dev);
+ struct display_timing *timing = &priv->timing;
+
+ /*
+ * For now some values are hard-coded. We could use the device tree
+ * bindings in simple-framebuffer.txt to specify the format/bpp and
+ * some Atmel-specific binding for tft and cont_pol_low.
+ */
+ atmel_fb_init(ATMEL_BASE_LCDC, timing, VIDEO_BPP16, true, false,
+ uc_plat->base);
+ uc_priv->xsize = timing->hactive.typ;
+ uc_priv->ysize = timing->vactive.typ;
+ uc_priv->bpix = VIDEO_BPP16;
+ video_set_flush_dcache(dev, true);
+ debug("LCD frame buffer at %lx, size %x, %dx%d pixels\n", uc_plat->base,
+ uc_plat->size, uc_priv->xsize, uc_priv->ysize);
+
+ return 0;
+}
- timing.flags = 0;
- if (!(panel_info.vl_sync & ATMEL_LCDC_INVLINE_INVERTED))
- timing.flags |= DISPLAY_FLAGS_HSYNC_HIGH;
- if (!(panel_info.vl_sync & ATMEL_LCDC_INVFRAME_INVERTED))
- timing.flags |= DISPLAY_FLAGS_VSYNC_LOW;
- timing.pixelclock.typ = panel_info.vl_clk;
-
- timing.hactive.typ = panel_info.vl_col;
- timing.hfront_porch.typ = panel_info.vl_right_margin;
- timing.hback_porch.typ = panel_info.vl_left_margin;
- timing.hsync_len.typ = panel_info.vl_hsync_len;
-
- timing.vactive.typ = panel_info.vl_row;
- timing.vfront_porch.typ = panel_info.vl_clk;
- timing.vback_porch.typ = panel_info.vl_clk;
- timing.vsync_len.typ = panel_info.vl_clk;
-
- atmel_fb_init(panel_info.mmio, &timing, panel_info.vl_bpix,
- panel_info.vl_tft, panel_info.vl_cont_pol_low,
- (ulong)lcdbase);
+static int atmel_fb_of_to_plat(struct udevice *dev)
+{
+ struct atmel_lcd_plat *plat = dev_get_plat(dev);
+ struct atmel_fb_priv *priv = dev_get_priv(dev);
+ struct display_timing *timing = &priv->timing;
+ const void *blob = gd->fdt_blob;
+
+ if (fdtdec_decode_display_timing(blob, dev_of_offset(dev),
+ plat->timing_index, timing)) {
+ debug("%s: Failed to decode display timing\n", __func__);
+ return -EINVAL;
+ }
+
+ return 0;
}
-ulong calc_fbsize(void)
+static int atmel_fb_lcd_bind(struct udevice *dev)
{
- return ((panel_info.vl_col * panel_info.vl_row *
- NBITS(panel_info.vl_bpix)) / 8) + PAGE_SIZE;
+ struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
+
+ uc_plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT *
+ (1 << VIDEO_BPP16) / 8;
+ debug("%s: Frame buffer size %x\n", __func__, uc_plat->size);
+
+ return 0;
}
+
+static const struct udevice_id atmel_fb_lcd_ids[] = {
+ { .compatible = "atmel,at91sam9g45-lcdc" },
+ { }
+};
+
+U_BOOT_DRIVER(atmel_fb) = {
+ .name = "atmel_fb",
+ .id = UCLASS_VIDEO,
+ .of_match = atmel_fb_lcd_ids,
+ .bind = atmel_fb_lcd_bind,
+ .of_to_plat = atmel_fb_of_to_plat,
+ .probe = atmel_fb_lcd_probe,
+ .plat_auto = sizeof(struct atmel_lcd_plat),
+ .priv_auto = sizeof(struct atmel_fb_priv),
+};
projects / platform / kernel / u-boot.git / blobdiff