{
.usb_rst_mask = CCM_USB_CTRL_PHY1_RST,
.ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0,
- .gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO,
.csr = (void *)SUNXI_USB_CSR,
.irq = 39,
.id = 1,
{
.usb_rst_mask = CCM_USB_CTRL_PHY2_RST,
.ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1,
- .gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO,
.csr = (void *)SUNXI_USB_CSR,
.irq = 40,
.id = 2,
return NULL;
}
+static int get_vbus_gpio(int hcd_id)
+{
+ switch (hcd_id) {
+ case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN);
+ case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN);
+ }
+ return -1;
+}
+
static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr,
int data, int len)
{
usb_phy_write(sunxi_ehci, 0x20, 0x14, 5);
/* threshold adjustment disconnect */
-#ifdef CONFIG_SUN4I
+#ifdef CONFIG_MACH_SUN4I
usb_phy_write(sunxi_ehci, 0x2a, 3, 2);
#else
usb_phy_write(sunxi_ehci, 0x2a, 2, 2);
sunxi_usb_passby(sunxi_ehci, SUNXI_USB_PASSBY_EN);
- gpio_direction_output(sunxi_ehci->gpio_vbus, 1);
+ if (sunxi_ehci->gpio_vbus != -1)
+ gpio_direction_output(sunxi_ehci->gpio_vbus, 1);
}
static void sunxi_ehci_disable(struct sunxi_ehci_hcd *sunxi_ehci)
{
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
- gpio_direction_output(sunxi_ehci->gpio_vbus, 0);
+ if (sunxi_ehci->gpio_vbus != -1)
+ gpio_direction_output(sunxi_ehci->gpio_vbus, 0);
sunxi_usb_passby(sunxi_ehci, !SUNXI_USB_PASSBY_EN);
{
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
struct sunxi_ehci_hcd *sunxi_ehci = &sunxi_echi_hcd[index];
+ int err;
+
+ sunxi_ehci->gpio_vbus = get_vbus_gpio(sunxi_ehci->id);
/* enable common PHY only once */
if (index == 0)
setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
+ if (sunxi_ehci->gpio_vbus != -1) {
+ err = gpio_request(sunxi_ehci->gpio_vbus, "ehci_vbus");
+ if (err)
+ return err;
+ }
+
sunxi_ehci_enable(sunxi_ehci);
*hccr = get_io_base(sunxi_ehci->id);
{
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
struct sunxi_ehci_hcd *sunxi_ehci = &sunxi_echi_hcd[index];
+ int err;
sunxi_ehci_disable(sunxi_ehci);
+ if (sunxi_ehci->gpio_vbus != -1) {
+ err = gpio_free(sunxi_ehci->gpio_vbus);
+ if (err)
+ return err;
+ }
+
/* disable common PHY only once, for the last enabled hcd */
if (enabled_hcd_count == 1)
clrbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);